2 * Mesa 3-D graphics library
4 * Copyright (C) 2014 LunarG, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Chia-I Wu <olv@lunarg.com>
28 #include "util/u_draw.h"
29 #include "util/u_pack_color.h"
31 #include "ilo_builder_3d_top.h" /* for ve_init_cso_with_components() */
33 #include "ilo_state.h"
34 #include "ilo_state_gen.h" /* for zs_align_surface() */
36 #include "ilo_blitter.h"
39 * Set the states that are invariant between all ops.
42 ilo_blitter_set_invariants(struct ilo_blitter
*blitter
)
44 struct pipe_screen
*screen
= blitter
->ilo
->base
.screen
;
45 struct pipe_resource templ
;
46 struct pipe_vertex_element velems
[2];
47 struct pipe_viewport_state vp
;
49 if (blitter
->initialized
)
52 blitter
->buffer
.size
= 4096;
54 /* allocate the vertex buffer */
55 memset(&templ
, 0, sizeof(templ
));
56 templ
.target
= PIPE_BUFFER
;
57 templ
.width0
= blitter
->buffer
.size
;
58 templ
.usage
= PIPE_USAGE_STREAM
;
59 templ
.bind
= PIPE_BIND_VERTEX_BUFFER
;
60 blitter
->buffer
.res
= screen
->resource_create(screen
, &templ
);
61 if (!blitter
->buffer
.res
)
64 /* do not increase reference count */
65 blitter
->vb
.states
[0].buffer
= blitter
->buffer
.res
;
67 /* only vertex X and Y */
68 blitter
->vb
.states
[0].stride
= 2 * sizeof(float);
69 blitter
->vb
.enabled_mask
= 0x1;
70 memset(&velems
, 0, sizeof(velems
));
71 velems
[1].src_format
= PIPE_FORMAT_R32G32_FLOAT
;
72 ilo_gpe_init_ve(blitter
->ilo
->dev
, 2, velems
, &blitter
->ve
);
74 /* override first VE to be VUE header */
75 ve_init_cso_with_components(blitter
->ilo
->dev
,
76 GEN6_VFCOMP_STORE_0
, /* Reserved */
77 GEN6_VFCOMP_STORE_0
, /* Render Target Array Index */
78 GEN6_VFCOMP_STORE_0
, /* Viewport Index */
79 GEN6_VFCOMP_STORE_0
, /* Point Width */
82 /* a rectangle has 3 vertices in a RECTLIST */
83 util_draw_init_info(&blitter
->draw
);
84 blitter
->draw
.mode
= ILO_PRIM_RECTANGLES
;
85 blitter
->draw
.count
= 3;
88 * From the Haswell PRM, volume 7, page 615:
90 * "The clear value must be between the min and max depth values
91 * (inclusive) defined in the CC_VIEWPORT."
93 * Even though clipping and viewport transformation will be disabled, we
94 * still need to set up the viewport states.
96 memset(&vp
, 0, sizeof(vp
));
101 ilo_gpe_set_viewport_cso(blitter
->ilo
->dev
, &vp
, &blitter
->viewport
);
103 blitter
->initialized
= true;
109 ilo_blitter_set_op(struct ilo_blitter
*blitter
,
110 enum ilo_blitter_rectlist_op op
)
116 * Set the rectangle primitive.
119 ilo_blitter_set_rectlist(struct ilo_blitter
*blitter
,
120 unsigned x
, unsigned y
,
121 unsigned width
, unsigned height
)
123 unsigned usage
= PIPE_TRANSFER_WRITE
| PIPE_TRANSFER_UNSYNCHRONIZED
;
124 float vertices
[3][2];
128 * From the Sandy Bridge PRM, volume 2 part 1, page 11:
130 * "(RECTLIST) A list of independent rectangles, where only 3 vertices
131 * are provided per rectangle object, with the fourth vertex implied
132 * by the definition of a rectangle. V0=LowerRight, V1=LowerLeft,
133 * V2=UpperLeft. Implied V3 = V0- V1+V2."
135 vertices
[0][0] = (float) (x
+ width
);
136 vertices
[0][1] = (float) (y
+ height
);
137 vertices
[1][0] = (float) x
;
138 vertices
[1][1] = (float) (y
+ height
);
139 vertices
[2][0] = (float) x
;
140 vertices
[2][1] = (float) y
;
143 if (blitter
->buffer
.offset
+ sizeof(vertices
) > blitter
->buffer
.size
) {
144 if (!ilo_buffer_rename_bo(ilo_buffer(blitter
->buffer
.res
)))
145 usage
&= ~PIPE_TRANSFER_UNSYNCHRONIZED
;
147 blitter
->buffer
.offset
= 0;
150 u_box_1d(blitter
->buffer
.offset
, sizeof(vertices
), &box
);
152 blitter
->ilo
->base
.transfer_inline_write(&blitter
->ilo
->base
,
153 blitter
->buffer
.res
, 0, usage
, &box
, vertices
, 0, 0);
155 blitter
->vb
.states
[0].buffer_offset
= blitter
->buffer
.offset
;
156 blitter
->buffer
.offset
+= sizeof(vertices
);
160 ilo_blitter_set_clear_values(struct ilo_blitter
*blitter
,
161 uint32_t depth
, ubyte stencil
)
163 blitter
->depth_clear_value
= depth
;
164 blitter
->cc
.stencil_ref
.ref_value
[0] = stencil
;
168 ilo_blitter_set_dsa(struct ilo_blitter
*blitter
,
169 const struct pipe_depth_stencil_alpha_state
*state
)
171 ilo_gpe_init_dsa(blitter
->ilo
->dev
, state
, &blitter
->dsa
);
175 ilo_blitter_set_fb(struct ilo_blitter
*blitter
,
176 struct pipe_resource
*res
, unsigned level
,
177 const struct ilo_surface_cso
*cso
)
179 struct ilo_texture
*tex
= ilo_texture(res
);
181 blitter
->fb
.width
= u_minify(tex
->layout
.width0
, level
);
182 blitter
->fb
.height
= u_minify(tex
->layout
.height0
, level
);
184 blitter
->fb
.num_samples
= res
->nr_samples
;
185 if (!blitter
->fb
.num_samples
)
186 blitter
->fb
.num_samples
= 1;
188 memcpy(&blitter
->fb
.dst
, cso
, sizeof(*cso
));
192 ilo_blitter_set_fb_from_surface(struct ilo_blitter
*blitter
,
193 struct pipe_surface
*surf
)
195 ilo_blitter_set_fb(blitter
, surf
->texture
, surf
->u
.tex
.level
,
196 (const struct ilo_surface_cso
*) surf
);
200 ilo_blitter_set_fb_from_resource(struct ilo_blitter
*blitter
,
201 struct pipe_resource
*res
,
202 enum pipe_format format
,
203 unsigned level
, unsigned slice
)
205 struct pipe_surface templ
, *surf
;
207 memset(&templ
, 0, sizeof(templ
));
208 templ
.format
= format
;
209 templ
.u
.tex
.level
= level
;
210 templ
.u
.tex
.first_layer
= slice
;
211 templ
.u
.tex
.last_layer
= slice
;
213 /* if we did not call create_surface(), it would never fail */
214 surf
= blitter
->ilo
->base
.create_surface(&blitter
->ilo
->base
, res
, &templ
);
217 ilo_blitter_set_fb(blitter
, res
, level
,
218 (const struct ilo_surface_cso
*) surf
);
220 pipe_surface_reference(&surf
, NULL
);
224 ilo_blitter_set_uses(struct ilo_blitter
*blitter
, uint32_t uses
)
226 blitter
->uses
= uses
;
230 hiz_align_fb(struct ilo_blitter
*blitter
)
232 unsigned align_w
, align_h
;
234 switch (blitter
->op
) {
235 case ILO_BLITTER_RECTLIST_CLEAR_ZS
:
236 case ILO_BLITTER_RECTLIST_RESOLVE_Z
:
244 * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
246 * "A rectangle primitive representing the clear area is delivered. The
247 * primitive must adhere to the following restrictions on size:
249 * - If Number of Multisamples is NUMSAMPLES_1, the rectangle must be
250 * aligned to an 8x4 pixel block relative to the upper left corner
251 * of the depth buffer, and contain an integer number of these pixel
252 * blocks, and all 8x4 pixels must be lit.
254 * - If Number of Multisamples is NUMSAMPLES_4, the rectangle must be
255 * aligned to a 4x2 pixel block (8x4 sample block) relative to the
256 * upper left corner of the depth buffer, and contain an integer
257 * number of these pixel blocks, and all samples of the 4x2 pixels
260 * - If Number of Multisamples is NUMSAMPLES_8, the rectangle must be
261 * aligned to a 2x2 pixel block (8x4 sample block) relative to the
262 * upper left corner of the depth buffer, and contain an integer
263 * number of these pixel blocks, and all samples of the 2x2 pixels
266 * "The following is required when performing a depth buffer resolve:
268 * - A rectangle primitive of the same size as the previous depth
269 * buffer clear operation must be delivered, and depth buffer state
270 * cannot have changed since the previous depth buffer clear
273 switch (blitter
->fb
.num_samples
) {
293 if (blitter
->fb
.width
% align_w
|| blitter
->fb
.height
% align_h
) {
294 blitter
->fb
.width
= align(blitter
->fb
.width
, align_w
);
295 blitter
->fb
.height
= align(blitter
->fb
.height
, align_h
);
297 assert(!blitter
->fb
.dst
.is_rt
);
298 zs_align_surface(blitter
->ilo
->dev
, align_w
, align_h
,
299 &blitter
->fb
.dst
.u
.zs
);
304 hiz_emit_rectlist(struct ilo_blitter
*blitter
)
306 hiz_align_fb(blitter
);
308 ilo_blitter_set_rectlist(blitter
, 0, 0,
309 blitter
->fb
.width
, blitter
->fb
.height
);
311 ilo_3d_draw_rectlist(blitter
->ilo
->hw3d
, blitter
);
315 hiz_can_clear_zs(const struct ilo_blitter
*blitter
,
316 const struct ilo_texture
*tex
)
319 * From the Sandy Bridge PRM, volume 2 part 1, page 314:
321 * "Several cases exist where Depth Buffer Clear cannot be enabled (the
322 * legacy method of clearing must be performed):
324 * - If the depth buffer format is D32_FLOAT_S8X24_UINT or
327 * - If stencil test is enabled but the separate stencil buffer is
330 * - [DevSNB-A{W/A}]: ...
332 * - [DevSNB{W/A}]: When depth buffer format is D16_UNORM and the
333 * width of the map (LOD0) is not multiple of 16, fast clear
334 * optimization must be disabled."
336 * From the Ivy Bridge PRM, volume 2 part 1, page 313:
338 * "Several cases exist where Depth Buffer Clear cannot be enabled (the
339 * legacy method of clearing must be performed):
341 * - If the depth buffer format is D32_FLOAT_S8X24_UINT or
344 * - If stencil test is enabled but the separate stencil buffer is
347 * The truth is when HiZ is enabled, separate stencil is also enabled on
348 * all GENs. The depth buffer format cannot be combined depth/stencil.
350 switch (tex
->layout
.format
) {
351 case PIPE_FORMAT_Z16_UNORM
:
352 if (ilo_dev_gen(blitter
->ilo
->dev
) == ILO_GEN(6) &&
353 tex
->base
.width0
% 16)
356 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
357 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
358 assert(!"HiZ with combined depth/stencil");
369 ilo_blitter_rectlist_clear_zs(struct ilo_blitter
*blitter
,
370 struct pipe_surface
*zs
,
371 unsigned clear_flags
,
372 double depth
, unsigned stencil
)
374 struct ilo_texture
*tex
= ilo_texture(zs
->texture
);
375 struct pipe_depth_stencil_alpha_state dsa_state
;
376 uint32_t uses
, clear_value
;
378 if (!ilo_texture_can_enable_hiz(tex
,
379 zs
->u
.tex
.level
, zs
->u
.tex
.first_layer
,
380 zs
->u
.tex
.last_layer
- zs
->u
.tex
.first_layer
+ 1))
383 if (!hiz_can_clear_zs(blitter
, tex
))
386 clear_value
= util_pack_z(tex
->layout
.format
, depth
);
388 ilo_blit_resolve_surface(blitter
->ilo
, zs
,
389 ILO_TEXTURE_RENDER_WRITE
| ILO_TEXTURE_CLEAR
);
390 ilo_texture_set_slice_clear_value(tex
, zs
->u
.tex
.level
,
391 zs
->u
.tex
.first_layer
,
392 zs
->u
.tex
.last_layer
- zs
->u
.tex
.first_layer
+ 1,
396 * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
398 * "- Depth Test Enable must be disabled and Depth Buffer Write Enable
399 * must be enabled (if depth is being cleared).
401 * - Stencil buffer clear can be performed at the same time by
402 * enabling Stencil Buffer Write Enable. Stencil Test Enable must
403 * be enabled and Stencil Pass Depth Pass Op set to REPLACE, and the
404 * clear value that is placed in the stencil buffer is the Stencil
405 * Reference Value from COLOR_CALC_STATE.
407 * - Note also that stencil buffer clear can be performed without
408 * depth buffer clear. For stencil only clear, Depth Test Enable and
409 * Depth Buffer Write Enable must be disabled.
411 * - [DevSNB] errata: For stencil buffer only clear, the previous
412 * depth clear value must be delivered during the clear."
414 memset(&dsa_state
, 0, sizeof(dsa_state
));
416 if (clear_flags
& PIPE_CLEAR_DEPTH
)
417 dsa_state
.depth
.writemask
= true;
419 if (clear_flags
& PIPE_CLEAR_STENCIL
) {
420 dsa_state
.stencil
[0].enabled
= true;
421 dsa_state
.stencil
[0].func
= PIPE_FUNC_ALWAYS
;
422 dsa_state
.stencil
[0].fail_op
= PIPE_STENCIL_OP_KEEP
;
423 dsa_state
.stencil
[0].zpass_op
= PIPE_STENCIL_OP_REPLACE
;
424 dsa_state
.stencil
[0].zfail_op
= PIPE_STENCIL_OP_KEEP
;
427 * From the Ivy Bridge PRM, volume 2 part 1, page 277:
429 * "Additionally the following must be set to the correct values.
431 * - DEPTH_STENCIL_STATE::Stencil Write Mask must be 0xFF
432 * - DEPTH_STENCIL_STATE::Stencil Test Mask must be 0xFF
433 * - DEPTH_STENCIL_STATE::Back Face Stencil Write Mask must be 0xFF
434 * - DEPTH_STENCIL_STATE::Back Face Stencil Test Mask must be 0xFF"
436 dsa_state
.stencil
[0].valuemask
= 0xff;
437 dsa_state
.stencil
[0].writemask
= 0xff;
438 dsa_state
.stencil
[1].valuemask
= 0xff;
439 dsa_state
.stencil
[1].writemask
= 0xff;
442 ilo_blitter_set_invariants(blitter
);
443 ilo_blitter_set_op(blitter
, ILO_BLITTER_RECTLIST_CLEAR_ZS
);
445 ilo_blitter_set_dsa(blitter
, &dsa_state
);
446 ilo_blitter_set_clear_values(blitter
, clear_value
, (ubyte
) stencil
);
447 ilo_blitter_set_fb_from_surface(blitter
, zs
);
449 uses
= ILO_BLITTER_USE_DSA
;
450 if (clear_flags
& PIPE_CLEAR_DEPTH
)
451 uses
|= ILO_BLITTER_USE_VIEWPORT
| ILO_BLITTER_USE_FB_DEPTH
;
452 if (clear_flags
& PIPE_CLEAR_STENCIL
)
453 uses
|= ILO_BLITTER_USE_CC
| ILO_BLITTER_USE_FB_STENCIL
;
454 ilo_blitter_set_uses(blitter
, uses
);
456 hiz_emit_rectlist(blitter
);
462 ilo_blitter_rectlist_resolve_z(struct ilo_blitter
*blitter
,
463 struct pipe_resource
*res
,
464 unsigned level
, unsigned slice
)
466 struct ilo_texture
*tex
= ilo_texture(res
);
467 struct pipe_depth_stencil_alpha_state dsa_state
;
468 const struct ilo_texture_slice
*s
=
469 ilo_texture_get_slice(tex
, level
, slice
);
471 if (!ilo_texture_can_enable_hiz(tex
, level
, slice
, 1))
475 * From the Sandy Bridge PRM, volume 2 part 1, page 314:
477 * "Depth Test Enable must be enabled with the Depth Test Function set
478 * to NEVER. Depth Buffer Write Enable must be enabled. Stencil Test
479 * Enable and Stencil Buffer Write Enable must be disabled."
481 memset(&dsa_state
, 0, sizeof(dsa_state
));
482 dsa_state
.depth
.writemask
= true;
483 dsa_state
.depth
.enabled
= true;
484 dsa_state
.depth
.func
= PIPE_FUNC_NEVER
;
486 ilo_blitter_set_invariants(blitter
);
487 ilo_blitter_set_op(blitter
, ILO_BLITTER_RECTLIST_RESOLVE_Z
);
489 ilo_blitter_set_dsa(blitter
, &dsa_state
);
490 ilo_blitter_set_clear_values(blitter
, s
->clear_value
, 0);
491 ilo_blitter_set_fb_from_resource(blitter
, res
, res
->format
, level
, slice
);
492 ilo_blitter_set_uses(blitter
,
493 ILO_BLITTER_USE_DSA
| ILO_BLITTER_USE_FB_DEPTH
);
495 hiz_emit_rectlist(blitter
);
499 ilo_blitter_rectlist_resolve_hiz(struct ilo_blitter
*blitter
,
500 struct pipe_resource
*res
,
501 unsigned level
, unsigned slice
)
503 struct ilo_texture
*tex
= ilo_texture(res
);
504 struct pipe_depth_stencil_alpha_state dsa_state
;
506 if (!ilo_texture_can_enable_hiz(tex
, level
, slice
, 1))
510 * From the Sandy Bridge PRM, volume 2 part 1, page 315:
512 * "(Hierarchical Depth Buffer Resolve) Depth Test Enable must be
513 * disabled. Depth Buffer Write Enable must be enabled. Stencil Test
514 * Enable and Stencil Buffer Write Enable must be disabled."
516 memset(&dsa_state
, 0, sizeof(dsa_state
));
517 dsa_state
.depth
.writemask
= true;
519 ilo_blitter_set_invariants(blitter
);
520 ilo_blitter_set_op(blitter
, ILO_BLITTER_RECTLIST_RESOLVE_HIZ
);
522 ilo_blitter_set_dsa(blitter
, &dsa_state
);
523 ilo_blitter_set_fb_from_resource(blitter
, res
, res
->format
, level
, slice
);
524 ilo_blitter_set_uses(blitter
,
525 ILO_BLITTER_USE_DSA
| ILO_BLITTER_USE_FB_DEPTH
);
527 hiz_emit_rectlist(blitter
);