2 * Mesa 3-D graphics library
4 * Copyright (C) 2014 LunarG, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Chia-I Wu <olv@lunarg.com>
28 #include "util/u_draw.h"
29 #include "util/u_pack_color.h"
31 #include "ilo_blitter.h"
33 #include "ilo_3d_pipeline.h"
35 #include "ilo_gpe_gen6.h" /* for ve_init_cso_with_components */
38 * Set the states that are invariant between all ops.
41 ilo_blitter_set_invariants(struct ilo_blitter
*blitter
)
43 struct pipe_screen
*screen
= blitter
->ilo
->base
.screen
;
44 struct pipe_resource templ
;
45 struct pipe_vertex_element velems
[2];
46 struct pipe_viewport_state vp
;
48 if (blitter
->initialized
)
51 blitter
->buffer
.size
= 4096;
53 /* allocate the vertex buffer */
54 memset(&templ
, 0, sizeof(templ
));
55 templ
.target
= PIPE_BUFFER
;
56 templ
.width0
= blitter
->buffer
.size
;
57 templ
.usage
= PIPE_USAGE_STREAM
;
58 templ
.bind
= PIPE_BIND_VERTEX_BUFFER
;
59 blitter
->buffer
.res
= screen
->resource_create(screen
, &templ
);
60 if (!blitter
->buffer
.res
)
63 /* do not increase reference count */
64 blitter
->vb
.states
[0].buffer
= blitter
->buffer
.res
;
66 /* only vertex X and Y */
67 blitter
->vb
.states
[0].stride
= 2 * sizeof(float);
68 blitter
->vb
.enabled_mask
= 0x1;
69 memset(&velems
, 0, sizeof(velems
));
70 velems
[1].src_format
= PIPE_FORMAT_R32G32_FLOAT
;
71 ilo_gpe_init_ve(blitter
->ilo
->dev
, 2, velems
, &blitter
->ve
);
73 /* override first VE to be VUE header */
74 ve_init_cso_with_components(blitter
->ilo
->dev
,
75 BRW_VE1_COMPONENT_STORE_0
, /* Reserved */
76 BRW_VE1_COMPONENT_STORE_0
, /* Render Target Array Index */
77 BRW_VE1_COMPONENT_STORE_0
, /* Viewport Index */
78 BRW_VE1_COMPONENT_STORE_0
, /* Point Width */
81 /* a rectangle has 3 vertices in a RECTLIST */
82 util_draw_init_info(&blitter
->draw
);
83 blitter
->draw
.count
= 3;
86 * From the Haswell PRM, volume 7, page 615:
88 * "The clear value must be between the min and max depth values
89 * (inclusive) defined in the CC_VIEWPORT."
91 * Even though clipping and viewport transformation will be disabled, we
92 * still need to set up the viewport states.
94 memset(&vp
, 0, sizeof(vp
));
99 ilo_gpe_set_viewport_cso(blitter
->ilo
->dev
, &vp
, &blitter
->viewport
);
101 blitter
->initialized
= true;
107 ilo_blitter_set_op(struct ilo_blitter
*blitter
,
108 enum ilo_blitter_rectlist_op op
)
114 * Set the rectangle primitive.
117 ilo_blitter_set_rectlist(struct ilo_blitter
*blitter
,
118 unsigned x
, unsigned y
,
119 unsigned width
, unsigned height
)
121 unsigned usage
= PIPE_TRANSFER_WRITE
| PIPE_TRANSFER_UNSYNCHRONIZED
;
122 float vertices
[3][2];
126 * From the Sandy Bridge PRM, volume 2 part 1, page 11:
128 * "(RECTLIST) A list of independent rectangles, where only 3 vertices
129 * are provided per rectangle object, with the fourth vertex implied
130 * by the definition of a rectangle. V0=LowerRight, V1=LowerLeft,
131 * V2=UpperLeft. Implied V3 = V0- V1+V2."
133 vertices
[0][0] = (float) (x
+ width
);
134 vertices
[0][1] = (float) (y
+ height
);
135 vertices
[1][0] = (float) x
;
136 vertices
[1][1] = (float) (y
+ height
);
137 vertices
[2][0] = (float) x
;
138 vertices
[2][1] = (float) y
;
141 if (blitter
->buffer
.offset
+ sizeof(vertices
) > blitter
->buffer
.size
) {
142 if (!ilo_buffer_alloc_bo(ilo_buffer(blitter
->buffer
.res
)))
143 usage
&= ~PIPE_TRANSFER_UNSYNCHRONIZED
;
145 blitter
->buffer
.offset
= 0;
148 u_box_1d(blitter
->buffer
.offset
, sizeof(vertices
), &box
);
150 blitter
->ilo
->base
.transfer_inline_write(&blitter
->ilo
->base
,
151 blitter
->buffer
.res
, 0, usage
, &box
, vertices
, 0, 0);
153 blitter
->vb
.states
[0].buffer_offset
= blitter
->buffer
.offset
;
154 blitter
->buffer
.offset
+= sizeof(vertices
);
158 ilo_blitter_set_clear_values(struct ilo_blitter
*blitter
,
159 uint32_t depth
, ubyte stencil
)
161 blitter
->depth_clear_value
= depth
;
162 blitter
->cc
.stencil_ref
.ref_value
[0] = stencil
;
166 ilo_blitter_set_dsa(struct ilo_blitter
*blitter
,
167 const struct pipe_depth_stencil_alpha_state
*state
)
169 ilo_gpe_init_dsa(blitter
->ilo
->dev
, state
, &blitter
->dsa
);
173 ilo_blitter_set_fb(struct ilo_blitter
*blitter
,
174 const struct pipe_resource
*res
, unsigned level
,
175 const struct ilo_surface_cso
*cso
)
177 blitter
->fb
.width
= u_minify(res
->width0
, level
);
178 blitter
->fb
.height
= u_minify(res
->height0
, level
);
180 blitter
->fb
.num_samples
= res
->nr_samples
;
181 if (!blitter
->fb
.num_samples
)
182 blitter
->fb
.num_samples
= 1;
184 memcpy(&blitter
->fb
.dst
, cso
, sizeof(*cso
));
188 ilo_blitter_set_fb_from_surface(struct ilo_blitter
*blitter
,
189 struct pipe_surface
*surf
)
191 ilo_blitter_set_fb(blitter
, surf
->texture
, surf
->u
.tex
.level
,
192 (const struct ilo_surface_cso
*) surf
);
196 ilo_blitter_set_fb_from_resource(struct ilo_blitter
*blitter
,
197 struct pipe_resource
*res
,
198 enum pipe_format format
,
199 unsigned level
, unsigned slice
)
201 struct pipe_surface templ
, *surf
;
203 memset(&templ
, 0, sizeof(templ
));
204 templ
.format
= format
;
205 templ
.u
.tex
.level
= level
;
206 templ
.u
.tex
.first_layer
= slice
;
207 templ
.u
.tex
.last_layer
= slice
;
209 /* if we did not call create_surface(), it would never fail */
210 surf
= blitter
->ilo
->base
.create_surface(&blitter
->ilo
->base
, res
, &templ
);
213 ilo_blitter_set_fb(blitter
, res
, level
,
214 (const struct ilo_surface_cso
*) surf
);
216 pipe_surface_reference(&surf
, NULL
);
220 ilo_blitter_set_uses(struct ilo_blitter
*blitter
, uint32_t uses
)
222 blitter
->uses
= uses
;
226 hiz_emit_rectlist(struct ilo_blitter
*blitter
)
228 struct ilo_3d
*hw3d
= blitter
->ilo
->hw3d
;
229 struct ilo_3d_pipeline
*p
= hw3d
->pipeline
;
231 ilo_3d_own_render_ring(hw3d
);
234 * From the Sandy Bridge PRM, volume 2 part 1, page 313:
236 * "If other rendering operations have preceded this clear, a
237 * PIPE_CONTROL with write cache flush enabled and Z-inhibit
238 * disabled must be issued before the rectangle primitive used for
239 * the depth buffer clear operation."
241 * From the Sandy Bridge PRM, volume 2 part 1, page 314:
243 * "Depth buffer clear pass must be followed by a PIPE_CONTROL
244 * command with DEPTH_STALL bit set and Then followed by Depth
247 * But the pipeline has to be flushed both before and after not only
248 * because of these workarounds. We need them for reasons such as
250 * - we may sample from a texture that was rendered to
251 * - we may sample from the fb shortly after
253 if (!ilo_cp_empty(p
->cp
))
254 ilo_3d_pipeline_emit_flush(p
);
256 ilo_3d_pipeline_emit_rectlist(p
, blitter
);
258 ilo_3d_pipeline_emit_flush(p
);
262 * This must be called after ilo_blitter_set_fb().
265 hiz_set_rectlist(struct ilo_blitter
*blitter
, bool aligned
)
267 unsigned width
= blitter
->fb
.width
;
268 unsigned height
= blitter
->fb
.height
;
271 * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
273 * "A rectangle primitive representing the clear area is delivered. The
274 * primitive must adhere to the following restrictions on size:
276 * - If Number of Multisamples is NUMSAMPLES_1, the rectangle must be
277 * aligned to an 8x4 pixel block relative to the upper left corner
278 * of the depth buffer, and contain an integer number of these pixel
279 * blocks, and all 8x4 pixels must be lit.
281 * - If Number of Multisamples is NUMSAMPLES_4, the rectangle must be
282 * aligned to a 4x2 pixel block (8x4 sample block) relative to the
283 * upper left corner of the depth buffer, and contain an integer
284 * number of these pixel blocks, and all samples of the 4x2 pixels
287 * - If Number of Multisamples is NUMSAMPLES_8, the rectangle must be
288 * aligned to a 2x2 pixel block (8x4 sample block) relative to the
289 * upper left corner of the depth buffer, and contain an integer
290 * number of these pixel blocks, and all samples of the 2x2 pixels
293 * "The following is required when performing a depth buffer resolve:
295 * - A rectangle primitive of the same size as the previous depth
296 * buffer clear operation must be delivered, and depth buffer state
297 * cannot have changed since the previous depth buffer clear
300 * Making the RECTLIST aligned to 8x4 is easy. But how about
301 * 3DSTATE_DRAWING_RECTANGLE and 3DSTATE_DEPTH_BUFFER? Since we use
302 * HALIGN_8 and VALIGN_4 for depth buffers, we can safely align the drawing
303 * rectangle, except that the PRM requires the drawing rectangle to be
304 * clampped to the render target boundary. For 3DSTATE_DEPTH_BUFFER, we
305 * cannot align the Width and Height fields if level or slice is greater
309 switch (blitter
->fb
.num_samples
) {
311 width
= align(width
, 8);
312 height
= align(height
, 4);
315 width
= align(width
, 4);
316 height
= align(height
, 4);
319 width
= align(width
, 4);
320 height
= align(height
, 2);
324 width
= align(width
, 2);
325 height
= align(height
, 2);
330 ilo_blitter_set_rectlist(blitter
, 0, 0, width
, height
);
334 hiz_can_clear_zs(const struct ilo_blitter
*blitter
,
335 const struct ilo_texture
*tex
)
337 if (blitter
->ilo
->dev
->gen
> ILO_GEN(6))
341 * From the Sandy Bridge PRM, volume 2 part 1, page 314:
343 * Several cases exist where Depth Buffer Clear cannot be enabled (the
344 * legacy method of clearing must be performed):
346 * - If the depth buffer format is D32_FLOAT_S8X24_UINT or
349 * - If stencil test is enabled but the separate stencil buffer is
352 * - [DevSNB-A{W/A}]: ...
354 * - [DevSNB{W/A}]: When depth buffer format is D16_UNORM and the
355 * width of the map (LOD0) is not multiple of 16, fast clear
356 * optimization must be disabled.
358 switch (tex
->bo_format
) {
359 case PIPE_FORMAT_Z16_UNORM
:
360 if (tex
->base
.width0
% 16)
363 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
364 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
365 assert(!"HiZ with combined depth/stencil");
376 ilo_blitter_rectlist_clear_zs(struct ilo_blitter
*blitter
,
377 struct pipe_surface
*zs
,
378 unsigned clear_flags
,
379 double depth
, unsigned stencil
)
381 struct ilo_texture
*tex
= ilo_texture(zs
->texture
);
382 struct pipe_depth_stencil_alpha_state dsa_state
;
388 if (!hiz_can_clear_zs(blitter
, tex
))
392 * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
394 * "- Depth Test Enable must be disabled and Depth Buffer Write Enable
395 * must be enabled (if depth is being cleared).
397 * - Stencil buffer clear can be performed at the same time by
398 * enabling Stencil Buffer Write Enable. Stencil Test Enable must
399 * be enabled and Stencil Pass Depth Pass Op set to REPLACE, and the
400 * clear value that is placed in the stencil buffer is the Stencil
401 * Reference Value from COLOR_CALC_STATE.
403 * - Note also that stencil buffer clear can be performed without
404 * depth buffer clear. For stencil only clear, Depth Test Enable and
405 * Depth Buffer Write Enable must be disabled.
407 * - [DevSNB] errata: For stencil buffer only clear, the previous
408 * depth clear value must be delivered during the clear."
410 memset(&dsa_state
, 0, sizeof(dsa_state
));
412 if (clear_flags
& PIPE_CLEAR_DEPTH
)
413 dsa_state
.depth
.writemask
= true;
415 if (clear_flags
& PIPE_CLEAR_STENCIL
) {
416 dsa_state
.stencil
[0].enabled
= true;
417 dsa_state
.stencil
[0].func
= PIPE_FUNC_ALWAYS
;
418 dsa_state
.stencil
[0].fail_op
= PIPE_STENCIL_OP_KEEP
;
419 dsa_state
.stencil
[0].zpass_op
= PIPE_STENCIL_OP_REPLACE
;
420 dsa_state
.stencil
[0].zfail_op
= PIPE_STENCIL_OP_KEEP
;
423 * From the Ivy Bridge PRM, volume 2 part 1, page 277:
425 * "Additionally the following must be set to the correct values.
427 * - DEPTH_STENCIL_STATE::Stencil Write Mask must be 0xFF
428 * - DEPTH_STENCIL_STATE::Stencil Test Mask must be 0xFF
429 * - DEPTH_STENCIL_STATE::Back Face Stencil Write Mask must be 0xFF
430 * - DEPTH_STENCIL_STATE::Back Face Stencil Test Mask must be 0xFF"
432 dsa_state
.stencil
[0].valuemask
= 0xff;
433 dsa_state
.stencil
[0].writemask
= 0xff;
434 dsa_state
.stencil
[1].valuemask
= 0xff;
435 dsa_state
.stencil
[1].writemask
= 0xff;
438 ilo_blitter_set_invariants(blitter
);
439 ilo_blitter_set_op(blitter
, ILO_BLITTER_RECTLIST_CLEAR_ZS
);
441 ilo_blitter_set_dsa(blitter
, &dsa_state
);
442 ilo_blitter_set_clear_values(blitter
,
443 util_pack_z(zs
->format
, depth
), (ubyte
) stencil
);
444 ilo_blitter_set_fb_from_surface(blitter
, zs
);
446 uses
= ILO_BLITTER_USE_DSA
;
447 if (clear_flags
& PIPE_CLEAR_DEPTH
)
448 uses
|= ILO_BLITTER_USE_VIEWPORT
| ILO_BLITTER_USE_FB_DEPTH
;
449 if (clear_flags
& PIPE_CLEAR_STENCIL
)
450 uses
|= ILO_BLITTER_USE_CC
| ILO_BLITTER_USE_FB_STENCIL
;
451 ilo_blitter_set_uses(blitter
, uses
);
453 hiz_set_rectlist(blitter
, true);
454 hiz_emit_rectlist(blitter
);
460 ilo_blitter_rectlist_resolve_z(struct ilo_blitter
*blitter
,
461 struct pipe_resource
*res
,
462 unsigned level
, unsigned slice
)
464 struct ilo_texture
*tex
= ilo_texture(res
);
465 struct pipe_depth_stencil_alpha_state dsa_state
;
471 * From the Sandy Bridge PRM, volume 2 part 1, page 314:
473 * "Depth Test Enable must be enabled with the Depth Test Function set
474 * to NEVER. Depth Buffer Write Enable must be enabled. Stencil Test
475 * Enable and Stencil Buffer Write Enable must be disabled."
477 memset(&dsa_state
, 0, sizeof(dsa_state
));
478 dsa_state
.depth
.writemask
= true;
479 dsa_state
.depth
.enabled
= true;
480 dsa_state
.depth
.func
= PIPE_FUNC_NEVER
;
482 ilo_blitter_set_invariants(blitter
);
483 ilo_blitter_set_op(blitter
, ILO_BLITTER_RECTLIST_RESOLVE_Z
);
485 ilo_blitter_set_dsa(blitter
, &dsa_state
);
486 ilo_blitter_set_fb_from_resource(blitter
, res
, res
->format
, level
, slice
);
487 ilo_blitter_set_uses(blitter
,
488 ILO_BLITTER_USE_DSA
| ILO_BLITTER_USE_FB_DEPTH
);
490 hiz_set_rectlist(blitter
, true);
491 hiz_emit_rectlist(blitter
);
495 ilo_blitter_rectlist_resolve_hiz(struct ilo_blitter
*blitter
,
496 struct pipe_resource
*res
,
497 unsigned level
, unsigned slice
)
499 struct ilo_texture
*tex
= ilo_texture(res
);
500 struct pipe_depth_stencil_alpha_state dsa_state
;
506 * From the Sandy Bridge PRM, volume 2 part 1, page 315:
508 * "(Hierarchical Depth Buffer Resolve) Depth Test Enable must be
509 * disabled. Depth Buffer Write Enable must be enabled. Stencil Test
510 * Enable and Stencil Buffer Write Enable must be disabled."
512 memset(&dsa_state
, 0, sizeof(dsa_state
));
513 dsa_state
.depth
.writemask
= true;
515 ilo_blitter_set_invariants(blitter
);
516 ilo_blitter_set_op(blitter
, ILO_BLITTER_RECTLIST_RESOLVE_HIZ
);
518 ilo_blitter_set_dsa(blitter
, &dsa_state
);
519 ilo_blitter_set_fb_from_resource(blitter
, res
, res
->format
, level
, slice
);
520 ilo_blitter_set_uses(blitter
,
521 ILO_BLITTER_USE_DSA
| ILO_BLITTER_USE_FB_DEPTH
);
523 hiz_set_rectlist(blitter
, false);
524 hiz_emit_rectlist(blitter
);