src/gallium/drivers/ilo/ilo_blitter_rectlist.c

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2014 LunarG, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Chia-I Wu <olv@lunarg.com>
  26  */
  27
  28 #include "util/u_draw.h"
  29 #include "util/u_pack_color.h"
  30
  31 #include "ilo_3d.h"
  32 #include "ilo_3d_pipeline.h"
  33 #include "ilo_builder_3d_top.h" /* for ve_init_cso_with_components() */
  34 #include "ilo_gpe_gen6.h" /* for zs_align_surface() */
  35 #include "ilo_blit.h"
  36 #include "ilo_gpe.h"
  37 #include "ilo_blitter.h"
  38
  39 /**
  40  * Set the states that are invariant between all ops.
  41  */
  42 static bool
  43 ilo_blitter_set_invariants(struct ilo_blitter *blitter)
  44 {
  45    struct pipe_screen *screen = blitter->ilo->base.screen;
  46    struct pipe_resource templ;
  47    struct pipe_vertex_element velems[2];
  48    struct pipe_viewport_state vp;
  49
  50    if (blitter->initialized)
  51       return true;
  52
  53    blitter->buffer.size = 4096;
  54
  55    /* allocate the vertex buffer */
  56    memset(&templ, 0, sizeof(templ));
  57    templ.target = PIPE_BUFFER;
  58    templ.width0 = blitter->buffer.size;
  59    templ.usage = PIPE_USAGE_STREAM;
  60    templ.bind = PIPE_BIND_VERTEX_BUFFER;
  61    blitter->buffer.res = screen->resource_create(screen, &templ);
  62    if (!blitter->buffer.res)
  63       return false;
  64
  65    /* do not increase reference count */
  66    blitter->vb.states[0].buffer = blitter->buffer.res;
  67
  68    /* only vertex X and Y */
  69    blitter->vb.states[0].stride = 2 * sizeof(float);
  70    blitter->vb.enabled_mask = 0x1;
  71    memset(&velems, 0, sizeof(velems));
  72    velems[1].src_format = PIPE_FORMAT_R32G32_FLOAT;
  73    ilo_gpe_init_ve(blitter->ilo->dev, 2, velems, &blitter->ve);
  74
  75    /* override first VE to be VUE header */
  76    ve_init_cso_with_components(blitter->ilo->dev,
  77          GEN6_VFCOMP_STORE_0, /* Reserved */
  78          GEN6_VFCOMP_STORE_0, /* Render Target Array Index */
  79          GEN6_VFCOMP_STORE_0, /* Viewport Index */
  80          GEN6_VFCOMP_STORE_0, /* Point Width */
  81          &blitter->ve.cso[0]);
  82
  83    /* a rectangle has 3 vertices in a RECTLIST */
  84    util_draw_init_info(&blitter->draw);
  85    blitter->draw.mode = ILO_PRIM_RECTANGLES;
  86    blitter->draw.count = 3;
  87
  88    /**
  89     * From the Haswell PRM, volume 7, page 615:
  90     *
  91     *     "The clear value must be between the min and max depth values
  92     *     (inclusive) defined in the CC_VIEWPORT."
  93     *
  94     * Even though clipping and viewport transformation will be disabled, we
  95     * still need to set up the viewport states.
  96     */
  97    memset(&vp, 0, sizeof(vp));
  98    vp.scale[0] = 1.0f;
  99    vp.scale[1] = 1.0f;
 100    vp.scale[2] = 1.0f;
 101    vp.scale[3] = 1.0f;
 102    ilo_gpe_set_viewport_cso(blitter->ilo->dev, &vp, &blitter->viewport);
 103
 104    blitter->initialized = true;
 105
 106    return true;
 107 }
 108
 109 static void
 110 ilo_blitter_set_op(struct ilo_blitter *blitter,
 111                    enum ilo_blitter_rectlist_op op)
 112 {
 113    blitter->op = op;
 114 }
 115
 116 /**
 117  * Set the rectangle primitive.
 118  */
 119 static void
 120 ilo_blitter_set_rectlist(struct ilo_blitter *blitter,
 121                          unsigned x, unsigned y,
 122                          unsigned width, unsigned height)
 123 {
 124    unsigned usage = PIPE_TRANSFER_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED;
 125    float vertices[3][2];
 126    struct pipe_box box;
 127
 128    /*
 129     * From the Sandy Bridge PRM, volume 2 part 1, page 11:
 130     *
 131     *     "(RECTLIST) A list of independent rectangles, where only 3 vertices
 132     *      are provided per rectangle object, with the fourth vertex implied
 133     *      by the definition of a rectangle. V0=LowerRight, V1=LowerLeft,
 134     *      V2=UpperLeft. Implied V3 = V0- V1+V2."
 135     */
 136    vertices[0][0] = (float) (x + width);
 137    vertices[0][1] = (float) (y + height);
 138    vertices[1][0] = (float) x;
 139    vertices[1][1] = (float) (y + height);
 140    vertices[2][0] = (float) x;
 141    vertices[2][1] = (float) y;
 142
 143    /* buffer is full */
 144    if (blitter->buffer.offset + sizeof(vertices) > blitter->buffer.size) {
 145       if (!ilo_buffer_rename_bo(ilo_buffer(blitter->buffer.res)))
 146          usage &= ~PIPE_TRANSFER_UNSYNCHRONIZED;
 147
 148       blitter->buffer.offset = 0;
 149    }
 150
 151    u_box_1d(blitter->buffer.offset, sizeof(vertices), &box);
 152
 153    blitter->ilo->base.transfer_inline_write(&blitter->ilo->base,
 154          blitter->buffer.res, 0, usage, &box, vertices, 0, 0);
 155
 156    blitter->vb.states[0].buffer_offset = blitter->buffer.offset;
 157    blitter->buffer.offset += sizeof(vertices);
 158 }
 159
 160 static void
 161 ilo_blitter_set_clear_values(struct ilo_blitter *blitter,
 162                              uint32_t depth, ubyte stencil)
 163 {
 164    blitter->depth_clear_value = depth;
 165    blitter->cc.stencil_ref.ref_value[0] = stencil;
 166 }
 167
 168 static void
 169 ilo_blitter_set_dsa(struct ilo_blitter *blitter,
 170                     const struct pipe_depth_stencil_alpha_state *state)
 171 {
 172    ilo_gpe_init_dsa(blitter->ilo->dev, state, &blitter->dsa);
 173 }
 174
 175 static void
 176 ilo_blitter_set_fb(struct ilo_blitter *blitter,
 177                    struct pipe_resource *res, unsigned level,
 178                    const struct ilo_surface_cso *cso)
 179 {
 180    struct ilo_texture *tex = ilo_texture(res);
 181
 182    blitter->fb.width = u_minify(tex->layout.width0, level);
 183    blitter->fb.height = u_minify(tex->layout.height0, level);
 184
 185    blitter->fb.num_samples = res->nr_samples;
 186    if (!blitter->fb.num_samples)
 187       blitter->fb.num_samples = 1;
 188
 189    memcpy(&blitter->fb.dst, cso, sizeof(*cso));
 190 }
 191
 192 static void
 193 ilo_blitter_set_fb_from_surface(struct ilo_blitter *blitter,
 194                                 struct pipe_surface *surf)
 195 {
 196    ilo_blitter_set_fb(blitter, surf->texture, surf->u.tex.level,
 197          (const struct ilo_surface_cso *) surf);
 198 }
 199
 200 static void
 201 ilo_blitter_set_fb_from_resource(struct ilo_blitter *blitter,
 202                                  struct pipe_resource *res,
 203                                  enum pipe_format format,
 204                                  unsigned level, unsigned slice)
 205 {
 206    struct pipe_surface templ, *surf;
 207
 208    memset(&templ, 0, sizeof(templ));
 209    templ.format = format;
 210    templ.u.tex.level = level;
 211    templ.u.tex.first_layer = slice;
 212    templ.u.tex.last_layer = slice;
 213
 214    /* if we did not call create_surface(), it would never fail */
 215    surf = blitter->ilo->base.create_surface(&blitter->ilo->base, res, &templ);
 216    assert(surf);
 217
 218    ilo_blitter_set_fb(blitter, res, level,
 219          (const struct ilo_surface_cso *) surf);
 220
 221    pipe_surface_reference(&surf, NULL);
 222 }
 223
 224 static void
 225 ilo_blitter_set_uses(struct ilo_blitter *blitter, uint32_t uses)
 226 {
 227    blitter->uses = uses;
 228 }
 229
 230 static void
 231 hiz_align_fb(struct ilo_blitter *blitter)
 232 {
 233    unsigned align_w, align_h;
 234
 235    switch (blitter->op) {
 236    case ILO_BLITTER_RECTLIST_CLEAR_ZS:
 237    case ILO_BLITTER_RECTLIST_RESOLVE_Z:
 238       break;
 239    default:
 240       return;
 241       break;
 242    }
 243
 244    /*
 245     * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
 246     *
 247     *     "A rectangle primitive representing the clear area is delivered. The
 248     *      primitive must adhere to the following restrictions on size:
 249     *
 250     *      - If Number of Multisamples is NUMSAMPLES_1, the rectangle must be
 251     *        aligned to an 8x4 pixel block relative to the upper left corner
 252     *        of the depth buffer, and contain an integer number of these pixel
 253     *        blocks, and all 8x4 pixels must be lit.
 254     *
 255     *      - If Number of Multisamples is NUMSAMPLES_4, the rectangle must be
 256     *        aligned to a 4x2 pixel block (8x4 sample block) relative to the
 257     *        upper left corner of the depth buffer, and contain an integer
 258     *        number of these pixel blocks, and all samples of the 4x2 pixels
 259     *        must be lit
 260     *
 261     *      - If Number of Multisamples is NUMSAMPLES_8, the rectangle must be
 262     *        aligned to a 2x2 pixel block (8x4 sample block) relative to the
 263     *        upper left corner of the depth buffer, and contain an integer
 264     *        number of these pixel blocks, and all samples of the 2x2 pixels
 265     *        must be list."
 266     *
 267     *     "The following is required when performing a depth buffer resolve:
 268     *
 269     *      - A rectangle primitive of the same size as the previous depth
 270     *        buffer clear operation must be delivered, and depth buffer state
 271     *        cannot have changed since the previous depth buffer clear
 272     *        operation."
 273     */
 274    switch (blitter->fb.num_samples) {
 275    case 1:
 276       align_w = 8;
 277       align_h = 4;
 278       break;
 279    case 2:
 280       align_w = 4;
 281       align_h = 4;
 282       break;
 283    case 4:
 284       align_w = 4;
 285       align_h = 2;
 286       break;
 287    case 8:
 288    default:
 289       align_w = 2;
 290       align_h = 2;
 291       break;
 292    }
 293
 294    if (blitter->fb.width % align_w || blitter->fb.height % align_h) {
 295       blitter->fb.width = align(blitter->fb.width, align_w);
 296       blitter->fb.height = align(blitter->fb.height, align_h);
 297
 298       assert(!blitter->fb.dst.is_rt);
 299       zs_align_surface(blitter->ilo->dev, align_w, align_h,
 300             &blitter->fb.dst.u.zs);
 301    }
 302 }
 303
 304 static void
 305 hiz_emit_rectlist(struct ilo_blitter *blitter)
 306 {
 307    struct ilo_3d *hw3d = blitter->ilo->hw3d;
 308    struct ilo_3d_pipeline *p = hw3d->pipeline;
 309
 310    hiz_align_fb(blitter);
 311
 312    ilo_blitter_set_rectlist(blitter, 0, 0,
 313          blitter->fb.width, blitter->fb.height);
 314
 315    ilo_3d_own_render_ring(hw3d);
 316
 317    /*
 318     * From the Sandy Bridge PRM, volume 2 part 1, page 313:
 319     *
 320     *     "If other rendering operations have preceded this clear, a
 321     *      PIPE_CONTROL with write cache flush enabled and Z-inhibit
 322     *      disabled must be issued before the rectangle primitive used for
 323     *      the depth buffer clear operation."
 324     *
 325     * From the Sandy Bridge PRM, volume 2 part 1, page 314:
 326     *
 327     *     "Depth buffer clear pass must be followed by a PIPE_CONTROL
 328     *      command with DEPTH_STALL bit set and Then followed by Depth
 329     *      FLUSH"
 330     *
 331     * But the pipeline has to be flushed both before and after not only
 332     * because of these workarounds.  We need them for reasons such as
 333     *
 334     *  - we may sample from a texture that was rendered to
 335     *  - we may sample from the fb shortly after
 336     */
 337    if (!ilo_cp_empty(p->cp))
 338       ilo_3d_pipeline_emit_flush(p);
 339
 340    ilo_3d_pipeline_emit_rectlist(p, blitter);
 341
 342    ilo_3d_pipeline_emit_flush(p);
 343 }
 344
 345 static bool
 346 hiz_can_clear_zs(const struct ilo_blitter *blitter,
 347                  const struct ilo_texture *tex)
 348 {
 349    /*
 350     * From the Sandy Bridge PRM, volume 2 part 1, page 314:
 351     *
 352     *     "Several cases exist where Depth Buffer Clear cannot be enabled (the
 353     *      legacy method of clearing must be performed):
 354     *
 355     *      - If the depth buffer format is D32_FLOAT_S8X24_UINT or
 356     *        D24_UNORM_S8_UINT.
 357     *
 358     *      - If stencil test is enabled but the separate stencil buffer is
 359     *        disabled.
 360     *
 361     *      - [DevSNB-A{W/A}]: ...
 362     *
 363     *      - [DevSNB{W/A}]: When depth buffer format is D16_UNORM and the
 364     *        width of the map (LOD0) is not multiple of 16, fast clear
 365     *        optimization must be disabled."
 366     *
 367     * From the Ivy Bridge PRM, volume 2 part 1, page 313:
 368     *
 369     *     "Several cases exist where Depth Buffer Clear cannot be enabled (the
 370     *      legacy method of clearing must be performed):
 371     *
 372     *      - If the depth buffer format is D32_FLOAT_S8X24_UINT or
 373     *        D24_UNORM_S8_UINT.
 374     *
 375     *      - If stencil test is enabled but the separate stencil buffer is
 376     *        disabled."
 377     *
 378     * The truth is when HiZ is enabled, separate stencil is also enabled on
 379     * all GENs.  The depth buffer format cannot be combined depth/stencil.
 380     */
 381    switch (tex->layout.format) {
 382    case PIPE_FORMAT_Z16_UNORM:
 383       if (ilo_dev_gen(blitter->ilo->dev) == ILO_GEN(6) &&
 384           tex->base.width0 % 16)
 385          return false;
 386       break;
 387    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 388    case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 389       assert(!"HiZ with combined depth/stencil");
 390       return false;
 391       break;
 392    default:
 393       break;
 394    }
 395
 396    return true;
 397 }
 398
 399 bool
 400 ilo_blitter_rectlist_clear_zs(struct ilo_blitter *blitter,
 401                               struct pipe_surface *zs,
 402                               unsigned clear_flags,
 403                               double depth, unsigned stencil)
 404 {
 405    struct ilo_texture *tex = ilo_texture(zs->texture);
 406    struct pipe_depth_stencil_alpha_state dsa_state;
 407    uint32_t uses, clear_value;
 408
 409    if (!ilo_texture_can_enable_hiz(tex,
 410             zs->u.tex.level, zs->u.tex.first_layer,
 411             zs->u.tex.last_layer - zs->u.tex.first_layer + 1))
 412       return false;
 413
 414    if (!hiz_can_clear_zs(blitter, tex))
 415       return false;
 416
 417    clear_value = util_pack_z(tex->layout.format, depth);
 418
 419    ilo_blit_resolve_surface(blitter->ilo, zs,
 420          ILO_TEXTURE_RENDER_WRITE | ILO_TEXTURE_CLEAR);
 421    ilo_texture_set_slice_clear_value(tex, zs->u.tex.level,
 422          zs->u.tex.first_layer,
 423          zs->u.tex.last_layer - zs->u.tex.first_layer + 1,
 424          clear_value);
 425
 426    /*
 427     * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
 428     *
 429     *     "- Depth Test Enable must be disabled and Depth Buffer Write Enable
 430     *        must be enabled (if depth is being cleared).
 431     *
 432     *      - Stencil buffer clear can be performed at the same time by
 433     *        enabling Stencil Buffer Write Enable.  Stencil Test Enable must
 434     *        be enabled and Stencil Pass Depth Pass Op set to REPLACE, and the
 435     *        clear value that is placed in the stencil buffer is the Stencil
 436     *        Reference Value from COLOR_CALC_STATE.
 437     *
 438     *      - Note also that stencil buffer clear can be performed without
 439     *        depth buffer clear. For stencil only clear, Depth Test Enable and
 440     *        Depth Buffer Write Enable must be disabled.
 441     *
 442     *      - [DevSNB] errata: For stencil buffer only clear, the previous
 443     *        depth clear value must be delivered during the clear."
 444     */
 445    memset(&dsa_state, 0, sizeof(dsa_state));
 446
 447    if (clear_flags & PIPE_CLEAR_DEPTH)
 448       dsa_state.depth.writemask = true;
 449
 450    if (clear_flags & PIPE_CLEAR_STENCIL) {
 451       dsa_state.stencil[0].enabled = true;
 452       dsa_state.stencil[0].func = PIPE_FUNC_ALWAYS;
 453       dsa_state.stencil[0].fail_op = PIPE_STENCIL_OP_KEEP;
 454       dsa_state.stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
 455       dsa_state.stencil[0].zfail_op = PIPE_STENCIL_OP_KEEP;
 456
 457       /*
 458        * From the Ivy Bridge PRM, volume 2 part 1, page 277:
 459        *
 460        *     "Additionally the following must be set to the correct values.
 461        *
 462        *      - DEPTH_STENCIL_STATE::Stencil Write Mask must be 0xFF
 463        *      - DEPTH_STENCIL_STATE::Stencil Test Mask must be 0xFF
 464        *      - DEPTH_STENCIL_STATE::Back Face Stencil Write Mask must be 0xFF
 465        *      - DEPTH_STENCIL_STATE::Back Face Stencil Test Mask must be 0xFF"
 466        */
 467       dsa_state.stencil[0].valuemask = 0xff;
 468       dsa_state.stencil[0].writemask = 0xff;
 469       dsa_state.stencil[1].valuemask = 0xff;
 470       dsa_state.stencil[1].writemask = 0xff;
 471    }
 472
 473    ilo_blitter_set_invariants(blitter);
 474    ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_CLEAR_ZS);
 475
 476    ilo_blitter_set_dsa(blitter, &dsa_state);
 477    ilo_blitter_set_clear_values(blitter, clear_value, (ubyte) stencil);
 478    ilo_blitter_set_fb_from_surface(blitter, zs);
 479
 480    uses = ILO_BLITTER_USE_DSA;
 481    if (clear_flags & PIPE_CLEAR_DEPTH)
 482       uses |= ILO_BLITTER_USE_VIEWPORT | ILO_BLITTER_USE_FB_DEPTH;
 483    if (clear_flags & PIPE_CLEAR_STENCIL)
 484       uses |= ILO_BLITTER_USE_CC | ILO_BLITTER_USE_FB_STENCIL;
 485    ilo_blitter_set_uses(blitter, uses);
 486
 487    hiz_emit_rectlist(blitter);
 488
 489    return true;
 490 }
 491
 492 void
 493 ilo_blitter_rectlist_resolve_z(struct ilo_blitter *blitter,
 494                                struct pipe_resource *res,
 495                                unsigned level, unsigned slice)
 496 {
 497    struct ilo_texture *tex = ilo_texture(res);
 498    struct pipe_depth_stencil_alpha_state dsa_state;
 499    const struct ilo_texture_slice *s =
 500       ilo_texture_get_slice(tex, level, slice);
 501
 502    if (!ilo_texture_can_enable_hiz(tex, level, slice, 1))
 503       return;
 504
 505    /*
 506     * From the Sandy Bridge PRM, volume 2 part 1, page 314:
 507     *
 508     *     "Depth Test Enable must be enabled with the Depth Test Function set
 509     *      to NEVER. Depth Buffer Write Enable must be enabled. Stencil Test
 510     *      Enable and Stencil Buffer Write Enable must be disabled."
 511     */
 512    memset(&dsa_state, 0, sizeof(dsa_state));
 513    dsa_state.depth.writemask = true;
 514    dsa_state.depth.enabled = true;
 515    dsa_state.depth.func = PIPE_FUNC_NEVER;
 516
 517    ilo_blitter_set_invariants(blitter);
 518    ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_RESOLVE_Z);
 519
 520    ilo_blitter_set_dsa(blitter, &dsa_state);
 521    ilo_blitter_set_clear_values(blitter, s->clear_value, 0);
 522    ilo_blitter_set_fb_from_resource(blitter, res, res->format, level, slice);
 523    ilo_blitter_set_uses(blitter,
 524          ILO_BLITTER_USE_DSA | ILO_BLITTER_USE_FB_DEPTH);
 525
 526    hiz_emit_rectlist(blitter);
 527 }
 528
 529 void
 530 ilo_blitter_rectlist_resolve_hiz(struct ilo_blitter *blitter,
 531                                  struct pipe_resource *res,
 532                                  unsigned level, unsigned slice)
 533 {
 534    struct ilo_texture *tex = ilo_texture(res);
 535    struct pipe_depth_stencil_alpha_state dsa_state;
 536
 537    if (!ilo_texture_can_enable_hiz(tex, level, slice, 1))
 538       return;
 539
 540    /*
 541     * From the Sandy Bridge PRM, volume 2 part 1, page 315:
 542     *
 543     *     "(Hierarchical Depth Buffer Resolve) Depth Test Enable must be
 544     *      disabled. Depth Buffer Write Enable must be enabled. Stencil Test
 545     *      Enable and Stencil Buffer Write Enable must be disabled."
 546     */
 547    memset(&dsa_state, 0, sizeof(dsa_state));
 548    dsa_state.depth.writemask = true;
 549
 550    ilo_blitter_set_invariants(blitter);
 551    ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_RESOLVE_HIZ);
 552
 553    ilo_blitter_set_dsa(blitter, &dsa_state);
 554    ilo_blitter_set_fb_from_resource(blitter, res, res->format, level, slice);
 555    ilo_blitter_set_uses(blitter,
 556          ILO_BLITTER_USE_DSA | ILO_BLITTER_USE_FB_DEPTH);
 557
 558    hiz_emit_rectlist(blitter);
 559 }