src/gallium/drivers/ilo/ilo_builder_3d_bottom.h

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2014 LunarG, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Chia-I Wu <olv@lunarg.com>
  26  */
  27
  28 #ifndef ILO_BUILDER_3D_BOTTOM_H
  29 #define ILO_BUILDER_3D_BOTTOM_H
  30
  31 #include "genhw/genhw.h"
  32 #include "intel_winsys.h"
  33
  34 #include "ilo_common.h"
  35 #include "ilo_format.h"
  36 #include "ilo_shader.h"
  37 #include "ilo_builder.h"
  38 #include "ilo_builder_3d_top.h"
  39
  40 static inline void
  41 gen6_3DSTATE_CLIP(struct ilo_builder *builder,
  42                   const struct ilo_rasterizer_state *rasterizer,
  43                   const struct ilo_shader_state *fs,
  44                   bool enable_guardband,
  45                   int num_viewports)
  46 {
  47    const uint8_t cmd_len = 4;
  48    uint32_t dw1, dw2, dw3, *dw;
  49    int interps;
  50
  51    ILO_DEV_ASSERT(builder->dev, 6, 8);
  52
  53    dw1 = rasterizer->clip.payload[0];
  54    dw2 = rasterizer->clip.payload[1];
  55    dw3 = rasterizer->clip.payload[2];
  56
  57    if (enable_guardband && rasterizer->clip.can_enable_guardband)
  58       dw2 |= GEN6_CLIP_DW2_GB_TEST_ENABLE;
  59
  60    interps = (fs) ?  ilo_shader_get_kernel_param(fs,
  61          ILO_KERNEL_FS_BARYCENTRIC_INTERPOLATIONS) : 0;
  62
  63    if (interps & (GEN6_INTERP_NONPERSPECTIVE_PIXEL |
  64                   GEN6_INTERP_NONPERSPECTIVE_CENTROID |
  65                   GEN6_INTERP_NONPERSPECTIVE_SAMPLE))
  66       dw2 |= GEN6_CLIP_DW2_NONPERSPECTIVE_BARYCENTRIC_ENABLE;
  67
  68    dw3 |= GEN6_CLIP_DW3_RTAINDEX_FORCED_ZERO |
  69           (num_viewports - 1);
  70
  71    ilo_builder_batch_pointer(builder, cmd_len, &dw);
  72
  73    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CLIP) | (cmd_len - 2);
  74    dw[1] = dw1;
  75    dw[2] = dw2;
  76    dw[3] = dw3;
  77 }
  78
  79 static inline void
  80 gen6_disable_3DSTATE_CLIP(struct ilo_builder *builder)
  81 {
  82    const uint8_t cmd_len = 4;
  83    uint32_t *dw;
  84
  85    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
  86
  87    ilo_builder_batch_pointer(builder, cmd_len, &dw);
  88
  89    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CLIP) | (cmd_len - 2);
  90    dw[1] = 0;
  91    dw[2] = 0;
  92    dw[3] = 0;
  93 }
  94
  95 static inline void
  96 gen7_internal_3dstate_sf(struct ilo_builder *builder,
  97                          uint8_t cmd_len, uint32_t *dw,
  98                          const struct ilo_rasterizer_sf *sf,
  99                          int num_samples)
 100 {
 101    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
 102
 103    assert(cmd_len == 7);
 104
 105    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SF) | (cmd_len - 2);
 106
 107    if (!sf) {
 108       dw[1] = 0;
 109       dw[2] = (num_samples > 1) ? GEN7_SF_DW2_MSRASTMODE_ON_PATTERN : 0;
 110       dw[3] = 0;
 111       dw[4] = 0;
 112       dw[5] = 0;
 113       dw[6] = 0;
 114
 115       return;
 116    }
 117
 118    /* see rasterizer_init_sf_gen6() */
 119    STATIC_ASSERT(Elements(sf->payload) >= 3);
 120    dw[1] = sf->payload[0];
 121    dw[2] = sf->payload[1];
 122    dw[3] = sf->payload[2];
 123
 124    if (num_samples > 1)
 125       dw[2] |= sf->dw_msaa;
 126
 127    dw[4] = sf->dw_depth_offset_const;
 128    dw[5] = sf->dw_depth_offset_scale;
 129    dw[6] = sf->dw_depth_offset_clamp;
 130 }
 131
 132 static inline void
 133 gen8_internal_3dstate_sbe(struct ilo_builder *builder,
 134                           uint8_t cmd_len, uint32_t *dw,
 135                           const struct ilo_shader_state *fs,
 136                           int sprite_coord_mode)
 137 {
 138    const struct ilo_kernel_routing *routing;
 139    int vue_offset, vue_len, out_count;
 140
 141    ILO_DEV_ASSERT(builder->dev, 6, 8);
 142
 143    assert(cmd_len == 4);
 144
 145    dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SBE) | (cmd_len - 2);
 146
 147    if (!fs) {
 148       dw[1] = 1 << GEN7_SBE_DW1_URB_READ_LEN__SHIFT;
 149       dw[2] = 0;
 150       dw[3] = 0;
 151       return;
 152    }
 153
 154    routing = ilo_shader_get_kernel_routing(fs);
 155
 156    vue_offset = routing->source_skip;
 157    assert(vue_offset % 2 == 0);
 158    vue_offset /= 2;
 159
 160    vue_len = (routing->source_len + 1) / 2;
 161    if (!vue_len)
 162       vue_len = 1;
 163
 164    out_count = ilo_shader_get_kernel_param(fs, ILO_KERNEL_INPUT_COUNT);
 165    assert(out_count <= 32);
 166
 167    dw[1] = out_count << GEN7_SBE_DW1_ATTR_COUNT__SHIFT |
 168            vue_len << GEN7_SBE_DW1_URB_READ_LEN__SHIFT;
 169
 170    if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
 171       dw[1] |= GEN8_SBE_DW1_USE_URB_READ_LEN |
 172                GEN8_SBE_DW1_USE_URB_READ_OFFSET |
 173                vue_offset << GEN8_SBE_DW1_URB_READ_OFFSET__SHIFT;
 174    } else {
 175       dw[1] |= vue_offset << GEN7_SBE_DW1_URB_READ_OFFSET__SHIFT;
 176    }
 177
 178    if (routing->swizzle_enable)
 179       dw[1] |= GEN7_SBE_DW1_ATTR_SWIZZLE_ENABLE;
 180
 181    switch (sprite_coord_mode) {
 182    case PIPE_SPRITE_COORD_UPPER_LEFT:
 183       dw[1] |= GEN7_SBE_DW1_POINT_SPRITE_TEXCOORD_UPPERLEFT;
 184       break;
 185    case PIPE_SPRITE_COORD_LOWER_LEFT:
 186       dw[1] |= GEN7_SBE_DW1_POINT_SPRITE_TEXCOORD_LOWERLEFT;
 187       break;
 188    }
 189
 190    /*
 191     * From the Ivy Bridge PRM, volume 2 part 1, page 268:
 192     *
 193     *     "This field (Point Sprite Texture Coordinate Enable) must be
 194     *      programmed to 0 when non-point primitives are rendered."
 195     *
 196     * TODO We do not check that yet.
 197     */
 198    dw[2] = routing->point_sprite_enable;
 199
 200    dw[3] = routing->const_interp_enable;
 201 }
 202
 203 static inline void
 204 gen8_internal_3dstate_sbe_swiz(struct ilo_builder *builder,
 205                                uint8_t cmd_len, uint32_t *dw,
 206                                const struct ilo_shader_state *fs)
 207 {
 208    const struct ilo_kernel_routing *routing;
 209
 210    ILO_DEV_ASSERT(builder->dev, 6, 8);
 211
 212    assert(cmd_len == 11);
 213
 214    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_SBE_SWIZ) | (cmd_len - 2);
 215
 216    if (!fs) {
 217       memset(&dw[1], 0, sizeof(*dw) * (cmd_len - 1));
 218       return;
 219    }
 220
 221    routing = ilo_shader_get_kernel_routing(fs);
 222
 223    STATIC_ASSERT(sizeof(routing->swizzles) >= sizeof(*dw) * 8);
 224    memcpy(&dw[1], routing->swizzles, sizeof(*dw) * 8);
 225
 226    /* WrapShortest enables */
 227    dw[9] = 0;
 228    dw[10] = 0;
 229 }
 230
 231 static inline void
 232 gen6_3DSTATE_SF(struct ilo_builder *builder,
 233                 const struct ilo_rasterizer_state *rasterizer,
 234                 const struct ilo_shader_state *fs,
 235                 int sample_count)
 236 {
 237    const uint8_t cmd_len = 20;
 238    uint32_t gen8_3dstate_sbe[4], gen8_3dstate_sbe_swiz[11];
 239    uint32_t gen7_3dstate_sf[7];
 240    const struct ilo_rasterizer_sf *sf;
 241    int sprite_coord_mode;
 242    uint32_t *dw;
 243
 244    ILO_DEV_ASSERT(builder->dev, 6, 6);
 245
 246    sf = (rasterizer) ? &rasterizer->sf : NULL;
 247    sprite_coord_mode = (rasterizer) ? rasterizer->state.sprite_coord_mode : 0;
 248
 249    gen8_internal_3dstate_sbe(builder, Elements(gen8_3dstate_sbe),
 250          gen8_3dstate_sbe, fs, sprite_coord_mode);
 251    gen8_internal_3dstate_sbe_swiz(builder, Elements(gen8_3dstate_sbe_swiz),
 252          gen8_3dstate_sbe_swiz, fs);
 253    gen7_internal_3dstate_sf(builder, Elements(gen7_3dstate_sf),
 254          gen7_3dstate_sf, sf, sample_count);
 255
 256    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 257
 258    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SF) | (cmd_len - 2);
 259    dw[1] = gen8_3dstate_sbe[1];
 260    memcpy(&dw[2], &gen7_3dstate_sf[1], sizeof(*dw) * 6);
 261    memcpy(&dw[8], &gen8_3dstate_sbe_swiz[1], sizeof(*dw) * 8);
 262    dw[16] = gen8_3dstate_sbe[2];
 263    dw[17] = gen8_3dstate_sbe[3];
 264    dw[18] = gen8_3dstate_sbe_swiz[9];
 265    dw[19] = gen8_3dstate_sbe_swiz[10];
 266 }
 267
 268 static inline void
 269 gen7_3DSTATE_SF(struct ilo_builder *builder,
 270                 const struct ilo_rasterizer_sf *sf,
 271                 enum pipe_format zs_format,
 272                 int sample_count)
 273 {
 274    const uint8_t cmd_len = 7;
 275    uint32_t *dw;
 276
 277    ILO_DEV_ASSERT(builder->dev, 7, 7.5);
 278
 279    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 280
 281    gen7_internal_3dstate_sf(builder, cmd_len, dw, sf, sample_count);
 282
 283    if (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) {
 284       int hw_format;
 285
 286       /* separate stencil */
 287       switch (zs_format) {
 288       case PIPE_FORMAT_Z16_UNORM:
 289          hw_format = GEN6_ZFORMAT_D16_UNORM;
 290          break;
 291       case PIPE_FORMAT_Z32_FLOAT:
 292       case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 293          hw_format = GEN6_ZFORMAT_D32_FLOAT;
 294          break;
 295       case PIPE_FORMAT_Z24X8_UNORM:
 296       case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 297          hw_format = GEN6_ZFORMAT_D24_UNORM_X8_UINT;
 298          break;
 299       default:
 300          /* FLOAT surface is assumed when there is no depth buffer */
 301          hw_format = GEN6_ZFORMAT_D32_FLOAT;
 302          break;
 303       }
 304
 305       dw[1] |= hw_format << GEN7_SF_DW1_DEPTH_FORMAT__SHIFT;
 306    }
 307 }
 308
 309 static inline void
 310 gen8_3DSTATE_SF(struct ilo_builder *builder,
 311                 const struct ilo_rasterizer_sf *sf)
 312 {
 313    const uint8_t cmd_len = 4;
 314    uint32_t *dw;
 315
 316    ILO_DEV_ASSERT(builder->dev, 8, 8);
 317
 318    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 319
 320    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SF) | (cmd_len - 2);
 321
 322    /* see rasterizer_init_sf_gen8() */
 323    STATIC_ASSERT(Elements(sf->payload) >= 3);
 324    dw[1] = sf->payload[0];
 325    dw[2] = sf->payload[1];
 326    dw[3] = sf->payload[2];
 327 }
 328
 329 static inline void
 330 gen7_3DSTATE_SBE(struct ilo_builder *builder,
 331                  const struct ilo_shader_state *fs,
 332                  int sprite_coord_mode)
 333 {
 334    const uint8_t cmd_len = 14;
 335    uint32_t gen8_3dstate_sbe[4], gen8_3dstate_sbe_swiz[11];
 336    uint32_t *dw;
 337
 338    ILO_DEV_ASSERT(builder->dev, 7, 7.5);
 339
 340    gen8_internal_3dstate_sbe(builder, Elements(gen8_3dstate_sbe),
 341          gen8_3dstate_sbe, fs, sprite_coord_mode);
 342    gen8_internal_3dstate_sbe_swiz(builder, Elements(gen8_3dstate_sbe_swiz),
 343          gen8_3dstate_sbe_swiz, fs);
 344
 345    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 346
 347    dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SBE) | (cmd_len - 2);
 348    dw[1] = gen8_3dstate_sbe[1];
 349    memcpy(&dw[2], &gen8_3dstate_sbe_swiz[1], sizeof(*dw) * 8);
 350    dw[10] = gen8_3dstate_sbe[2];
 351    dw[11] = gen8_3dstate_sbe[3];
 352    dw[12] = gen8_3dstate_sbe_swiz[9];
 353    dw[13] = gen8_3dstate_sbe_swiz[10];
 354 }
 355
 356 static inline void
 357 gen8_3DSTATE_SBE(struct ilo_builder *builder,
 358                  const struct ilo_shader_state *fs,
 359                  int sprite_coord_mode)
 360 {
 361    const uint8_t cmd_len = 4;
 362    uint32_t *dw;
 363
 364    ILO_DEV_ASSERT(builder->dev, 8, 8);
 365
 366    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 367
 368    gen8_internal_3dstate_sbe(builder, cmd_len, dw, fs, sprite_coord_mode);
 369 }
 370
 371 static inline void
 372 gen8_3DSTATE_SBE_SWIZ(struct ilo_builder *builder,
 373                       const struct ilo_shader_state *fs)
 374 {
 375    const uint8_t cmd_len = 11;
 376    uint32_t *dw;
 377
 378    ILO_DEV_ASSERT(builder->dev, 8, 8);
 379
 380    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 381
 382    gen8_internal_3dstate_sbe_swiz(builder, cmd_len, dw, fs);
 383 }
 384
 385 static inline void
 386 gen8_3DSTATE_RASTER(struct ilo_builder *builder,
 387                     const struct ilo_rasterizer_sf *sf)
 388 {
 389    const uint8_t cmd_len = 5;
 390    uint32_t *dw;
 391
 392    ILO_DEV_ASSERT(builder->dev, 8, 8);
 393
 394    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 395
 396    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_RASTER) | (cmd_len - 2);
 397    dw[1] = sf->dw_raster;
 398    dw[2] = sf->dw_depth_offset_const;
 399    dw[3] = sf->dw_depth_offset_scale;
 400    dw[4] = sf->dw_depth_offset_clamp;
 401 }
 402
 403 static inline void
 404 gen6_3DSTATE_WM(struct ilo_builder *builder,
 405                 const struct ilo_shader_state *fs,
 406                 const struct ilo_rasterizer_state *rasterizer,
 407                 bool dual_blend, bool cc_may_kill)
 408 {
 409    const uint8_t cmd_len = 9;
 410    const int num_samples = 1;
 411    const struct ilo_shader_cso *cso;
 412    uint32_t dw2, dw4, dw5, dw6, *dw;
 413
 414    ILO_DEV_ASSERT(builder->dev, 6, 6);
 415
 416    cso = ilo_shader_get_kernel_cso(fs);
 417    dw2 = cso->payload[0];
 418    dw4 = cso->payload[1];
 419    dw5 = cso->payload[2];
 420    dw6 = cso->payload[3];
 421
 422    /*
 423     * From the Sandy Bridge PRM, volume 2 part 1, page 248:
 424     *
 425     *     "This bit (Statistics Enable) must be disabled if either of these
 426     *      bits is set: Depth Buffer Clear , Hierarchical Depth Buffer Resolve
 427     *      Enable or Depth Buffer Resolve Enable."
 428     */
 429    dw4 |= GEN6_WM_DW4_STATISTICS;
 430
 431    if (cc_may_kill)
 432       dw5 |= GEN6_WM_DW5_PS_KILL_PIXEL | GEN6_WM_DW5_PS_DISPATCH_ENABLE;
 433
 434    if (dual_blend)
 435       dw5 |= GEN6_WM_DW5_PS_DUAL_SOURCE_BLEND;
 436
 437    dw5 |= rasterizer->wm.payload[0];
 438
 439    dw6 |= rasterizer->wm.payload[1];
 440
 441    if (num_samples > 1) {
 442       dw6 |= rasterizer->wm.dw_msaa_rast |
 443              rasterizer->wm.dw_msaa_disp;
 444    }
 445
 446    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 447
 448    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
 449    dw[1] = ilo_shader_get_kernel_offset(fs);
 450    dw[2] = dw2;
 451    dw[3] = 0; /* scratch */
 452    dw[4] = dw4;
 453    dw[5] = dw5;
 454    dw[6] = dw6;
 455    dw[7] = 0; /* kernel 1 */
 456    dw[8] = 0; /* kernel 2 */
 457 }
 458
 459 static inline void
 460 gen6_hiz_3DSTATE_WM(struct ilo_builder *builder, uint32_t hiz_op)
 461 {
 462    const uint8_t cmd_len = 9;
 463    const int max_threads = (builder->dev->gt == 2) ? 80 : 40;
 464    uint32_t *dw;
 465
 466    ILO_DEV_ASSERT(builder->dev, 6, 6);
 467
 468    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 469
 470    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
 471    dw[1] = 0;
 472    dw[2] = 0;
 473    dw[3] = 0;
 474    dw[4] = hiz_op;
 475    /* honor the valid range even if dispatching is disabled */
 476    dw[5] = (max_threads - 1) << GEN6_WM_DW5_MAX_THREADS__SHIFT;
 477    dw[6] = 0;
 478    dw[7] = 0;
 479    dw[8] = 0;
 480 }
 481
 482 static inline void
 483 gen7_3DSTATE_WM(struct ilo_builder *builder,
 484                 const struct ilo_shader_state *fs,
 485                 const struct ilo_rasterizer_state *rasterizer,
 486                 bool cc_may_kill)
 487 {
 488    const uint8_t cmd_len = 3;
 489    const int num_samples = 1;
 490    const struct ilo_shader_cso *cso;
 491    uint32_t dw1, dw2, *dw;
 492
 493    ILO_DEV_ASSERT(builder->dev, 7, 7.5);
 494
 495    /* see rasterizer_init_wm_gen7() */
 496    dw1 = rasterizer->wm.payload[0];
 497    dw2 = rasterizer->wm.payload[1];
 498
 499    /* see fs_init_cso_gen7() */
 500    cso = ilo_shader_get_kernel_cso(fs);
 501    dw1 |= cso->payload[3];
 502
 503    dw1 |= GEN7_WM_DW1_STATISTICS;
 504
 505    if (cc_may_kill)
 506       dw1 |= GEN7_WM_DW1_PS_DISPATCH_ENABLE | GEN7_WM_DW1_PS_KILL_PIXEL;
 507
 508    if (num_samples > 1) {
 509       dw1 |= rasterizer->wm.dw_msaa_rast;
 510       dw2 |= rasterizer->wm.dw_msaa_disp;
 511    }
 512
 513    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 514
 515    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
 516    dw[1] = dw1;
 517    dw[2] = dw2;
 518 }
 519
 520 static inline void
 521 gen8_3DSTATE_WM(struct ilo_builder *builder,
 522                 const struct ilo_shader_state *fs,
 523                 const struct ilo_rasterizer_state *rasterizer)
 524 {
 525    const uint8_t cmd_len = 2;
 526    const struct ilo_shader_cso *cso;
 527    uint32_t dw1, interps, *dw;
 528
 529    ILO_DEV_ASSERT(builder->dev, 8, 8);
 530
 531    /* see rasterizer_get_wm_gen8() */
 532    dw1 = rasterizer->wm.payload[0];
 533    dw1 |= GEN7_WM_DW1_STATISTICS;
 534
 535    /* see fs_init_cso_gen8() */
 536    cso = ilo_shader_get_kernel_cso(fs);
 537    interps = cso->payload[4];
 538
 539    assert(!(dw1 & interps));
 540
 541    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 542
 543    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
 544    dw[1] = dw1 | interps;
 545 }
 546
 547 static inline void
 548 gen7_hiz_3DSTATE_WM(struct ilo_builder *builder, uint32_t hiz_op)
 549 {
 550    const uint8_t cmd_len = 3;
 551    uint32_t *dw;
 552
 553    ILO_DEV_ASSERT(builder->dev, 7, 7.5);
 554
 555    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 556    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
 557    dw[1] = hiz_op;
 558    dw[2] = 0;
 559 }
 560
 561 static inline void
 562 gen8_3DSTATE_WM_DEPTH_STENCIL(struct ilo_builder *builder,
 563                               const struct ilo_dsa_state *dsa)
 564 {
 565    const uint8_t cmd_len = 3;
 566    uint32_t dw1, dw2, *dw;
 567
 568    ILO_DEV_ASSERT(builder->dev, 8, 8);
 569
 570    dw1 = dsa->payload[0];
 571    dw2 = dsa->payload[1];
 572
 573    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 574
 575    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_WM_DEPTH_STENCIL) | (cmd_len - 2);
 576    dw[1] = dw1;
 577    dw[2] = dw2;
 578 }
 579
 580 static inline void
 581 gen8_3DSTATE_WM_HZ_OP(struct ilo_builder *builder, uint32_t op,
 582                       uint16_t width, uint16_t height, int sample_count)
 583 {
 584    const uint8_t cmd_len = 5;
 585    const uint32_t sample_mask = ((1 << sample_count) - 1) | 0x1;
 586    uint32_t dw1, *dw;
 587
 588    ILO_DEV_ASSERT(builder->dev, 8, 8);
 589
 590    dw1 = op;
 591
 592    switch (sample_count) {
 593    case 0:
 594    case 1:
 595       dw1 |= GEN8_WM_HZ_DW1_NUMSAMPLES_1;
 596       break;
 597    case 2:
 598       dw1 |= GEN8_WM_HZ_DW1_NUMSAMPLES_2;
 599       break;
 600    case 4:
 601       dw1 |= GEN8_WM_HZ_DW1_NUMSAMPLES_4;
 602       break;
 603    case 8:
 604       dw1 |= GEN8_WM_HZ_DW1_NUMSAMPLES_8;
 605       break;
 606    case 16:
 607       dw1 |= GEN8_WM_HZ_DW1_NUMSAMPLES_16;
 608       break;
 609    default:
 610       assert(!"unsupported sample count");
 611       dw1 |= GEN8_WM_HZ_DW1_NUMSAMPLES_1;
 612       break;
 613    }
 614
 615    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 616
 617    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_WM_HZ_OP) | (cmd_len - 2);
 618    dw[1] = dw1;
 619    dw[2] = 0;
 620    /* exclusive? */
 621    dw[3] = height << 16 | width;
 622    dw[4] = sample_mask;
 623 }
 624
 625 static inline void
 626 gen8_disable_3DSTATE_WM_HZ_OP(struct ilo_builder *builder)
 627 {
 628    const uint8_t cmd_len = 5;
 629    uint32_t *dw;
 630
 631    ILO_DEV_ASSERT(builder->dev, 8, 8);
 632
 633    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 634
 635    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_WM_HZ_OP) | (cmd_len - 2);
 636    dw[1] = 0;
 637    dw[2] = 0;
 638    dw[3] = 0;
 639    dw[4] = 0;
 640 }
 641
 642 static inline void
 643 gen8_3DSTATE_WM_CHROMAKEY(struct ilo_builder *builder)
 644 {
 645    const uint8_t cmd_len = 2;
 646    uint32_t *dw;
 647
 648    ILO_DEV_ASSERT(builder->dev, 8, 8);
 649
 650    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 651
 652    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_WM_CHROMAKEY) | (cmd_len - 2);
 653    dw[1] = 0;
 654 }
 655
 656 static inline void
 657 gen7_3DSTATE_PS(struct ilo_builder *builder,
 658                 const struct ilo_shader_state *fs,
 659                 bool dual_blend)
 660 {
 661    const uint8_t cmd_len = 8;
 662    const struct ilo_shader_cso *cso;
 663    uint32_t dw2, dw4, dw5, *dw;
 664
 665    ILO_DEV_ASSERT(builder->dev, 7, 7.5);
 666
 667    /* see fs_init_cso_gen7() */
 668    cso = ilo_shader_get_kernel_cso(fs);
 669    dw2 = cso->payload[0];
 670    dw4 = cso->payload[1];
 671    dw5 = cso->payload[2];
 672
 673    if (dual_blend)
 674       dw4 |= GEN7_PS_DW4_DUAL_SOURCE_BLEND;
 675
 676    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 677
 678    dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
 679    dw[1] = ilo_shader_get_kernel_offset(fs);
 680    dw[2] = dw2;
 681    dw[3] = 0; /* scratch */
 682    dw[4] = dw4;
 683    dw[5] = dw5;
 684    dw[6] = 0; /* kernel 1 */
 685    dw[7] = 0; /* kernel 2 */
 686 }
 687
 688 static inline void
 689 gen7_disable_3DSTATE_PS(struct ilo_builder *builder)
 690 {
 691    const uint8_t cmd_len = 8;
 692    int max_threads;
 693    uint32_t dw4, *dw;
 694
 695    ILO_DEV_ASSERT(builder->dev, 7, 7.5);
 696
 697    /* GPU hangs if none of the dispatch enable bits is set */
 698    dw4 = GEN6_PS_DISPATCH_8 << GEN7_PS_DW4_DISPATCH_MODE__SHIFT;
 699
 700    /* see brwCreateContext() */
 701    switch (ilo_dev_gen(builder->dev)) {
 702    case ILO_GEN(7.5):
 703       max_threads = (builder->dev->gt == 3) ? 408 :
 704                     (builder->dev->gt == 2) ? 204 : 102;
 705       dw4 |= (max_threads - 1) << GEN75_PS_DW4_MAX_THREADS__SHIFT;
 706       break;
 707    case ILO_GEN(7):
 708    default:
 709       max_threads = (builder->dev->gt == 2) ? 172 : 48;
 710       dw4 |= (max_threads - 1) << GEN7_PS_DW4_MAX_THREADS__SHIFT;
 711       break;
 712    }
 713
 714    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 715
 716    dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
 717    dw[1] = 0;
 718    dw[2] = 0;
 719    dw[3] = 0;
 720    dw[4] = dw4;
 721    dw[5] = 0;
 722    dw[6] = 0;
 723    dw[7] = 0;
 724 }
 725
 726 static inline void
 727 gen8_3DSTATE_PS(struct ilo_builder *builder,
 728                 const struct ilo_shader_state *fs)
 729 {
 730    const uint8_t cmd_len = 12;
 731    const struct ilo_shader_cso *cso;
 732    uint32_t dw3, dw6, dw7, *dw;
 733
 734    ILO_DEV_ASSERT(builder->dev, 8, 8);
 735
 736    /* see fs_init_cso_gen8() */
 737    cso = ilo_shader_get_kernel_cso(fs);
 738    dw3 = cso->payload[0];
 739    dw6 = cso->payload[1];
 740    dw7 = cso->payload[2];
 741
 742    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 743
 744    dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
 745    dw[1] = ilo_shader_get_kernel_offset(fs);
 746    dw[2] = 0;
 747    dw[3] = dw3;
 748    dw[4] = 0; /* scratch */
 749    dw[5] = 0;
 750    dw[6] = dw6;
 751    dw[7] = dw7;
 752    dw[8] = 0; /* kernel 1 */
 753    dw[9] = 0;
 754    dw[10] = 0; /* kernel 2 */
 755    dw[11] = 0;
 756 }
 757
 758 static inline void
 759 gen8_3DSTATE_PS_EXTRA(struct ilo_builder *builder,
 760                       const struct ilo_shader_state *fs,
 761                       bool cc_may_kill, bool per_sample)
 762 {
 763    const uint8_t cmd_len = 2;
 764    const struct ilo_shader_cso *cso;
 765    uint32_t dw1, *dw;
 766
 767    ILO_DEV_ASSERT(builder->dev, 8, 8);
 768
 769    /* see fs_init_cso_gen8() */
 770    cso = ilo_shader_get_kernel_cso(fs);
 771    dw1 = cso->payload[3];
 772
 773    if (cc_may_kill)
 774       dw1 |= GEN8_PSX_DW1_DISPATCH_ENABLE | GEN8_PSX_DW1_KILL_PIXEL;
 775    if (per_sample)
 776       dw1 |= GEN8_PSX_DW1_PER_SAMPLE;
 777
 778    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 779
 780    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_PS_EXTRA) | (cmd_len - 2);
 781    dw[1] = dw1;
 782 }
 783
 784 static inline void
 785 gen8_3DSTATE_PS_BLEND(struct ilo_builder *builder,
 786                       const struct ilo_blend_state *blend,
 787                       const struct ilo_fb_state *fb,
 788                       const struct ilo_dsa_state *dsa)
 789 {
 790    const uint8_t cmd_len = 2;
 791    uint32_t dw1, *dw;
 792
 793    ILO_DEV_ASSERT(builder->dev, 8, 8);
 794
 795    dw1 = 0;
 796    if (blend->alpha_to_coverage && fb->num_samples > 1)
 797       dw1 |= GEN8_PS_BLEND_DW1_ALPHA_TO_COVERAGE;
 798
 799    if (fb->state.nr_cbufs && fb->state.cbufs[0]) {
 800       const struct ilo_fb_blend_caps *caps = &fb->blend_caps[0];
 801
 802       dw1 |= GEN8_PS_BLEND_DW1_WRITABLE_RT;
 803       if (caps->can_blend) {
 804          if (caps->dst_alpha_forced_one)
 805             dw1 |= blend->dw_ps_blend_dst_alpha_forced_one;
 806          else
 807             dw1 |= blend->dw_ps_blend;
 808       }
 809
 810       if (caps->can_alpha_test)
 811          dw1 |= dsa->dw_ps_blend_alpha;
 812    } else {
 813       dw1 |= dsa->dw_ps_blend_alpha;
 814    }
 815
 816    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 817
 818    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_PS_BLEND) | (cmd_len - 2);
 819    dw[1] = dw1;
 820 }
 821
 822 static inline void
 823 gen6_3DSTATE_CONSTANT_PS(struct ilo_builder *builder,
 824                          const uint32_t *bufs, const int *sizes,
 825                          int num_bufs)
 826 {
 827    gen6_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS,
 828          bufs, sizes, num_bufs);
 829 }
 830
 831 static inline void
 832 gen7_3DSTATE_CONSTANT_PS(struct ilo_builder *builder,
 833                          const uint32_t *bufs, const int *sizes,
 834                          int num_bufs)
 835 {
 836    gen7_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS,
 837          bufs, sizes, num_bufs);
 838 }
 839
 840 static inline void
 841 gen7_3DSTATE_BINDING_TABLE_POINTERS_PS(struct ilo_builder *builder,
 842                                        uint32_t binding_table)
 843 {
 844    gen7_3dstate_pointer(builder,
 845          GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_PS,
 846          binding_table);
 847 }
 848
 849 static inline void
 850 gen7_3DSTATE_SAMPLER_STATE_POINTERS_PS(struct ilo_builder *builder,
 851                                        uint32_t sampler_state)
 852 {
 853    gen7_3dstate_pointer(builder,
 854          GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_PS,
 855          sampler_state);
 856 }
 857
 858 static inline void
 859 gen6_3DSTATE_MULTISAMPLE(struct ilo_builder *builder,
 860                          int num_samples, const uint32_t *pattern,
 861                          bool pixel_location_center)
 862 {
 863    const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ? 4 : 3;
 864    uint32_t dw1, dw2, dw3, *dw;
 865
 866    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
 867
 868    dw1 = (pixel_location_center) ? GEN6_MULTISAMPLE_DW1_PIXLOC_CENTER :
 869       GEN6_MULTISAMPLE_DW1_PIXLOC_UL_CORNER;
 870
 871    switch (num_samples) {
 872    case 0:
 873    case 1:
 874       dw1 |= GEN6_MULTISAMPLE_DW1_NUMSAMPLES_1;
 875       dw2 = 0;
 876       dw3 = 0;
 877       break;
 878    case 4:
 879       dw1 |= GEN6_MULTISAMPLE_DW1_NUMSAMPLES_4;
 880       dw2 = pattern[0];
 881       dw3 = 0;
 882       break;
 883    case 8:
 884       assert(ilo_dev_gen(builder->dev) >= ILO_GEN(7));
 885       dw1 |= GEN7_MULTISAMPLE_DW1_NUMSAMPLES_8;
 886       dw2 = pattern[0];
 887       dw3 = pattern[1];
 888       break;
 889    default:
 890       assert(!"unsupported sample count");
 891       dw1 |= GEN6_MULTISAMPLE_DW1_NUMSAMPLES_1;
 892       dw2 = 0;
 893       dw3 = 0;
 894       break;
 895    }
 896
 897    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 898
 899    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_MULTISAMPLE) | (cmd_len - 2);
 900    dw[1] = dw1;
 901    dw[2] = dw2;
 902    if (ilo_dev_gen(builder->dev) >= ILO_GEN(7))
 903       dw[3] = dw3;
 904 }
 905
 906 static inline void
 907 gen8_3DSTATE_MULTISAMPLE(struct ilo_builder *builder,
 908                          int num_samples,
 909                          bool pixel_location_center)
 910 {
 911    const uint8_t cmd_len = 2;
 912    uint32_t dw1, *dw;
 913
 914    ILO_DEV_ASSERT(builder->dev, 8, 8);
 915
 916    dw1 = (pixel_location_center) ? GEN6_MULTISAMPLE_DW1_PIXLOC_CENTER :
 917       GEN6_MULTISAMPLE_DW1_PIXLOC_UL_CORNER;
 918
 919    switch (num_samples) {
 920    case 0:
 921    case 1:
 922       dw1 |= GEN6_MULTISAMPLE_DW1_NUMSAMPLES_1;
 923       break;
 924    case 2:
 925       dw1 |= GEN8_MULTISAMPLE_DW1_NUMSAMPLES_2;
 926       break;
 927    case 4:
 928       dw1 |= GEN6_MULTISAMPLE_DW1_NUMSAMPLES_4;
 929       break;
 930    case 8:
 931       dw1 |= GEN7_MULTISAMPLE_DW1_NUMSAMPLES_8;
 932       break;
 933    case 16:
 934       dw1 |= GEN8_MULTISAMPLE_DW1_NUMSAMPLES_16;
 935       break;
 936    default:
 937       assert(!"unsupported sample count");
 938       dw1 |= GEN6_MULTISAMPLE_DW1_NUMSAMPLES_1;
 939       break;
 940    }
 941
 942    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 943
 944    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_MULTISAMPLE) | (cmd_len - 2);
 945    dw[1] = dw1;
 946 }
 947
 948 static inline void
 949 gen8_3DSTATE_SAMPLE_PATTERN(struct ilo_builder *builder,
 950                             const uint32_t *pattern_1x,
 951                             const uint32_t *pattern_2x,
 952                             const uint32_t *pattern_4x,
 953                             const uint32_t *pattern_8x,
 954                             const uint32_t *pattern_16x)
 955 {
 956    const uint8_t cmd_len = 9;
 957    uint32_t *dw;
 958
 959    ILO_DEV_ASSERT(builder->dev, 8, 8);
 960
 961    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 962
 963    dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_SAMPLE_PATTERN) | (cmd_len - 2);
 964    dw[1] = pattern_16x[3];
 965    dw[2] = pattern_16x[2];
 966    dw[3] = pattern_16x[1];
 967    dw[4] = pattern_16x[0];
 968    dw[5] = pattern_8x[1];
 969    dw[6] = pattern_8x[0];
 970    dw[7] = pattern_4x[0];
 971    dw[8] = pattern_1x[0] << 16 |
 972            pattern_2x[0];
 973 }
 974
 975 static inline void
 976 gen6_3DSTATE_SAMPLE_MASK(struct ilo_builder *builder,
 977                          unsigned sample_mask)
 978 {
 979    const uint8_t cmd_len = 2;
 980    const unsigned valid_mask = 0xf;
 981    uint32_t *dw;
 982
 983    ILO_DEV_ASSERT(builder->dev, 6, 6);
 984
 985    sample_mask &= valid_mask;
 986
 987    ilo_builder_batch_pointer(builder, cmd_len, &dw);
 988
 989    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SAMPLE_MASK) | (cmd_len - 2);
 990    dw[1] = sample_mask;
 991 }
 992
 993 static inline void
 994 gen7_3DSTATE_SAMPLE_MASK(struct ilo_builder *builder,
 995                          unsigned sample_mask,
 996                          int num_samples)
 997 {
 998    const uint8_t cmd_len = 2;
 999    const unsigned valid_mask = ((1 << num_samples) - 1) | 0x1;
1000    uint32_t *dw;
1001
1002    ILO_DEV_ASSERT(builder->dev, 7, 8);
1003
1004    /*
1005     * From the Ivy Bridge PRM, volume 2 part 1, page 294:
1006     *
1007     *     "If Number of Multisamples is NUMSAMPLES_1, bits 7:1 of this field
1008     *      (Sample Mask) must be zero.
1009     *
1010     *      If Number of Multisamples is NUMSAMPLES_4, bits 7:4 of this field
1011     *      must be zero."
1012     */
1013    sample_mask &= valid_mask;
1014
1015    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1016
1017    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SAMPLE_MASK) | (cmd_len - 2);
1018    dw[1] = sample_mask;
1019 }
1020
1021 static inline void
1022 gen6_3DSTATE_DRAWING_RECTANGLE(struct ilo_builder *builder,
1023                                unsigned x, unsigned y,
1024                                unsigned width, unsigned height)
1025 {
1026    const uint8_t cmd_len = 4;
1027    unsigned xmax = x + width - 1;
1028    unsigned ymax = y + height - 1;
1029    unsigned rect_limit;
1030    uint32_t *dw;
1031
1032    ILO_DEV_ASSERT(builder->dev, 6, 8);
1033
1034    if (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) {
1035       rect_limit = 16383;
1036    }
1037    else {
1038       /*
1039        * From the Sandy Bridge PRM, volume 2 part 1, page 230:
1040        *
1041        *     "[DevSNB] Errata: This field (Clipped Drawing Rectangle Y Min)
1042        *      must be an even number"
1043        */
1044       assert(y % 2 == 0);
1045
1046       rect_limit = 8191;
1047    }
1048
1049    if (x > rect_limit) x = rect_limit;
1050    if (y > rect_limit) y = rect_limit;
1051    if (xmax > rect_limit) xmax = rect_limit;
1052    if (ymax > rect_limit) ymax = rect_limit;
1053
1054    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1055
1056    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_DRAWING_RECTANGLE) | (cmd_len - 2);
1057    dw[1] = y << 16 | x;
1058    dw[2] = ymax << 16 | xmax;
1059    /*
1060     * There is no need to set the origin.  It is intended to support front
1061     * buffer rendering.
1062     */
1063    dw[3] = 0;
1064 }
1065
1066 static inline void
1067 gen6_3DSTATE_POLY_STIPPLE_OFFSET(struct ilo_builder *builder,
1068                                  int x_offset, int y_offset)
1069 {
1070    const uint8_t cmd_len = 2;
1071    uint32_t *dw;
1072
1073    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1074
1075    assert(x_offset >= 0 && x_offset <= 31);
1076    assert(y_offset >= 0 && y_offset <= 31);
1077
1078    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1079
1080    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_POLY_STIPPLE_OFFSET) | (cmd_len - 2);
1081    dw[1] = x_offset << 8 | y_offset;
1082 }
1083
1084 static inline void
1085 gen6_3DSTATE_POLY_STIPPLE_PATTERN(struct ilo_builder *builder,
1086                                   const struct pipe_poly_stipple *pattern)
1087 {
1088    const uint8_t cmd_len = 33;
1089    uint32_t *dw;
1090    int i;
1091
1092    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1093
1094    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1095
1096    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_POLY_STIPPLE_PATTERN) | (cmd_len - 2);
1097    dw++;
1098
1099    STATIC_ASSERT(Elements(pattern->stipple) == 32);
1100    for (i = 0; i < 32; i++)
1101       dw[i] = pattern->stipple[i];
1102 }
1103
1104 static inline void
1105 gen6_3DSTATE_LINE_STIPPLE(struct ilo_builder *builder,
1106                           unsigned pattern, unsigned factor)
1107 {
1108    const uint8_t cmd_len = 3;
1109    unsigned inverse;
1110    uint32_t *dw;
1111
1112    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1113
1114    assert((pattern & 0xffff) == pattern);
1115    assert(factor >= 1 && factor <= 256);
1116
1117    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1118
1119    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_LINE_STIPPLE) | (cmd_len - 2);
1120    dw[1] = pattern;
1121
1122    if (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) {
1123       /* in U1.16 */
1124       inverse = 65536 / factor;
1125
1126       dw[2] = inverse << GEN7_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT |
1127               factor;
1128    }
1129    else {
1130       /* in U1.13 */
1131       inverse = 8192 / factor;
1132
1133       dw[2] = inverse << GEN6_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT |
1134               factor;
1135    }
1136 }
1137
1138 static inline void
1139 gen6_3DSTATE_AA_LINE_PARAMETERS(struct ilo_builder *builder)
1140 {
1141    const uint8_t cmd_len = 3;
1142    const uint32_t dw[3] = {
1143       GEN6_RENDER_CMD(3D, 3DSTATE_AA_LINE_PARAMETERS) | (cmd_len - 2),
1144       0 << GEN6_AA_LINE_DW1_BIAS__SHIFT | 0,
1145       0 << GEN6_AA_LINE_DW2_CAP_BIAS__SHIFT | 0,
1146    };
1147
1148    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1149
1150    ilo_builder_batch_write(builder, cmd_len, dw);
1151 }
1152
1153 static inline void
1154 gen6_3DSTATE_DEPTH_BUFFER(struct ilo_builder *builder,
1155                           const struct ilo_zs_surface *zs,
1156                           bool aligned_8x4)
1157 {
1158    const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
1159       GEN7_RENDER_CMD(3D, 3DSTATE_DEPTH_BUFFER) :
1160       GEN6_RENDER_CMD(3D, 3DSTATE_DEPTH_BUFFER);
1161    const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 8 : 7;
1162    uint32_t *dw;
1163    unsigned pos;
1164
1165    ILO_DEV_ASSERT(builder->dev, 6, 8);
1166
1167    pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
1168
1169    dw[0] = cmd | (cmd_len - 2);
1170    dw[1] = zs->payload[0];
1171    dw[2] = 0;
1172
1173    /* see ilo_gpe_init_zs_surface() */
1174    if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
1175       dw[3] = 0;
1176       dw[4] = (aligned_8x4) ? zs->dw_aligned_8x4 : zs->payload[2];
1177       dw[5] = zs->payload[3];
1178       dw[6] = zs->payload[4];
1179       dw[7] = zs->payload[5];
1180
1181       if (zs->bo) {
1182          ilo_builder_batch_reloc64(builder, pos + 2, zs->bo,
1183                zs->payload[1], INTEL_RELOC_WRITE);
1184       }
1185    } else {
1186       dw[3] = (aligned_8x4) ? zs->dw_aligned_8x4 : zs->payload[2];
1187       dw[4] = zs->payload[3];
1188       dw[5] = zs->payload[4];
1189       dw[6] = zs->payload[5];
1190
1191       if (zs->bo) {
1192          ilo_builder_batch_reloc(builder, pos + 2, zs->bo,
1193                zs->payload[1], INTEL_RELOC_WRITE);
1194       }
1195    }
1196 }
1197
1198 static inline void
1199 gen6_3DSTATE_STENCIL_BUFFER(struct ilo_builder *builder,
1200                             const struct ilo_zs_surface *zs)
1201 {
1202    const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
1203       GEN7_RENDER_CMD(3D, 3DSTATE_STENCIL_BUFFER) :
1204       GEN6_RENDER_CMD(3D, 3DSTATE_STENCIL_BUFFER);
1205    const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 5 : 3;
1206    uint32_t *dw;
1207    unsigned pos;
1208
1209    ILO_DEV_ASSERT(builder->dev, 6, 8);
1210
1211    pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
1212
1213    dw[0] = cmd | (cmd_len - 2);
1214    /* see ilo_gpe_init_zs_surface() */
1215    dw[1] = zs->payload[6];
1216    dw[2] = 0;
1217
1218    if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
1219       dw[3] = 0;
1220       dw[4] = zs->payload[8];
1221
1222       if (zs->separate_s8_bo) {
1223          ilo_builder_batch_reloc64(builder, pos + 2,
1224                zs->separate_s8_bo, zs->payload[7], INTEL_RELOC_WRITE);
1225       }
1226    } else {
1227       if (zs->separate_s8_bo) {
1228          ilo_builder_batch_reloc(builder, pos + 2,
1229                zs->separate_s8_bo, zs->payload[7], INTEL_RELOC_WRITE);
1230       }
1231    }
1232 }
1233
1234 static inline void
1235 gen6_3DSTATE_HIER_DEPTH_BUFFER(struct ilo_builder *builder,
1236                                const struct ilo_zs_surface *zs)
1237 {
1238    const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
1239       GEN7_RENDER_CMD(3D, 3DSTATE_HIER_DEPTH_BUFFER) :
1240       GEN6_RENDER_CMD(3D, 3DSTATE_HIER_DEPTH_BUFFER);
1241    const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 5 : 3;
1242    uint32_t *dw;
1243    unsigned pos;
1244
1245    ILO_DEV_ASSERT(builder->dev, 6, 8);
1246
1247    pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
1248
1249    dw[0] = cmd | (cmd_len - 2);
1250    /* see ilo_gpe_init_zs_surface() */
1251    dw[1] = zs->payload[9];
1252    dw[2] = 0;
1253
1254    if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
1255       dw[3] = 0;
1256       dw[4] = zs->payload[11];
1257
1258       if (zs->hiz_bo) {
1259          ilo_builder_batch_reloc64(builder, pos + 2,
1260                zs->hiz_bo, zs->payload[10], INTEL_RELOC_WRITE);
1261       }
1262    } else {
1263       if (zs->hiz_bo) {
1264          ilo_builder_batch_reloc(builder, pos + 2,
1265                zs->hiz_bo, zs->payload[10], INTEL_RELOC_WRITE);
1266       }
1267    }
1268 }
1269
1270 static inline void
1271 gen6_3DSTATE_CLEAR_PARAMS(struct ilo_builder *builder,
1272                           uint32_t clear_val)
1273 {
1274    const uint8_t cmd_len = 2;
1275    uint32_t *dw;
1276
1277    ILO_DEV_ASSERT(builder->dev, 6, 6);
1278
1279    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1280
1281    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CLEAR_PARAMS) |
1282            GEN6_CLEAR_PARAMS_DW0_VALID |
1283            (cmd_len - 2);
1284    dw[1] = clear_val;
1285 }
1286
1287 static inline void
1288 gen7_3DSTATE_CLEAR_PARAMS(struct ilo_builder *builder,
1289                           uint32_t clear_val)
1290 {
1291    const uint8_t cmd_len = 3;
1292    uint32_t *dw;
1293
1294    ILO_DEV_ASSERT(builder->dev, 7, 8);
1295
1296    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1297
1298    dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_CLEAR_PARAMS) | (cmd_len - 2);
1299    dw[1] = clear_val;
1300    dw[2] = GEN7_CLEAR_PARAMS_DW2_VALID;
1301 }
1302
1303 static inline void
1304 gen6_3DSTATE_VIEWPORT_STATE_POINTERS(struct ilo_builder *builder,
1305                                      uint32_t clip_viewport,
1306                                      uint32_t sf_viewport,
1307                                      uint32_t cc_viewport)
1308 {
1309    const uint8_t cmd_len = 4;
1310    uint32_t *dw;
1311
1312    ILO_DEV_ASSERT(builder->dev, 6, 6);
1313
1314    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1315
1316    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VIEWPORT_STATE_POINTERS) |
1317            GEN6_VP_PTR_DW0_CLIP_CHANGED |
1318            GEN6_VP_PTR_DW0_SF_CHANGED |
1319            GEN6_VP_PTR_DW0_CC_CHANGED |
1320            (cmd_len - 2);
1321    dw[1] = clip_viewport;
1322    dw[2] = sf_viewport;
1323    dw[3] = cc_viewport;
1324 }
1325
1326 static inline void
1327 gen6_3DSTATE_SCISSOR_STATE_POINTERS(struct ilo_builder *builder,
1328                                     uint32_t scissor_rect)
1329 {
1330    const uint8_t cmd_len = 2;
1331    uint32_t *dw;
1332
1333    ILO_DEV_ASSERT(builder->dev, 6, 8);
1334
1335    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1336
1337    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SCISSOR_STATE_POINTERS) |
1338            (cmd_len - 2);
1339    dw[1] = scissor_rect;
1340 }
1341
1342 static inline void
1343 gen6_3DSTATE_CC_STATE_POINTERS(struct ilo_builder *builder,
1344                                uint32_t blend_state,
1345                                uint32_t depth_stencil_state,
1346                                uint32_t color_calc_state)
1347 {
1348    const uint8_t cmd_len = 4;
1349    uint32_t *dw;
1350
1351    ILO_DEV_ASSERT(builder->dev, 6, 6);
1352
1353    ilo_builder_batch_pointer(builder, cmd_len, &dw);
1354
1355    dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CC_STATE_POINTERS) | (cmd_len - 2);
1356    dw[1] = blend_state | GEN6_CC_PTR_DW1_BLEND_CHANGED;
1357    dw[2] = depth_stencil_state | GEN6_CC_PTR_DW2_ZS_CHANGED;
1358    dw[3] = color_calc_state | GEN6_CC_PTR_DW3_CC_CHANGED;
1359 }
1360
1361 static inline void
1362 gen7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP(struct ilo_builder *builder,
1363                                              uint32_t sf_clip_viewport)
1364 {
1365    gen7_3dstate_pointer(builder,
1366          GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP,
1367          sf_clip_viewport);
1368 }
1369
1370 static inline void
1371 gen7_3DSTATE_VIEWPORT_STATE_POINTERS_CC(struct ilo_builder *builder,
1372                                         uint32_t cc_viewport)
1373 {
1374    gen7_3dstate_pointer(builder,
1375          GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_CC,
1376          cc_viewport);
1377 }
1378
1379 static inline void
1380 gen7_3DSTATE_CC_STATE_POINTERS(struct ilo_builder *builder,
1381                                uint32_t color_calc_state)
1382 {
1383    gen7_3dstate_pointer(builder,
1384          GEN6_RENDER_OPCODE_3DSTATE_CC_STATE_POINTERS, color_calc_state);
1385 }
1386
1387 static inline void
1388 gen7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS(struct ilo_builder *builder,
1389                                           uint32_t depth_stencil_state)
1390 {
1391    gen7_3dstate_pointer(builder,
1392          GEN7_RENDER_OPCODE_3DSTATE_DEPTH_STENCIL_STATE_POINTERS,
1393          depth_stencil_state);
1394 }
1395
1396 static inline void
1397 gen7_3DSTATE_BLEND_STATE_POINTERS(struct ilo_builder *builder,
1398                                   uint32_t blend_state)
1399 {
1400    gen7_3dstate_pointer(builder,
1401          GEN7_RENDER_OPCODE_3DSTATE_BLEND_STATE_POINTERS,
1402          blend_state);
1403 }
1404
1405 static inline uint32_t
1406 gen6_CLIP_VIEWPORT(struct ilo_builder *builder,
1407                    const struct ilo_viewport_cso *viewports,
1408                    unsigned num_viewports)
1409 {
1410    const int state_align = 32;
1411    const int state_len = 4 * num_viewports;
1412    uint32_t state_offset, *dw;
1413    unsigned i;
1414
1415    ILO_DEV_ASSERT(builder->dev, 6, 6);
1416
1417    /*
1418     * From the Sandy Bridge PRM, volume 2 part 1, page 193:
1419     *
1420     *     "The viewport-related state is stored as an array of up to 16
1421     *      elements..."
1422     */
1423    assert(num_viewports && num_viewports <= 16);
1424
1425    state_offset = ilo_builder_dynamic_pointer(builder,
1426          ILO_BUILDER_ITEM_CLIP_VIEWPORT, state_align, state_len, &dw);
1427
1428    for (i = 0; i < num_viewports; i++) {
1429       const struct ilo_viewport_cso *vp = &viewports[i];
1430
1431       dw[0] = fui(vp->min_gbx);
1432       dw[1] = fui(vp->max_gbx);
1433       dw[2] = fui(vp->min_gby);
1434       dw[3] = fui(vp->max_gby);
1435
1436       dw += 4;
1437    }
1438
1439    return state_offset;
1440 }
1441
1442 static inline uint32_t
1443 gen6_SF_VIEWPORT(struct ilo_builder *builder,
1444                  const struct ilo_viewport_cso *viewports,
1445                  unsigned num_viewports)
1446 {
1447    const int state_align = 32;
1448    const int state_len = 8 * num_viewports;
1449    uint32_t state_offset, *dw;
1450    unsigned i;
1451
1452    ILO_DEV_ASSERT(builder->dev, 6, 6);
1453
1454    /*
1455     * From the Sandy Bridge PRM, volume 2 part 1, page 262:
1456     *
1457     *     "The viewport-specific state used by the SF unit (SF_VIEWPORT) is
1458     *      stored as an array of up to 16 elements..."
1459     */
1460    assert(num_viewports && num_viewports <= 16);
1461
1462    state_offset = ilo_builder_dynamic_pointer(builder,
1463          ILO_BUILDER_ITEM_SF_VIEWPORT, state_align, state_len, &dw);
1464
1465    for (i = 0; i < num_viewports; i++) {
1466       const struct ilo_viewport_cso *vp = &viewports[i];
1467
1468       dw[0] = fui(vp->m00);
1469       dw[1] = fui(vp->m11);
1470       dw[2] = fui(vp->m22);
1471       dw[3] = fui(vp->m30);
1472       dw[4] = fui(vp->m31);
1473       dw[5] = fui(vp->m32);
1474       dw[6] = 0;
1475       dw[7] = 0;
1476
1477       dw += 8;
1478    }
1479
1480    return state_offset;
1481 }
1482
1483 static inline uint32_t
1484 gen7_SF_CLIP_VIEWPORT(struct ilo_builder *builder,
1485                       const struct ilo_viewport_cso *viewports,
1486                       unsigned num_viewports)
1487 {
1488    const int state_align = 64;
1489    const int state_len = 16 * num_viewports;
1490    uint32_t state_offset, *dw;
1491    unsigned i;
1492
1493    ILO_DEV_ASSERT(builder->dev, 7, 8);
1494
1495    /*
1496     * From the Ivy Bridge PRM, volume 2 part 1, page 270:
1497     *
1498     *     "The viewport-specific state used by both the SF and CL units
1499     *      (SF_CLIP_VIEWPORT) is stored as an array of up to 16 elements, each
1500     *      of which contains the DWords described below. The start of each
1501     *      element is spaced 16 DWords apart. The location of first element of
1502     *      the array, as specified by both Pointer to SF_VIEWPORT and Pointer
1503     *      to CLIP_VIEWPORT, is aligned to a 64-byte boundary."
1504     */
1505    assert(num_viewports && num_viewports <= 16);
1506
1507    state_offset = ilo_builder_dynamic_pointer(builder,
1508          ILO_BUILDER_ITEM_SF_VIEWPORT, state_align, state_len, &dw);
1509
1510    for (i = 0; i < num_viewports; i++) {
1511       const struct ilo_viewport_cso *vp = &viewports[i];
1512
1513       dw[0] = fui(vp->m00);
1514       dw[1] = fui(vp->m11);
1515       dw[2] = fui(vp->m22);
1516       dw[3] = fui(vp->m30);
1517       dw[4] = fui(vp->m31);
1518       dw[5] = fui(vp->m32);
1519       dw[6] = 0;
1520       dw[7] = 0;
1521
1522       dw[8] = fui(vp->min_gbx);
1523       dw[9] = fui(vp->max_gbx);
1524       dw[10] = fui(vp->min_gby);
1525       dw[11] = fui(vp->max_gby);
1526
1527       if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
1528          dw[12] = fui(vp->min_x);
1529          dw[13] = fui(vp->max_x - 1.0f);
1530          dw[14] = fui(vp->min_y);
1531          dw[15] = fui(vp->max_y - 1.0f);
1532       } else {
1533          dw[12] = 0;
1534          dw[13] = 0;
1535          dw[14] = 0;
1536          dw[15] = 0;
1537       }
1538
1539       dw += 16;
1540    }
1541
1542    return state_offset;
1543 }
1544
1545 static inline uint32_t
1546 gen6_CC_VIEWPORT(struct ilo_builder *builder,
1547                  const struct ilo_viewport_cso *viewports,
1548                  unsigned num_viewports)
1549 {
1550    const int state_align = 32;
1551    const int state_len = 2 * num_viewports;
1552    uint32_t state_offset, *dw;
1553    unsigned i;
1554
1555    ILO_DEV_ASSERT(builder->dev, 6, 8);
1556
1557    /*
1558     * From the Sandy Bridge PRM, volume 2 part 1, page 385:
1559     *
1560     *     "The viewport state is stored as an array of up to 16 elements..."
1561     */
1562    assert(num_viewports && num_viewports <= 16);
1563
1564    state_offset = ilo_builder_dynamic_pointer(builder,
1565          ILO_BUILDER_ITEM_CC_VIEWPORT, state_align, state_len, &dw);
1566
1567    for (i = 0; i < num_viewports; i++) {
1568       const struct ilo_viewport_cso *vp = &viewports[i];
1569
1570       dw[0] = fui(vp->min_z);
1571       dw[1] = fui(vp->max_z);
1572
1573       dw += 2;
1574    }
1575
1576    return state_offset;
1577 }
1578
1579 static inline uint32_t
1580 gen6_SCISSOR_RECT(struct ilo_builder *builder,
1581                   const struct ilo_scissor_state *scissor,
1582                   unsigned num_viewports)
1583 {
1584    const int state_align = 32;
1585    const int state_len = 2 * num_viewports;
1586
1587    ILO_DEV_ASSERT(builder->dev, 6, 8);
1588
1589    /*
1590     * From the Sandy Bridge PRM, volume 2 part 1, page 263:
1591     *
1592     *     "The viewport-specific state used by the SF unit (SCISSOR_RECT) is
1593     *      stored as an array of up to 16 elements..."
1594     */
1595    assert(num_viewports && num_viewports <= 16);
1596    assert(Elements(scissor->payload) >= state_len);
1597
1598    return ilo_builder_dynamic_write(builder, ILO_BUILDER_ITEM_SCISSOR_RECT,
1599          state_align, state_len, scissor->payload);
1600 }
1601
1602 static inline uint32_t
1603 gen6_COLOR_CALC_STATE(struct ilo_builder *builder,
1604                       const struct pipe_stencil_ref *stencil_ref,
1605                       ubyte alpha_ref,
1606                       const struct pipe_blend_color *blend_color)
1607 {
1608    const int state_align = 64;
1609    const int state_len = 6;
1610    uint32_t state_offset, *dw;
1611
1612    ILO_DEV_ASSERT(builder->dev, 6, 8);
1613
1614    state_offset = ilo_builder_dynamic_pointer(builder,
1615          ILO_BUILDER_ITEM_COLOR_CALC, state_align, state_len, &dw);
1616
1617    dw[0] = stencil_ref->ref_value[0] << 24 |
1618            stencil_ref->ref_value[1] << 16 |
1619            GEN6_CC_DW0_ALPHATEST_UNORM8;
1620    dw[1] = alpha_ref;
1621    dw[2] = fui(blend_color->color[0]);
1622    dw[3] = fui(blend_color->color[1]);
1623    dw[4] = fui(blend_color->color[2]);
1624    dw[5] = fui(blend_color->color[3]);
1625
1626    return state_offset;
1627 }
1628
1629 static inline uint32_t
1630 gen6_DEPTH_STENCIL_STATE(struct ilo_builder *builder,
1631                          const struct ilo_dsa_state *dsa)
1632 {
1633    const int state_align = 64;
1634    const int state_len = 3;
1635
1636    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1637
1638    STATIC_ASSERT(Elements(dsa->payload) >= state_len);
1639
1640    return ilo_builder_dynamic_write(builder, ILO_BUILDER_ITEM_DEPTH_STENCIL,
1641          state_align, state_len, dsa->payload);
1642 }
1643
1644 static inline uint32_t
1645 gen6_BLEND_STATE(struct ilo_builder *builder,
1646                  const struct ilo_blend_state *blend,
1647                  const struct ilo_fb_state *fb,
1648                  const struct ilo_dsa_state *dsa)
1649 {
1650    const int state_align = 64;
1651    int state_len;
1652    uint32_t state_offset, *dw;
1653    unsigned num_targets, i;
1654
1655    ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1656
1657    /*
1658     * From the Sandy Bridge PRM, volume 2 part 1, page 376:
1659     *
1660     *     "The blend state is stored as an array of up to 8 elements..."
1661     */
1662    num_targets = fb->state.nr_cbufs;
1663    assert(num_targets <= 8);
1664
1665    if (!num_targets) {
1666       if (!dsa->dw_blend_alpha)
1667          return 0;
1668       /* to be able to reference alpha func */
1669       num_targets = 1;
1670    }
1671
1672    state_len = 2 * num_targets;
1673
1674    state_offset = ilo_builder_dynamic_pointer(builder,
1675          ILO_BUILDER_ITEM_BLEND, state_align, state_len, &dw);
1676
1677    for (i = 0; i < num_targets; i++) {
1678       const struct ilo_blend_cso *cso = &blend->cso[i];
1679
1680       dw[0] = cso->payload[0];
1681       dw[1] = cso->payload[1] | blend->dw_shared;
1682
1683       if (i < fb->state.nr_cbufs && fb->state.cbufs[i]) {
1684          const struct ilo_fb_blend_caps *caps = &fb->blend_caps[i];
1685
1686          if (caps->can_blend) {
1687             if (caps->dst_alpha_forced_one)
1688                dw[0] |= cso->dw_blend_dst_alpha_forced_one;
1689             else
1690                dw[0] |= cso->dw_blend;
1691          }
1692
1693          if (caps->can_logicop)
1694             dw[1] |= blend->dw_logicop;
1695
1696          if (caps->can_alpha_test)
1697             dw[1] |= dsa->dw_blend_alpha;
1698       } else {
1699          dw[1] |= GEN6_RT_DW1_WRITE_DISABLE_A |
1700                   GEN6_RT_DW1_WRITE_DISABLE_R |
1701                   GEN6_RT_DW1_WRITE_DISABLE_G |
1702                   GEN6_RT_DW1_WRITE_DISABLE_B |
1703                   dsa->dw_blend_alpha;
1704       }
1705
1706       /*
1707        * From the Sandy Bridge PRM, volume 2 part 1, page 356:
1708        *
1709        *     "When NumSamples = 1, AlphaToCoverage and AlphaToCoverage
1710        *      Dither both must be disabled."
1711        *
1712        * There is no such limitation on GEN7, or for AlphaToOne.  But GL
1713        * requires that anyway.
1714        */
1715       if (fb->num_samples > 1)
1716          dw[1] |= blend->dw_alpha_mod;
1717
1718       dw += 2;
1719    }
1720
1721    return state_offset;
1722 }
1723
1724 static inline uint32_t
1725 gen8_BLEND_STATE(struct ilo_builder *builder,
1726                  const struct ilo_blend_state *blend,
1727                  const struct ilo_fb_state *fb,
1728                  const struct ilo_dsa_state *dsa)
1729 {
1730    const int state_align = 64;
1731    int state_len;
1732    uint32_t state_offset, *dw;
1733    unsigned i;
1734
1735    ILO_DEV_ASSERT(builder->dev, 8, 8);
1736
1737    assert(fb->state.nr_cbufs <= 8);
1738
1739    /* may need to reference alpha func even when there is no color buffer */
1740    if (!fb->state.nr_cbufs && !dsa->dw_blend_alpha)
1741       return 0;
1742
1743    state_len = 1 + 2 * fb->state.nr_cbufs;
1744
1745    state_offset = ilo_builder_dynamic_pointer(builder,
1746          ILO_BUILDER_ITEM_BLEND, state_align, state_len, &dw);
1747
1748    dw[0] = blend->dw_shared;
1749    if (fb->num_samples > 1)
1750       dw[0] |= blend->dw_alpha_mod;
1751    if (!fb->state.nr_cbufs || fb->blend_caps[0].can_alpha_test)
1752       dw[0] |= dsa->dw_blend_alpha;
1753    dw++;
1754
1755    for (i = 0; i < fb->state.nr_cbufs; i++) {
1756       const struct ilo_fb_blend_caps *caps = &fb->blend_caps[i];
1757       const struct ilo_blend_cso *cso = &blend->cso[i];
1758
1759       dw[0] = cso->payload[0];
1760       dw[1] = cso->payload[1];
1761
1762       if (fb->state.cbufs[i]) {
1763          if (caps->can_blend) {
1764             if (caps->dst_alpha_forced_one)
1765                dw[0] |= cso->dw_blend_dst_alpha_forced_one;
1766             else
1767                dw[0] |= cso->dw_blend;
1768          }
1769
1770          if (caps->can_logicop)
1771             dw[1] |= blend->dw_logicop;
1772       } else {
1773          dw[0] |= GEN8_RT_DW0_WRITE_DISABLE_A |
1774                   GEN8_RT_DW0_WRITE_DISABLE_R |
1775                   GEN8_RT_DW0_WRITE_DISABLE_G |
1776                   GEN8_RT_DW0_WRITE_DISABLE_B;
1777       }
1778
1779       dw += 2;
1780    }
1781
1782    return state_offset;
1783 }
1784
1785 #endif /* ILO_BUILDER_3D_BOTTOM_H */