android: gallium/radeon: attempt to fix the android build
[mesa.git] / src / gallium / drivers / ilo / ilo_gpe.h
1 /*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2013 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28 #ifndef ILO_GPE_H
29 #define ILO_GPE_H
30
31 #include "ilo_common.h"
32
33 /**
34 * \see brw_context.h
35 */
36 #define ILO_MAX_DRAW_BUFFERS 8
37 #define ILO_MAX_CONST_BUFFERS (1 + 12)
38 #define ILO_MAX_SAMPLER_VIEWS 16
39 #define ILO_MAX_SAMPLERS 16
40 #define ILO_MAX_SO_BINDINGS 64
41 #define ILO_MAX_SO_BUFFERS 4
42 #define ILO_MAX_VIEWPORTS 1
43
44 #define ILO_MAX_VS_SURFACES (ILO_MAX_CONST_BUFFERS + ILO_MAX_SAMPLER_VIEWS)
45 #define ILO_VS_CONST_SURFACE(i) (i)
46 #define ILO_VS_TEXTURE_SURFACE(i) (ILO_MAX_CONST_BUFFERS + i)
47
48 #define ILO_MAX_GS_SURFACES (ILO_MAX_SO_BINDINGS)
49 #define ILO_GS_SO_SURFACE(i) (i)
50
51 #define ILO_MAX_WM_SURFACES (ILO_MAX_DRAW_BUFFERS + ILO_MAX_CONST_BUFFERS + ILO_MAX_SAMPLER_VIEWS)
52 #define ILO_WM_DRAW_SURFACE(i) (i)
53 #define ILO_WM_CONST_SURFACE(i) (ILO_MAX_DRAW_BUFFERS + i)
54 #define ILO_WM_TEXTURE_SURFACE(i) (ILO_MAX_DRAW_BUFFERS + ILO_MAX_CONST_BUFFERS + i)
55
56 struct ilo_buffer;
57 struct ilo_texture;
58 struct ilo_shader_state;
59
60 struct ilo_vb_state {
61 struct pipe_vertex_buffer states[PIPE_MAX_ATTRIBS];
62 uint32_t enabled_mask;
63 };
64
65 struct ilo_ib_state {
66 struct pipe_resource *buffer;
67 const void *user_buffer;
68 unsigned offset;
69 unsigned index_size;
70
71 /* these are not valid until the state is finalized */
72 struct pipe_resource *hw_resource;
73 unsigned hw_index_size;
74 /* an offset to be added to pipe_draw_info::start */
75 int64_t draw_start_offset;
76 };
77
78 struct ilo_ve_cso {
79 /* VERTEX_ELEMENT_STATE */
80 uint32_t payload[2];
81 };
82
83 struct ilo_ve_state {
84 struct ilo_ve_cso cso[PIPE_MAX_ATTRIBS];
85 unsigned count;
86
87 unsigned instance_divisors[PIPE_MAX_ATTRIBS];
88 unsigned vb_mapping[PIPE_MAX_ATTRIBS];
89 unsigned vb_count;
90 };
91
92 struct ilo_so_state {
93 struct pipe_stream_output_target *states[ILO_MAX_SO_BUFFERS];
94 unsigned count;
95 unsigned append_bitmask;
96
97 bool enabled;
98 };
99
100 struct ilo_viewport_cso {
101 /* matrix form */
102 float m00, m11, m22, m30, m31, m32;
103
104 /* guardband in NDC space */
105 float min_gbx, min_gby, max_gbx, max_gby;
106
107 /* viewport in screen space */
108 float min_x, min_y, min_z;
109 float max_x, max_y, max_z;
110 };
111
112 struct ilo_viewport_state {
113 struct ilo_viewport_cso cso[ILO_MAX_VIEWPORTS];
114 unsigned count;
115
116 struct pipe_viewport_state viewport0;
117 };
118
119 struct ilo_scissor_state {
120 /* SCISSOR_RECT */
121 uint32_t payload[ILO_MAX_VIEWPORTS * 2];
122
123 struct pipe_scissor_state scissor0;
124 };
125
126 struct ilo_rasterizer_clip {
127 /* 3DSTATE_CLIP */
128 uint32_t payload[3];
129
130 uint32_t can_enable_guardband;
131 };
132
133 struct ilo_rasterizer_sf {
134 /* 3DSTATE_SF */
135 uint32_t payload[6];
136 uint32_t dw_msaa;
137 };
138
139 struct ilo_rasterizer_wm {
140 /* 3DSTATE_WM */
141 uint32_t payload[2];
142 uint32_t dw_msaa_rast;
143 uint32_t dw_msaa_disp;
144 };
145
146 struct ilo_rasterizer_state {
147 struct pipe_rasterizer_state state;
148
149 struct ilo_rasterizer_clip clip;
150 struct ilo_rasterizer_sf sf;
151 struct ilo_rasterizer_wm wm;
152 };
153
154 struct ilo_dsa_state {
155 /* DEPTH_STENCIL_STATE */
156 uint32_t payload[3];
157
158 uint32_t dw_alpha;
159 ubyte alpha_ref;
160 };
161
162 struct ilo_blend_cso {
163 /* BLEND_STATE */
164 uint32_t payload[2];
165
166 uint32_t dw_blend;
167 uint32_t dw_blend_dst_alpha_forced_one;
168
169 uint32_t dw_logicop;
170 uint32_t dw_alpha_mod;
171 };
172
173 struct ilo_blend_state {
174 struct ilo_blend_cso cso[ILO_MAX_DRAW_BUFFERS];
175
176 bool independent_blend_enable;
177 bool dual_blend;
178 bool alpha_to_coverage;
179 };
180
181 struct ilo_sampler_cso {
182 /* SAMPLER_STATE and SAMPLER_BORDER_COLOR_STATE */
183 uint32_t payload[15];
184
185 uint32_t dw_filter;
186 uint32_t dw_filter_aniso;
187 uint32_t dw_wrap;
188 uint32_t dw_wrap_1d;
189 uint32_t dw_wrap_cube;
190
191 bool anisotropic;
192 bool saturate_r;
193 bool saturate_s;
194 bool saturate_t;
195 };
196
197 struct ilo_sampler_state {
198 const struct ilo_sampler_cso *cso[ILO_MAX_SAMPLERS];
199 unsigned count;
200 };
201
202 struct ilo_view_surface {
203 /* SURFACE_STATE */
204 uint32_t payload[8];
205 struct intel_bo *bo;
206 };
207
208 struct ilo_view_cso {
209 struct pipe_sampler_view base;
210
211 struct ilo_view_surface surface;
212 };
213
214 struct ilo_view_state {
215 struct pipe_sampler_view *states[ILO_MAX_SAMPLER_VIEWS];
216 unsigned count;
217 };
218
219 struct ilo_cbuf_cso {
220 struct pipe_resource *resource;
221 struct ilo_view_surface surface;
222
223 /*
224 * this CSO is not so constant because user buffer needs to be uploaded in
225 * finalize_constant_buffers()
226 */
227 const void *user_buffer;
228 unsigned user_buffer_size;
229 };
230
231 struct ilo_cbuf_state {
232 struct ilo_cbuf_cso cso[ILO_MAX_CONST_BUFFERS];
233 uint32_t enabled_mask;
234 };
235
236 struct ilo_resource_state {
237 struct pipe_surface *states[PIPE_MAX_SHADER_RESOURCES];
238 unsigned count;
239 };
240
241 struct ilo_surface_cso {
242 struct pipe_surface base;
243
244 bool is_rt;
245 union {
246 struct ilo_view_surface rt;
247 struct ilo_zs_surface {
248 uint32_t payload[10];
249 struct intel_bo *bo;
250 struct intel_bo *hiz_bo;
251 struct intel_bo *separate_s8_bo;
252 } zs;
253 } u;
254 };
255
256 struct ilo_fb_state {
257 struct pipe_framebuffer_state state;
258
259 struct ilo_view_surface null_rt;
260 struct ilo_zs_surface null_zs;
261
262 unsigned num_samples;
263 bool offset_to_layers;
264 };
265
266 struct ilo_global_binding {
267 /*
268 * XXX These should not be treated as real resources (and there could be
269 * thousands of them). They should be treated as regions in GLOBAL
270 * resource, which is the only real resource.
271 *
272 * That is, a resource here should instead be
273 *
274 * struct ilo_global_region {
275 * struct pipe_resource base;
276 * int offset;
277 * int size;
278 * };
279 *
280 * and it describes the region [offset, offset + size) in GLOBAL
281 * resource.
282 */
283 struct pipe_resource *resources[PIPE_MAX_SHADER_RESOURCES];
284 uint32_t *handles[PIPE_MAX_SHADER_RESOURCES];
285 unsigned count;
286 };
287
288 struct ilo_shader_cso {
289 uint32_t payload[5];
290 };
291
292 void
293 ilo_gpe_init_ve(const struct ilo_dev_info *dev,
294 unsigned num_states,
295 const struct pipe_vertex_element *states,
296 struct ilo_ve_state *ve);
297
298 void
299 ilo_gpe_set_viewport_cso(const struct ilo_dev_info *dev,
300 const struct pipe_viewport_state *state,
301 struct ilo_viewport_cso *vp);
302
303 void
304 ilo_gpe_set_scissor(const struct ilo_dev_info *dev,
305 unsigned start_slot,
306 unsigned num_states,
307 const struct pipe_scissor_state *states,
308 struct ilo_scissor_state *scissor);
309
310 void
311 ilo_gpe_set_scissor_null(const struct ilo_dev_info *dev,
312 struct ilo_scissor_state *scissor);
313
314 void
315 ilo_gpe_init_rasterizer_clip(const struct ilo_dev_info *dev,
316 const struct pipe_rasterizer_state *state,
317 struct ilo_rasterizer_clip *clip);
318
319 void
320 ilo_gpe_init_rasterizer_sf(const struct ilo_dev_info *dev,
321 const struct pipe_rasterizer_state *state,
322 struct ilo_rasterizer_sf *sf);
323
324 void
325 ilo_gpe_init_rasterizer_wm_gen6(const struct ilo_dev_info *dev,
326 const struct pipe_rasterizer_state *state,
327 struct ilo_rasterizer_wm *wm);
328
329 void
330 ilo_gpe_init_rasterizer_wm_gen7(const struct ilo_dev_info *dev,
331 const struct pipe_rasterizer_state *state,
332 struct ilo_rasterizer_wm *wm);
333
334 static inline void
335 ilo_gpe_init_rasterizer(const struct ilo_dev_info *dev,
336 const struct pipe_rasterizer_state *state,
337 struct ilo_rasterizer_state *rasterizer)
338 {
339 ilo_gpe_init_rasterizer_clip(dev, state, &rasterizer->clip);
340 ilo_gpe_init_rasterizer_sf(dev, state, &rasterizer->sf);
341
342 if (dev->gen >= ILO_GEN(7))
343 ilo_gpe_init_rasterizer_wm_gen7(dev, state, &rasterizer->wm);
344 else
345 ilo_gpe_init_rasterizer_wm_gen6(dev, state, &rasterizer->wm);
346 }
347
348 void
349 ilo_gpe_init_dsa(const struct ilo_dev_info *dev,
350 const struct pipe_depth_stencil_alpha_state *state,
351 struct ilo_dsa_state *dsa);
352
353 void
354 ilo_gpe_init_blend(const struct ilo_dev_info *dev,
355 const struct pipe_blend_state *state,
356 struct ilo_blend_state *blend);
357
358 void
359 ilo_gpe_init_sampler_cso(const struct ilo_dev_info *dev,
360 const struct pipe_sampler_state *state,
361 struct ilo_sampler_cso *sampler);
362
363 void
364 ilo_gpe_init_view_surface_null_gen6(const struct ilo_dev_info *dev,
365 unsigned width, unsigned height,
366 unsigned depth, unsigned level,
367 struct ilo_view_surface *surf);
368
369 void
370 ilo_gpe_init_view_surface_for_buffer_gen6(const struct ilo_dev_info *dev,
371 const struct ilo_buffer *buf,
372 unsigned offset, unsigned size,
373 unsigned struct_size,
374 enum pipe_format elem_format,
375 bool is_rt, bool render_cache_rw,
376 struct ilo_view_surface *surf);
377
378 void
379 ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
380 const struct ilo_texture *tex,
381 enum pipe_format format,
382 unsigned first_level,
383 unsigned num_levels,
384 unsigned first_layer,
385 unsigned num_layers,
386 bool is_rt, bool offset_to_layer,
387 struct ilo_view_surface *surf);
388
389 void
390 ilo_gpe_init_view_surface_null_gen7(const struct ilo_dev_info *dev,
391 unsigned width, unsigned height,
392 unsigned depth, unsigned level,
393 struct ilo_view_surface *surf);
394
395 void
396 ilo_gpe_init_view_surface_for_buffer_gen7(const struct ilo_dev_info *dev,
397 const struct ilo_buffer *buf,
398 unsigned offset, unsigned size,
399 unsigned struct_size,
400 enum pipe_format elem_format,
401 bool is_rt, bool render_cache_rw,
402 struct ilo_view_surface *surf);
403
404 void
405 ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
406 const struct ilo_texture *tex,
407 enum pipe_format format,
408 unsigned first_level,
409 unsigned num_levels,
410 unsigned first_layer,
411 unsigned num_layers,
412 bool is_rt, bool offset_to_layer,
413 struct ilo_view_surface *surf);
414
415 static inline void
416 ilo_gpe_init_view_surface_null(const struct ilo_dev_info *dev,
417 unsigned width, unsigned height,
418 unsigned depth, unsigned level,
419 struct ilo_view_surface *surf)
420 {
421 if (dev->gen >= ILO_GEN(7)) {
422 ilo_gpe_init_view_surface_null_gen7(dev,
423 width, height, depth, level, surf);
424 }
425 else {
426 ilo_gpe_init_view_surface_null_gen6(dev,
427 width, height, depth, level, surf);
428 }
429 }
430
431 static inline void
432 ilo_gpe_init_view_surface_for_buffer(const struct ilo_dev_info *dev,
433 const struct ilo_buffer *buf,
434 unsigned offset, unsigned size,
435 unsigned struct_size,
436 enum pipe_format elem_format,
437 bool is_rt, bool render_cache_rw,
438 struct ilo_view_surface *surf)
439 {
440 if (dev->gen >= ILO_GEN(7)) {
441 ilo_gpe_init_view_surface_for_buffer_gen7(dev, buf, offset, size,
442 struct_size, elem_format, is_rt, render_cache_rw, surf);
443 }
444 else {
445 ilo_gpe_init_view_surface_for_buffer_gen6(dev, buf, offset, size,
446 struct_size, elem_format, is_rt, render_cache_rw, surf);
447 }
448 }
449
450 static inline void
451 ilo_gpe_init_view_surface_for_texture(const struct ilo_dev_info *dev,
452 const struct ilo_texture *tex,
453 enum pipe_format format,
454 unsigned first_level,
455 unsigned num_levels,
456 unsigned first_layer,
457 unsigned num_layers,
458 bool is_rt, bool offset_to_layer,
459 struct ilo_view_surface *surf)
460 {
461 if (dev->gen >= ILO_GEN(7)) {
462 ilo_gpe_init_view_surface_for_texture_gen7(dev, tex, format,
463 first_level, num_levels, first_layer, num_layers,
464 is_rt, offset_to_layer, surf);
465 }
466 else {
467 ilo_gpe_init_view_surface_for_texture_gen6(dev, tex, format,
468 first_level, num_levels, first_layer, num_layers,
469 is_rt, offset_to_layer, surf);
470 }
471 }
472
473 void
474 ilo_gpe_init_zs_surface(const struct ilo_dev_info *dev,
475 const struct ilo_texture *tex,
476 enum pipe_format format, unsigned level,
477 unsigned first_layer, unsigned num_layers,
478 bool offset_to_layer, struct ilo_zs_surface *zs);
479
480 void
481 ilo_gpe_init_vs_cso(const struct ilo_dev_info *dev,
482 const struct ilo_shader_state *vs,
483 struct ilo_shader_cso *cso);
484
485 void
486 ilo_gpe_init_gs_cso_gen6(const struct ilo_dev_info *dev,
487 const struct ilo_shader_state *gs,
488 struct ilo_shader_cso *cso);
489
490 void
491 ilo_gpe_init_gs_cso_gen7(const struct ilo_dev_info *dev,
492 const struct ilo_shader_state *gs,
493 struct ilo_shader_cso *cso);
494
495 static inline void
496 ilo_gpe_init_gs_cso(const struct ilo_dev_info *dev,
497 const struct ilo_shader_state *gs,
498 struct ilo_shader_cso *cso)
499 {
500 if (dev->gen >= ILO_GEN(7)) {
501 ilo_gpe_init_gs_cso_gen7(dev, gs, cso);
502 }
503 else {
504 ilo_gpe_init_gs_cso_gen6(dev, gs, cso);
505 }
506 }
507
508 void
509 ilo_gpe_init_fs_cso_gen6(const struct ilo_dev_info *dev,
510 const struct ilo_shader_state *fs,
511 struct ilo_shader_cso *cso);
512
513 void
514 ilo_gpe_init_fs_cso_gen7(const struct ilo_dev_info *dev,
515 const struct ilo_shader_state *fs,
516 struct ilo_shader_cso *cso);
517
518 static inline void
519 ilo_gpe_init_fs_cso(const struct ilo_dev_info *dev,
520 const struct ilo_shader_state *fs,
521 struct ilo_shader_cso *cso)
522 {
523 if (dev->gen >= ILO_GEN(7)) {
524 ilo_gpe_init_fs_cso_gen7(dev, fs, cso);
525 }
526 else {
527 ilo_gpe_init_fs_cso_gen6(dev, fs, cso);
528 }
529 }
530
531 void
532 ilo_gpe_set_fb(const struct ilo_dev_info *dev,
533 const struct pipe_framebuffer_state *state,
534 struct ilo_fb_state *fb);
535
536 #endif /* ILO_GPE_H */