4c06b766eb246ddc28612398f7d05a43fc078ccb
[mesa.git] / src / gallium / drivers / ilo / ilo_render.h
1 /*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2013 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28 #ifndef ILO_RENDER_H
29 #define ILO_RENDER_H
30
31 #include "ilo_common.h"
32 #include "ilo_state.h"
33
34 struct intel_bo;
35 struct ilo_blitter;
36 struct ilo_cp;
37 struct ilo_query;
38 struct ilo_state_vector;
39
40 enum ilo_render_invalidate_flags {
41 ILO_RENDER_INVALIDATE_HW = 1 << 0,
42 ILO_RENDER_INVALIDATE_BATCH_BO = 1 << 1,
43 ILO_RENDER_INVALIDATE_STATE_BO = 1 << 2,
44 ILO_RENDER_INVALIDATE_KERNEL_BO = 1 << 3,
45
46 ILO_RENDER_INVALIDATE_ALL = 0xffffffff,
47 };
48
49 enum ilo_render_action {
50 ILO_RENDER_DRAW,
51 ILO_RENDER_FLUSH,
52 ILO_RENDER_QUERY,
53 ILO_RENDER_RECTLIST,
54 };
55
56 /**
57 * Render Engine.
58 */
59 struct ilo_render {
60 const struct ilo_dev_info *dev;
61 struct ilo_builder *builder;
62
63 uint32_t invalidate_flags;
64
65 struct intel_bo *workaround_bo;
66
67 uint32_t packed_sample_position_1x;
68 uint32_t packed_sample_position_4x;
69 uint32_t packed_sample_position_8x[2];
70
71 int (*estimate_size)(struct ilo_render *render,
72 enum ilo_render_action action,
73 const void *arg);
74
75 void (*emit_draw)(struct ilo_render *render,
76 const struct ilo_state_vector *vec);
77
78 void (*emit_flush)(struct ilo_render *render);
79
80 void (*emit_query)(struct ilo_render *render,
81 struct ilo_query *q, uint32_t offset);
82
83 void (*emit_rectlist)(struct ilo_render *render,
84 const struct ilo_blitter *blitter);
85
86 /**
87 * HW states.
88 */
89 struct ilo_render_state {
90 /*
91 * When a WA is needed before some command, we always emit the WA right
92 * before the command. Knowing what have already been done since last
93 * 3DPRIMITIVE allows us to skip some WAs.
94 */
95 uint32_t current_pipe_control_dw1;
96
97 /*
98 * When a WA is needed after some command, we may have the WA follow the
99 * command immediately or defer it. If this is non-zero, a PIPE_CONTROL
100 * will be emitted before 3DPRIMITIVE.
101 */
102 uint32_t deferred_pipe_control_dw1;
103
104 bool primitive_restart;
105 int reduced_prim;
106 int so_max_vertices;
107
108 uint32_t SF_VIEWPORT;
109 uint32_t CLIP_VIEWPORT;
110 uint32_t SF_CLIP_VIEWPORT; /* GEN7+ */
111 uint32_t CC_VIEWPORT;
112
113 uint32_t COLOR_CALC_STATE;
114 uint32_t BLEND_STATE;
115 uint32_t DEPTH_STENCIL_STATE;
116
117 uint32_t SCISSOR_RECT;
118
119 struct {
120 uint32_t BINDING_TABLE_STATE;
121 int BINDING_TABLE_STATE_size;
122 uint32_t SURFACE_STATE[ILO_MAX_VS_SURFACES];
123 uint32_t SAMPLER_STATE;
124 uint32_t SAMPLER_BORDER_COLOR_STATE[ILO_MAX_SAMPLERS];
125 uint32_t PUSH_CONSTANT_BUFFER;
126 int PUSH_CONSTANT_BUFFER_size;
127 } vs;
128
129 struct {
130 uint32_t BINDING_TABLE_STATE;
131 int BINDING_TABLE_STATE_size;
132 uint32_t SURFACE_STATE[ILO_MAX_GS_SURFACES];
133 bool active;
134 } gs;
135
136 struct {
137 uint32_t BINDING_TABLE_STATE;
138 int BINDING_TABLE_STATE_size;
139 uint32_t SURFACE_STATE[ILO_MAX_WM_SURFACES];
140 uint32_t SAMPLER_STATE;
141 uint32_t SAMPLER_BORDER_COLOR_STATE[ILO_MAX_SAMPLERS];
142 uint32_t PUSH_CONSTANT_BUFFER;
143 int PUSH_CONSTANT_BUFFER_size;
144 } wm;
145 } state;
146 };
147
148 struct ilo_render *
149 ilo_render_create(struct ilo_builder *builder);
150
151 void
152 ilo_render_destroy(struct ilo_render *render);
153
154
155 static inline void
156 ilo_render_invalidate(struct ilo_render *render, uint32_t flags)
157 {
158 render->invalidate_flags |= flags;
159
160 /* Kernel flushes everything. Shouldn't we set all bits here? */
161 render->state.current_pipe_control_dw1 = 0;
162 }
163
164 /**
165 * Estimate the size of an action.
166 */
167 static inline int
168 ilo_render_estimate_size(struct ilo_render *render,
169 enum ilo_render_action action,
170 const void *arg)
171 {
172 return render->estimate_size(render, action, arg);
173 }
174
175 /**
176 * Emit context states and 3DPRIMITIVE.
177 */
178 static inline void
179 ilo_render_emit_draw(struct ilo_render *render,
180 const struct ilo_state_vector *vec)
181 {
182 render->emit_draw(render, vec);
183 }
184
185 /**
186 * Emit PIPE_CONTROL to flush all caches.
187 */
188 static inline void
189 ilo_render_emit_flush(struct ilo_render *render)
190 {
191 render->emit_flush(render);
192 }
193
194 /**
195 * Emit PIPE_CONTROL or MI_STORE_REGISTER_MEM to save register values.
196 */
197 static inline void
198 ilo_render_emit_query(struct ilo_render *render,
199 struct ilo_query *q, uint32_t offset)
200 {
201 render->emit_query(render, q, offset);
202 }
203
204 static inline void
205 ilo_render_emit_rectlist(struct ilo_render *render,
206 const struct ilo_blitter *blitter)
207 {
208 render->emit_rectlist(render, blitter);
209 }
210
211 void
212 ilo_render_get_sample_position(struct ilo_render *render,
213 unsigned sample_count,
214 unsigned sample_index,
215 float *x, float *y);
216
217 #endif /* ILO_RENDER_H */