src/gallium/drivers/ilo/ilo_screen.c

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2012-2013 LunarG, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Chia-I Wu <olv@lunarg.com>
  26  */
  27
  28 #include "pipe/p_state.h"
  29 #include "os/os_misc.h"
  30 #include "util/u_format_s3tc.h"
  31 #include "vl/vl_decoder.h"
  32 #include "vl/vl_video_buffer.h"
  33 #include "genhw/genhw.h" /* for GEN6_REG_TIMESTAMP */
  34 #include "core/ilo_format.h"
  35 #include "core/intel_winsys.h"
  36
  37 #include "ilo_context.h"
  38 #include "ilo_resource.h"
  39 #include "ilo_transfer.h" /* for ILO_TRANSFER_MAP_BUFFER_ALIGNMENT */
  40 #include "ilo_public.h"
  41 #include "ilo_screen.h"
  42
  43 struct pipe_fence_handle {
  44    struct pipe_reference reference;
  45    struct intel_bo *seqno_bo;
  46 };
  47
  48 static float
  49 ilo_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
  50 {
  51    switch (param) {
  52    case PIPE_CAPF_MAX_LINE_WIDTH:
  53       /* in U3.7, defined in 3DSTATE_SF */
  54       return 7.0f;
  55    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
  56       /* line width minus one, which is reserved for AA region */
  57       return 6.0f;
  58    case PIPE_CAPF_MAX_POINT_WIDTH:
  59       /* in U8.3, defined in 3DSTATE_SF */
  60       return 255.0f;
  61    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
  62       /* same as point width, as we ignore rasterizer->point_smooth */
  63       return 255.0f;
  64    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
  65       /* [2.0, 16.0], defined in SAMPLER_STATE */
  66       return 16.0f;
  67    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
  68       /* [-16.0, 16.0), defined in SAMPLER_STATE */
  69       return 15.0f;
  70    case PIPE_CAPF_GUARD_BAND_LEFT:
  71    case PIPE_CAPF_GUARD_BAND_TOP:
  72    case PIPE_CAPF_GUARD_BAND_RIGHT:
  73    case PIPE_CAPF_GUARD_BAND_BOTTOM:
  74       /* what are these for? */
  75       return 0.0f;
  76
  77    default:
  78       return 0.0f;
  79    }
  80 }
  81
  82 static int
  83 ilo_get_shader_param(struct pipe_screen *screen, unsigned shader,
  84                      enum pipe_shader_cap param)
  85 {
  86    switch (shader) {
  87    case PIPE_SHADER_FRAGMENT:
  88    case PIPE_SHADER_VERTEX:
  89    case PIPE_SHADER_GEOMETRY:
  90       break;
  91    default:
  92       return 0;
  93    }
  94
  95    switch (param) {
  96    /* the limits are copied from the classic driver */
  97    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
  98       return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 16384;
  99    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 100       return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
 101    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 102       return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
 103    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 104       return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
 105    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 106       return UINT_MAX;
 107    case PIPE_SHADER_CAP_MAX_INPUTS:
 108    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 109       /* this is limited by how many attributes SF can remap */
 110       return 16;
 111    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 112       return 1024 * sizeof(float[4]);
 113    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 114       return ILO_MAX_CONST_BUFFERS;
 115    case PIPE_SHADER_CAP_MAX_TEMPS:
 116       return 256;
 117    case PIPE_SHADER_CAP_MAX_PREDS:
 118       return 0;
 119    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 120       return 1;
 121    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 122       return 0;
 123    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 124       return 0;
 125    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 126       return (shader == PIPE_SHADER_FRAGMENT) ? 0 : 1;
 127    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 128       return 1;
 129    case PIPE_SHADER_CAP_SUBROUTINES:
 130       return 0;
 131    case PIPE_SHADER_CAP_INTEGERS:
 132       return 1;
 133    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 134       return ILO_MAX_SAMPLERS;
 135    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 136       return ILO_MAX_SAMPLER_VIEWS;
 137    case PIPE_SHADER_CAP_PREFERRED_IR:
 138       return PIPE_SHADER_IR_TGSI;
 139    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 140       return 1;
 141
 142    default:
 143       return 0;
 144    }
 145 }
 146
 147 static int
 148 ilo_get_video_param(struct pipe_screen *screen,
 149                     enum pipe_video_profile profile,
 150                     enum pipe_video_entrypoint entrypoint,
 151                     enum pipe_video_cap param)
 152 {
 153    switch (param) {
 154    case PIPE_VIDEO_CAP_SUPPORTED:
 155       return vl_profile_supported(screen, profile, entrypoint);
 156    case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 157       return 1;
 158    case PIPE_VIDEO_CAP_MAX_WIDTH:
 159    case PIPE_VIDEO_CAP_MAX_HEIGHT:
 160       return vl_video_buffer_max_size(screen);
 161    case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 162       return PIPE_FORMAT_NV12;
 163    case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 164       return 1;
 165    case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 166       return 1;
 167    case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 168       return 0;
 169    case PIPE_VIDEO_CAP_MAX_LEVEL:
 170       return vl_level_supported(screen, profile);
 171    default:
 172       return 0;
 173    }
 174 }
 175
 176 static int
 177 ilo_get_compute_param(struct pipe_screen *screen,
 178                       enum pipe_compute_cap param,
 179                       void *ret)
 180 {
 181    struct ilo_screen *is = ilo_screen(screen);
 182    union {
 183       const char *ir_target;
 184       uint64_t grid_dimension;
 185       uint64_t max_grid_size[3];
 186       uint64_t max_block_size[3];
 187       uint64_t max_threads_per_block;
 188       uint64_t max_global_size;
 189       uint64_t max_local_size;
 190       uint64_t max_private_size;
 191       uint64_t max_input_size;
 192       uint64_t max_mem_alloc_size;
 193       uint32_t max_clock_frequency;
 194       uint32_t max_compute_units;
 195       uint32_t images_supported;
 196    } val;
 197    const void *ptr;
 198    int size;
 199
 200    switch (param) {
 201    case PIPE_COMPUTE_CAP_IR_TARGET:
 202       val.ir_target = "ilog";
 203
 204       ptr = val.ir_target;
 205       size = strlen(val.ir_target) + 1;
 206       break;
 207    case PIPE_COMPUTE_CAP_GRID_DIMENSION:
 208       val.grid_dimension = Elements(val.max_grid_size);
 209
 210       ptr = &val.grid_dimension;
 211       size = sizeof(val.grid_dimension);
 212       break;
 213    case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 214       val.max_grid_size[0] = 0xffffffffu;
 215       val.max_grid_size[1] = 0xffffffffu;
 216       val.max_grid_size[2] = 0xffffffffu;
 217
 218       ptr = &val.max_grid_size;
 219       size = sizeof(val.max_grid_size);
 220       break;
 221    case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 222       val.max_block_size[0] = 1024;
 223       val.max_block_size[1] = 1024;
 224       val.max_block_size[2] = 1024;
 225
 226       ptr = &val.max_block_size;
 227       size = sizeof(val.max_block_size);
 228       break;
 229
 230    case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 231       val.max_threads_per_block = 1024;
 232
 233       ptr = &val.max_threads_per_block;
 234       size = sizeof(val.max_threads_per_block);
 235       break;
 236    case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
 237       /* \see ilo_max_resource_size */
 238       val.max_global_size = 1u << 31;
 239
 240       ptr = &val.max_global_size;
 241       size = sizeof(val.max_global_size);
 242       break;
 243    case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 244       /* Shared Local Memory Size of INTERFACE_DESCRIPTOR_DATA */
 245       val.max_local_size = 64 * 1024;
 246
 247       ptr = &val.max_local_size;
 248       size = sizeof(val.max_local_size);
 249       break;
 250    case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 251       /* scratch size */
 252       val.max_private_size = 12 * 1024;
 253
 254       ptr = &val.max_private_size;
 255       size = sizeof(val.max_private_size);
 256       break;
 257    case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
 258       val.max_input_size = 1024;
 259
 260       ptr = &val.max_input_size;
 261       size = sizeof(val.max_input_size);
 262       break;
 263    case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
 264       val.max_mem_alloc_size = 1u << 31;
 265
 266       ptr = &val.max_mem_alloc_size;
 267       size = sizeof(val.max_mem_alloc_size);
 268       break;
 269    case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
 270       val.max_clock_frequency = 1000;
 271
 272       ptr = &val.max_clock_frequency;
 273       size = sizeof(val.max_clock_frequency);
 274       break;
 275    case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
 276       val.max_compute_units = is->dev.eu_count;
 277
 278       ptr = &val.max_compute_units;
 279       size = sizeof(val.max_compute_units);
 280       break;
 281    case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
 282       val.images_supported = 1;
 283
 284       ptr = &val.images_supported;
 285       size = sizeof(val.images_supported);
 286       break;
 287    default:
 288       ptr = NULL;
 289       size = 0;
 290       break;
 291    }
 292
 293    if (ret)
 294       memcpy(ret, ptr, size);
 295
 296    return size;
 297 }
 298
 299 static int
 300 ilo_get_param(struct pipe_screen *screen, enum pipe_cap param)
 301 {
 302    struct ilo_screen *is = ilo_screen(screen);
 303
 304    switch (param) {
 305    case PIPE_CAP_NPOT_TEXTURES:
 306    case PIPE_CAP_TWO_SIDED_STENCIL:
 307       return true;
 308    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 309       return 0; /* TODO */
 310    case PIPE_CAP_ANISOTROPIC_FILTER:
 311    case PIPE_CAP_POINT_SPRITE:
 312       return true;
 313    case PIPE_CAP_MAX_RENDER_TARGETS:
 314       return ILO_MAX_DRAW_BUFFERS;
 315    case PIPE_CAP_OCCLUSION_QUERY:
 316    case PIPE_CAP_QUERY_TIME_ELAPSED:
 317    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 318    case PIPE_CAP_TEXTURE_SWIZZLE: /* must be supported for shadow map */
 319       return true;
 320    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 321       /*
 322        * As defined in SURFACE_STATE, we have
 323        *
 324        *           Max WxHxD for 2D and CUBE     Max WxHxD for 3D
 325        *  GEN6           8192x8192x512            2048x2048x2048
 326        *  GEN7         16384x16384x2048           2048x2048x2048
 327        */
 328       return (ilo_dev_gen(&is->dev) >= ILO_GEN(7)) ? 15 : 14;
 329    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 330       return 12;
 331    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 332       return (ilo_dev_gen(&is->dev) >= ILO_GEN(7)) ? 15 : 14;
 333    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 334       return false;
 335    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 336    case PIPE_CAP_SM3:
 337       return true;
 338    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 339       if (ilo_dev_gen(&is->dev) >= ILO_GEN(7) && !is->dev.has_gen7_sol_reset)
 340          return 0;
 341       return ILO_MAX_SO_BUFFERS;
 342    case PIPE_CAP_PRIMITIVE_RESTART:
 343       return true;
 344    case PIPE_CAP_INDEP_BLEND_ENABLE:
 345    case PIPE_CAP_INDEP_BLEND_FUNC:
 346       return true;
 347    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 348       return (ilo_dev_gen(&is->dev) >= ILO_GEN(7)) ? 2048 : 512;
 349    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 350    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 351    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 352    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 353    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 354       return true;
 355    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 356       return false;
 357    case PIPE_CAP_TGSI_INSTANCEID:
 358    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 359       return true;
 360    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 361       return false;
 362    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 363       return true;
 364    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 365    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 366       return true;
 367    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 368    case PIPE_CAP_MIN_TEXEL_OFFSET:
 369       return -8;
 370    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 371    case PIPE_CAP_MAX_TEXEL_OFFSET:
 372       return 7;
 373    case PIPE_CAP_CONDITIONAL_RENDER:
 374    case PIPE_CAP_TEXTURE_BARRIER:
 375       return true;
 376    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 377       return ILO_MAX_SO_BINDINGS / ILO_MAX_SO_BUFFERS;
 378    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 379       return ILO_MAX_SO_BINDINGS;
 380    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 381       if (ilo_dev_gen(&is->dev) >= ILO_GEN(7))
 382          return is->dev.has_gen7_sol_reset;
 383       else
 384          return false; /* TODO */
 385    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 386       return false;
 387    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 388       return true;
 389    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 390       return false;
 391    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 392       return 140;
 393    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 394    case PIPE_CAP_USER_VERTEX_BUFFERS:
 395       return false;
 396    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 397    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 398    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 399       return false;
 400    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 401       return 2048;
 402    case PIPE_CAP_COMPUTE:
 403       return false; /* TODO */
 404    case PIPE_CAP_USER_INDEX_BUFFERS:
 405    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 406       return true;
 407    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 408       /* imposed by OWord (Dual) Block Read */
 409       return 16;
 410    case PIPE_CAP_START_INSTANCE:
 411       return true;
 412    case PIPE_CAP_QUERY_TIMESTAMP:
 413       return is->dev.has_timestamp;
 414    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 415       return false; /* TODO */
 416    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 417       return ILO_TRANSFER_MAP_BUFFER_ALIGNMENT;
 418    case PIPE_CAP_CUBE_MAP_ARRAY:
 419    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 420       return true;
 421    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 422       return 1;
 423    case PIPE_CAP_TGSI_TEXCOORD:
 424       return false;
 425    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 426    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 427       return true;
 428    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 429       return 0;
 430    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 431       /* a GEN6_SURFTYPE_BUFFER can have up to 2^27 elements */
 432       return 1 << 27;
 433    case PIPE_CAP_MAX_VIEWPORTS:
 434       return ILO_MAX_VIEWPORTS;
 435    case PIPE_CAP_ENDIANNESS:
 436       return PIPE_ENDIAN_LITTLE;
 437    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 438       return true;
 439    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 440    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 441    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 442    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 443    case PIPE_CAP_TEXTURE_GATHER_SM5:
 444       return 0;
 445    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 446       return true;
 447    case PIPE_CAP_FAKE_SW_MSAA:
 448    case PIPE_CAP_TEXTURE_QUERY_LOD:
 449    case PIPE_CAP_SAMPLE_SHADING:
 450    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 451    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 452    case PIPE_CAP_MAX_VERTEX_STREAMS:
 453    case PIPE_CAP_DRAW_INDIRECT:
 454    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 455    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 456    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 457    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 458    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 459    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 460       return 0;
 461
 462    case PIPE_CAP_VENDOR_ID:
 463       return 0x8086;
 464    case PIPE_CAP_DEVICE_ID:
 465       return is->dev.devid;
 466    case PIPE_CAP_ACCELERATED:
 467       return true;
 468    case PIPE_CAP_VIDEO_MEMORY: {
 469       /* Once a batch uses more than 75% of the maximum mappable size, we
 470        * assume that there's some fragmentation, and we start doing extra
 471        * flushing, etc.  That's the big cliff apps will care about.
 472        */
 473       const uint64_t gpu_memory = is->dev.aperture_total * 3 / 4;
 474       uint64_t system_memory;
 475
 476       if (!os_get_total_physical_memory(&system_memory))
 477          return 0;
 478
 479       return (int) (MIN2(gpu_memory, system_memory) >> 20);
 480    }
 481    case PIPE_CAP_UMA:
 482       return true;
 483    case PIPE_CAP_CLIP_HALFZ:
 484       return true;
 485    case PIPE_CAP_VERTEXID_NOBASE:
 486       return false;
 487    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 488       return true;
 489
 490    default:
 491       return 0;
 492    }
 493 }
 494
 495 static const char *
 496 ilo_get_vendor(struct pipe_screen *screen)
 497 {
 498    return "LunarG, Inc.";
 499 }
 500
 501 static const char *
 502 ilo_get_device_vendor(struct pipe_screen *screen)
 503 {
 504    return "Intel";
 505 }
 506
 507 static const char *
 508 ilo_get_name(struct pipe_screen *screen)
 509 {
 510    struct ilo_screen *is = ilo_screen(screen);
 511    const char *chipset = NULL;
 512
 513    if (gen_is_chv(is->dev.devid)) {
 514       chipset = "Intel(R) Cherryview";
 515    } else if (gen_is_bdw(is->dev.devid)) {
 516       /* this is likely wrong */
 517       if (gen_is_desktop(is->dev.devid))
 518          chipset = "Intel(R) Broadwell Desktop";
 519       else if (gen_is_mobile(is->dev.devid))
 520          chipset = "Intel(R) Broadwell Mobile";
 521       else if (gen_is_server(is->dev.devid))
 522          chipset = "Intel(R) Broadwell Server";
 523    } else if (gen_is_vlv(is->dev.devid)) {
 524       chipset = "Intel(R) Bay Trail";
 525    } else if (gen_is_hsw(is->dev.devid)) {
 526       if (gen_is_desktop(is->dev.devid))
 527          chipset = "Intel(R) Haswell Desktop";
 528       else if (gen_is_mobile(is->dev.devid))
 529          chipset = "Intel(R) Haswell Mobile";
 530       else if (gen_is_server(is->dev.devid))
 531          chipset = "Intel(R) Haswell Server";
 532    } else if (gen_is_ivb(is->dev.devid)) {
 533       if (gen_is_desktop(is->dev.devid))
 534          chipset = "Intel(R) Ivybridge Desktop";
 535       else if (gen_is_mobile(is->dev.devid))
 536          chipset = "Intel(R) Ivybridge Mobile";
 537       else if (gen_is_server(is->dev.devid))
 538          chipset = "Intel(R) Ivybridge Server";
 539    } else if (gen_is_snb(is->dev.devid)) {
 540       if (gen_is_desktop(is->dev.devid))
 541          chipset = "Intel(R) Sandybridge Desktop";
 542       else if (gen_is_mobile(is->dev.devid))
 543          chipset = "Intel(R) Sandybridge Mobile";
 544       else if (gen_is_server(is->dev.devid))
 545          chipset = "Intel(R) Sandybridge Server";
 546    }
 547
 548    if (!chipset)
 549       chipset = "Unknown Intel Chipset";
 550
 551    return chipset;
 552 }
 553
 554 static uint64_t
 555 ilo_get_timestamp(struct pipe_screen *screen)
 556 {
 557    struct ilo_screen *is = ilo_screen(screen);
 558    union {
 559       uint64_t val;
 560       uint32_t dw[2];
 561    } timestamp;
 562
 563    intel_winsys_read_reg(is->dev.winsys, GEN6_REG_TIMESTAMP, &timestamp.val);
 564
 565    /*
 566     * From the Ivy Bridge PRM, volume 1 part 3, page 107:
 567     *
 568     *     "Note: This timestamp register reflects the value of the PCU TSC.
 569     *      The PCU TSC counts 10ns increments; this timestamp reflects bits
 570     *      38:3 of the TSC (i.e. 80ns granularity, rolling over every 1.5
 571     *      hours)."
 572     *
 573     * However, it seems dw[0] is garbage and dw[1] contains the lower 32 bits
 574     * of the timestamp.  We will have to live with a timestamp that rolls over
 575     * every ~343 seconds.
 576     *
 577     * See also brw_get_timestamp().
 578     */
 579    return (uint64_t) timestamp.dw[1] * 80;
 580 }
 581
 582 static boolean
 583 ilo_is_format_supported(struct pipe_screen *screen,
 584                         enum pipe_format format,
 585                         enum pipe_texture_target target,
 586                         unsigned sample_count,
 587                         unsigned bindings)
 588 {
 589    struct ilo_screen *is = ilo_screen(screen);
 590    const struct ilo_dev *dev = &is->dev;
 591
 592    if (!util_format_is_supported(format, bindings))
 593       return false;
 594
 595    /* no MSAA support yet */
 596    if (sample_count > 1)
 597       return false;
 598
 599    if ((bindings & PIPE_BIND_DEPTH_STENCIL) &&
 600        !ilo_format_support_zs(dev, format))
 601       return false;
 602
 603    if ((bindings & PIPE_BIND_RENDER_TARGET) &&
 604        !ilo_format_support_rt(dev, format))
 605       return false;
 606
 607    if ((bindings & PIPE_BIND_SAMPLER_VIEW) &&
 608        !ilo_format_support_sampler(dev, format))
 609       return false;
 610
 611    if ((bindings & PIPE_BIND_VERTEX_BUFFER) &&
 612        !ilo_format_support_vb(dev, format))
 613       return false;
 614
 615    return true;
 616 }
 617
 618 static boolean
 619 ilo_is_video_format_supported(struct pipe_screen *screen,
 620                               enum pipe_format format,
 621                               enum pipe_video_profile profile,
 622                               enum pipe_video_entrypoint entrypoint)
 623 {
 624    return vl_video_buffer_is_format_supported(screen, format, profile, entrypoint);
 625 }
 626
 627 static void
 628 ilo_screen_fence_reference(struct pipe_screen *screen,
 629                            struct pipe_fence_handle **ptr,
 630                            struct pipe_fence_handle *fence)
 631 {
 632    struct pipe_fence_handle *old;
 633
 634    if (likely(ptr)) {
 635       old = *ptr;
 636       *ptr = fence;
 637    } else {
 638       old = NULL;
 639    }
 640
 641    STATIC_ASSERT(&((struct pipe_fence_handle *) NULL)->reference == NULL);
 642    if (pipe_reference(&old->reference, &fence->reference)) {
 643       intel_bo_unref(old->seqno_bo);
 644       FREE(old);
 645    }
 646 }
 647
 648 static boolean
 649 ilo_screen_fence_finish(struct pipe_screen *screen,
 650                         struct pipe_fence_handle *fence,
 651                         uint64_t timeout)
 652 {
 653    const int64_t wait_timeout = (timeout > INT64_MAX) ? -1 : timeout;
 654    bool signaled;
 655
 656    signaled = (!fence->seqno_bo ||
 657          intel_bo_wait(fence->seqno_bo, wait_timeout) == 0);
 658
 659    /* XXX not thread safe */
 660    if (signaled && fence->seqno_bo) {
 661       intel_bo_unref(fence->seqno_bo);
 662       fence->seqno_bo = NULL;
 663    }
 664
 665    return signaled;
 666 }
 667
 668 static boolean
 669 ilo_screen_fence_signalled(struct pipe_screen *screen,
 670                            struct pipe_fence_handle *fence)
 671 {
 672    return ilo_screen_fence_finish(screen, fence, 0);
 673 }
 674
 675 /**
 676  * Create a fence for \p bo.  When \p bo is not NULL, it must be submitted
 677  * before waited on or checked.
 678  */
 679 struct pipe_fence_handle *
 680 ilo_screen_fence_create(struct pipe_screen *screen, struct intel_bo *bo)
 681 {
 682    struct pipe_fence_handle *fence;
 683
 684    fence = CALLOC_STRUCT(pipe_fence_handle);
 685    if (!fence)
 686       return NULL;
 687
 688    pipe_reference_init(&fence->reference, 1);
 689
 690    fence->seqno_bo = intel_bo_ref(bo);
 691
 692    return fence;
 693 }
 694
 695 static void
 696 ilo_screen_destroy(struct pipe_screen *screen)
 697 {
 698    struct ilo_screen *is = ilo_screen(screen);
 699
 700    intel_winsys_destroy(is->dev.winsys);
 701
 702    FREE(is);
 703 }
 704
 705 struct pipe_screen *
 706 ilo_screen_create(struct intel_winsys *ws)
 707 {
 708    struct ilo_screen *is;
 709
 710    ilo_debug_init("ILO_DEBUG");
 711
 712    is = CALLOC_STRUCT(ilo_screen);
 713    if (!is)
 714       return NULL;
 715
 716    if (!ilo_dev_init(&is->dev, ws)) {
 717       FREE(is);
 718       return NULL;
 719    }
 720
 721    util_format_s3tc_init();
 722
 723    is->base.destroy = ilo_screen_destroy;
 724    is->base.get_name = ilo_get_name;
 725    is->base.get_vendor = ilo_get_vendor;
 726    is->base.get_device_vendor = ilo_get_device_vendor;
 727    is->base.get_param = ilo_get_param;
 728    is->base.get_paramf = ilo_get_paramf;
 729    is->base.get_shader_param = ilo_get_shader_param;
 730    is->base.get_video_param = ilo_get_video_param;
 731    is->base.get_compute_param = ilo_get_compute_param;
 732
 733    is->base.get_timestamp = ilo_get_timestamp;
 734
 735    is->base.is_format_supported = ilo_is_format_supported;
 736    is->base.is_video_format_supported = ilo_is_video_format_supported;
 737
 738    is->base.flush_frontbuffer = NULL;
 739
 740    is->base.fence_reference = ilo_screen_fence_reference;
 741    is->base.fence_signalled = ilo_screen_fence_signalled;
 742    is->base.fence_finish = ilo_screen_fence_finish;
 743
 744    is->base.get_driver_query_info = NULL;
 745
 746    ilo_init_context_functions(is);
 747    ilo_init_resource_functions(is);
 748
 749    return &is->base;
 750 }