ilo: add 3DSTATE_AA_LINE_PARAMETERS to ilo_state_raster
[mesa.git] / src / gallium / drivers / ilo / ilo_shader.c
1 /*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2012-2013 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28 #include "genhw/genhw.h" /* for SBE setup */
29 #include "core/ilo_builder.h"
30 #include "core/intel_winsys.h"
31 #include "shader/ilo_shader_internal.h"
32 #include "tgsi/tgsi_parse.h"
33
34 #include "ilo_state.h"
35 #include "ilo_shader.h"
36
37 struct ilo_shader_cache {
38 struct list_head shaders;
39 struct list_head changed;
40 };
41
42 /**
43 * Create a shader cache. A shader cache can manage shaders and upload them
44 * to a bo as a whole.
45 */
46 struct ilo_shader_cache *
47 ilo_shader_cache_create(void)
48 {
49 struct ilo_shader_cache *shc;
50
51 shc = CALLOC_STRUCT(ilo_shader_cache);
52 if (!shc)
53 return NULL;
54
55 list_inithead(&shc->shaders);
56 list_inithead(&shc->changed);
57
58 return shc;
59 }
60
61 /**
62 * Destroy a shader cache.
63 */
64 void
65 ilo_shader_cache_destroy(struct ilo_shader_cache *shc)
66 {
67 FREE(shc);
68 }
69
70 /**
71 * Add a shader to the cache.
72 */
73 void
74 ilo_shader_cache_add(struct ilo_shader_cache *shc,
75 struct ilo_shader_state *shader)
76 {
77 struct ilo_shader *sh;
78
79 shader->cache = shc;
80 LIST_FOR_EACH_ENTRY(sh, &shader->variants, list)
81 sh->uploaded = false;
82
83 list_add(&shader->list, &shc->changed);
84 }
85
86 /**
87 * Remove a shader from the cache.
88 */
89 void
90 ilo_shader_cache_remove(struct ilo_shader_cache *shc,
91 struct ilo_shader_state *shader)
92 {
93 list_del(&shader->list);
94 shader->cache = NULL;
95 }
96
97 /**
98 * Notify the cache that a managed shader has changed.
99 */
100 static void
101 ilo_shader_cache_notify_change(struct ilo_shader_cache *shc,
102 struct ilo_shader_state *shader)
103 {
104 if (shader->cache == shc) {
105 list_del(&shader->list);
106 list_add(&shader->list, &shc->changed);
107 }
108 }
109
110 /**
111 * Upload managed shaders to the bo. Only shaders that are changed or added
112 * after the last upload are uploaded.
113 */
114 void
115 ilo_shader_cache_upload(struct ilo_shader_cache *shc,
116 struct ilo_builder *builder)
117 {
118 struct ilo_shader_state *shader, *next;
119
120 LIST_FOR_EACH_ENTRY_SAFE(shader, next, &shc->changed, list) {
121 struct ilo_shader *sh;
122
123 LIST_FOR_EACH_ENTRY(sh, &shader->variants, list) {
124 if (sh->uploaded)
125 continue;
126
127 sh->cache_offset = ilo_builder_instruction_write(builder,
128 sh->kernel_size, sh->kernel);
129
130 sh->uploaded = true;
131 }
132
133 list_del(&shader->list);
134 list_add(&shader->list, &shc->shaders);
135 }
136 }
137
138 /**
139 * Invalidate all shaders so that they get uploaded in next
140 * ilo_shader_cache_upload().
141 */
142 void
143 ilo_shader_cache_invalidate(struct ilo_shader_cache *shc)
144 {
145 struct ilo_shader_state *shader, *next;
146
147 LIST_FOR_EACH_ENTRY_SAFE(shader, next, &shc->shaders, list) {
148 list_del(&shader->list);
149 list_add(&shader->list, &shc->changed);
150 }
151
152 LIST_FOR_EACH_ENTRY(shader, &shc->changed, list) {
153 struct ilo_shader *sh;
154
155 LIST_FOR_EACH_ENTRY(sh, &shader->variants, list)
156 sh->uploaded = false;
157 }
158 }
159
160 /**
161 * Initialize a shader variant.
162 */
163 void
164 ilo_shader_variant_init(struct ilo_shader_variant *variant,
165 const struct ilo_shader_info *info,
166 const struct ilo_state_vector *vec)
167 {
168 int num_views, i;
169
170 memset(variant, 0, sizeof(*variant));
171
172 switch (info->type) {
173 case PIPE_SHADER_VERTEX:
174 variant->u.vs.rasterizer_discard =
175 vec->rasterizer->state.rasterizer_discard;
176 variant->u.vs.num_ucps =
177 util_last_bit(vec->rasterizer->state.clip_plane_enable);
178 break;
179 case PIPE_SHADER_GEOMETRY:
180 variant->u.gs.rasterizer_discard =
181 vec->rasterizer->state.rasterizer_discard;
182 variant->u.gs.num_inputs = vec->vs->shader->out.count;
183 for (i = 0; i < vec->vs->shader->out.count; i++) {
184 variant->u.gs.semantic_names[i] =
185 vec->vs->shader->out.semantic_names[i];
186 variant->u.gs.semantic_indices[i] =
187 vec->vs->shader->out.semantic_indices[i];
188 }
189 break;
190 case PIPE_SHADER_FRAGMENT:
191 variant->u.fs.flatshade =
192 (info->has_color_interp && vec->rasterizer->state.flatshade);
193 variant->u.fs.fb_height = (info->has_pos) ?
194 vec->fb.state.height : 1;
195 variant->u.fs.num_cbufs = vec->fb.state.nr_cbufs;
196 break;
197 default:
198 assert(!"unknown shader type");
199 break;
200 }
201
202 /* use PCB unless constant buffer 0 is not in user buffer */
203 if ((vec->cbuf[info->type].enabled_mask & 0x1) &&
204 !vec->cbuf[info->type].cso[0].user_buffer)
205 variant->use_pcb = false;
206 else
207 variant->use_pcb = true;
208
209 num_views = vec->view[info->type].count;
210 assert(info->num_samplers <= num_views);
211
212 variant->num_sampler_views = info->num_samplers;
213 for (i = 0; i < info->num_samplers; i++) {
214 const struct pipe_sampler_view *view = vec->view[info->type].states[i];
215 const struct ilo_sampler_cso *sampler = vec->sampler[info->type].cso[i];
216
217 if (view) {
218 variant->sampler_view_swizzles[i].r = view->swizzle_r;
219 variant->sampler_view_swizzles[i].g = view->swizzle_g;
220 variant->sampler_view_swizzles[i].b = view->swizzle_b;
221 variant->sampler_view_swizzles[i].a = view->swizzle_a;
222 }
223 else if (info->shadow_samplers & (1 << i)) {
224 variant->sampler_view_swizzles[i].r = PIPE_SWIZZLE_RED;
225 variant->sampler_view_swizzles[i].g = PIPE_SWIZZLE_RED;
226 variant->sampler_view_swizzles[i].b = PIPE_SWIZZLE_RED;
227 variant->sampler_view_swizzles[i].a = PIPE_SWIZZLE_ONE;
228 }
229 else {
230 variant->sampler_view_swizzles[i].r = PIPE_SWIZZLE_RED;
231 variant->sampler_view_swizzles[i].g = PIPE_SWIZZLE_GREEN;
232 variant->sampler_view_swizzles[i].b = PIPE_SWIZZLE_BLUE;
233 variant->sampler_view_swizzles[i].a = PIPE_SWIZZLE_ALPHA;
234 }
235
236 /*
237 * When non-nearest filter and PIPE_TEX_WRAP_CLAMP wrap mode is used,
238 * the HW wrap mode is set to GEN6_TEXCOORDMODE_CLAMP_BORDER, and we
239 * need to manually saturate the texture coordinates.
240 */
241 if (sampler) {
242 variant->saturate_tex_coords[0] |= sampler->saturate_s << i;
243 variant->saturate_tex_coords[1] |= sampler->saturate_t << i;
244 variant->saturate_tex_coords[2] |= sampler->saturate_r << i;
245 }
246 }
247 }
248
249 /**
250 * Guess the shader variant, knowing that the context may still change.
251 */
252 static void
253 ilo_shader_variant_guess(struct ilo_shader_variant *variant,
254 const struct ilo_shader_info *info,
255 const struct ilo_state_vector *vec)
256 {
257 int i;
258
259 memset(variant, 0, sizeof(*variant));
260
261 switch (info->type) {
262 case PIPE_SHADER_VERTEX:
263 break;
264 case PIPE_SHADER_GEOMETRY:
265 break;
266 case PIPE_SHADER_FRAGMENT:
267 variant->u.fs.flatshade = false;
268 variant->u.fs.fb_height = (info->has_pos) ?
269 vec->fb.state.height : 1;
270 variant->u.fs.num_cbufs = 1;
271 break;
272 default:
273 assert(!"unknown shader type");
274 break;
275 }
276
277 variant->use_pcb = true;
278
279 variant->num_sampler_views = info->num_samplers;
280 for (i = 0; i < info->num_samplers; i++) {
281 if (info->shadow_samplers & (1 << i)) {
282 variant->sampler_view_swizzles[i].r = PIPE_SWIZZLE_RED;
283 variant->sampler_view_swizzles[i].g = PIPE_SWIZZLE_RED;
284 variant->sampler_view_swizzles[i].b = PIPE_SWIZZLE_RED;
285 variant->sampler_view_swizzles[i].a = PIPE_SWIZZLE_ONE;
286 }
287 else {
288 variant->sampler_view_swizzles[i].r = PIPE_SWIZZLE_RED;
289 variant->sampler_view_swizzles[i].g = PIPE_SWIZZLE_GREEN;
290 variant->sampler_view_swizzles[i].b = PIPE_SWIZZLE_BLUE;
291 variant->sampler_view_swizzles[i].a = PIPE_SWIZZLE_ALPHA;
292 }
293 }
294 }
295
296
297 /**
298 * Parse a TGSI instruction for the shader info.
299 */
300 static void
301 ilo_shader_info_parse_inst(struct ilo_shader_info *info,
302 const struct tgsi_full_instruction *inst)
303 {
304 int i;
305
306 /* look for edgeflag passthrough */
307 if (info->edgeflag_out >= 0 &&
308 inst->Instruction.Opcode == TGSI_OPCODE_MOV &&
309 inst->Dst[0].Register.File == TGSI_FILE_OUTPUT &&
310 inst->Dst[0].Register.Index == info->edgeflag_out) {
311
312 assert(inst->Src[0].Register.File == TGSI_FILE_INPUT);
313 info->edgeflag_in = inst->Src[0].Register.Index;
314 }
315
316 if (inst->Instruction.Texture) {
317 bool shadow;
318
319 switch (inst->Texture.Texture) {
320 case TGSI_TEXTURE_SHADOW1D:
321 case TGSI_TEXTURE_SHADOW2D:
322 case TGSI_TEXTURE_SHADOWRECT:
323 case TGSI_TEXTURE_SHADOW1D_ARRAY:
324 case TGSI_TEXTURE_SHADOW2D_ARRAY:
325 case TGSI_TEXTURE_SHADOWCUBE:
326 case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
327 shadow = true;
328 break;
329 default:
330 shadow = false;
331 break;
332 }
333
334 for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
335 const struct tgsi_full_src_register *src = &inst->Src[i];
336
337 if (src->Register.File == TGSI_FILE_SAMPLER) {
338 const int idx = src->Register.Index;
339
340 if (idx >= info->num_samplers)
341 info->num_samplers = idx + 1;
342
343 if (shadow)
344 info->shadow_samplers |= 1 << idx;
345 }
346 }
347 }
348 }
349
350 /**
351 * Parse a TGSI property for the shader info.
352 */
353 static void
354 ilo_shader_info_parse_prop(struct ilo_shader_info *info,
355 const struct tgsi_full_property *prop)
356 {
357 switch (prop->Property.PropertyName) {
358 case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
359 info->fs_color0_writes_all_cbufs = prop->u[0].Data;
360 break;
361 default:
362 break;
363 }
364 }
365
366 /**
367 * Parse a TGSI declaration for the shader info.
368 */
369 static void
370 ilo_shader_info_parse_decl(struct ilo_shader_info *info,
371 const struct tgsi_full_declaration *decl)
372 {
373 switch (decl->Declaration.File) {
374 case TGSI_FILE_INPUT:
375 if (decl->Declaration.Interpolate &&
376 decl->Interp.Interpolate == TGSI_INTERPOLATE_COLOR)
377 info->has_color_interp = true;
378 if (decl->Declaration.Semantic &&
379 decl->Semantic.Name == TGSI_SEMANTIC_POSITION)
380 info->has_pos = true;
381 break;
382 case TGSI_FILE_OUTPUT:
383 if (decl->Declaration.Semantic &&
384 decl->Semantic.Name == TGSI_SEMANTIC_EDGEFLAG)
385 info->edgeflag_out = decl->Range.First;
386 break;
387 case TGSI_FILE_CONSTANT:
388 {
389 const int idx = (decl->Declaration.Dimension) ?
390 decl->Dim.Index2D : 0;
391 if (info->constant_buffer_count <= idx)
392 info->constant_buffer_count = idx + 1;
393 }
394 break;
395 case TGSI_FILE_SYSTEM_VALUE:
396 if (decl->Declaration.Semantic &&
397 decl->Semantic.Name == TGSI_SEMANTIC_INSTANCEID)
398 info->has_instanceid = true;
399 if (decl->Declaration.Semantic &&
400 decl->Semantic.Name == TGSI_SEMANTIC_VERTEXID)
401 info->has_vertexid = true;
402 break;
403 default:
404 break;
405 }
406 }
407
408 static void
409 ilo_shader_info_parse_tokens(struct ilo_shader_info *info)
410 {
411 struct tgsi_parse_context parse;
412
413 info->edgeflag_in = -1;
414 info->edgeflag_out = -1;
415
416 tgsi_parse_init(&parse, info->tokens);
417 while (!tgsi_parse_end_of_tokens(&parse)) {
418 const union tgsi_full_token *token;
419
420 tgsi_parse_token(&parse);
421 token = &parse.FullToken;
422
423 switch (token->Token.Type) {
424 case TGSI_TOKEN_TYPE_DECLARATION:
425 ilo_shader_info_parse_decl(info, &token->FullDeclaration);
426 break;
427 case TGSI_TOKEN_TYPE_INSTRUCTION:
428 ilo_shader_info_parse_inst(info, &token->FullInstruction);
429 break;
430 case TGSI_TOKEN_TYPE_PROPERTY:
431 ilo_shader_info_parse_prop(info, &token->FullProperty);
432 break;
433 default:
434 break;
435 }
436 }
437 tgsi_parse_free(&parse);
438 }
439
440 /**
441 * Create a shader state.
442 */
443 static struct ilo_shader_state *
444 ilo_shader_state_create(const struct ilo_dev *dev,
445 const struct ilo_state_vector *vec,
446 int type, const void *templ)
447 {
448 struct ilo_shader_state *state;
449 struct ilo_shader_variant variant;
450
451 state = CALLOC_STRUCT(ilo_shader_state);
452 if (!state)
453 return NULL;
454
455 state->info.dev = dev;
456 state->info.type = type;
457
458 if (type == PIPE_SHADER_COMPUTE) {
459 const struct pipe_compute_state *c =
460 (const struct pipe_compute_state *) templ;
461
462 state->info.tokens = tgsi_dup_tokens(c->prog);
463 state->info.compute.req_local_mem = c->req_local_mem;
464 state->info.compute.req_private_mem = c->req_private_mem;
465 state->info.compute.req_input_mem = c->req_input_mem;
466 }
467 else {
468 const struct pipe_shader_state *s =
469 (const struct pipe_shader_state *) templ;
470
471 state->info.tokens = tgsi_dup_tokens(s->tokens);
472 state->info.stream_output = s->stream_output;
473 }
474
475 list_inithead(&state->variants);
476
477 ilo_shader_info_parse_tokens(&state->info);
478
479 /* guess and compile now */
480 ilo_shader_variant_guess(&variant, &state->info, vec);
481 if (!ilo_shader_state_use_variant(state, &variant)) {
482 ilo_shader_destroy(state);
483 return NULL;
484 }
485
486 return state;
487 }
488
489 /**
490 * Add a compiled shader to the shader state.
491 */
492 static void
493 ilo_shader_state_add_shader(struct ilo_shader_state *state,
494 struct ilo_shader *sh)
495 {
496 list_add(&sh->list, &state->variants);
497 state->num_variants++;
498 state->total_size += sh->kernel_size;
499
500 if (state->cache)
501 ilo_shader_cache_notify_change(state->cache, state);
502 }
503
504 /**
505 * Remove a compiled shader from the shader state.
506 */
507 static void
508 ilo_shader_state_remove_shader(struct ilo_shader_state *state,
509 struct ilo_shader *sh)
510 {
511 list_del(&sh->list);
512 state->num_variants--;
513 state->total_size -= sh->kernel_size;
514 }
515
516 /**
517 * Garbage collect shader variants in the shader state.
518 */
519 static void
520 ilo_shader_state_gc(struct ilo_shader_state *state)
521 {
522 /* activate when the variants take up more than 4KiB of space */
523 const int limit = 4 * 1024;
524 struct ilo_shader *sh, *next;
525
526 if (state->total_size < limit)
527 return;
528
529 /* remove from the tail as the most recently ones are at the head */
530 LIST_FOR_EACH_ENTRY_SAFE_REV(sh, next, &state->variants, list) {
531 ilo_shader_state_remove_shader(state, sh);
532 ilo_shader_destroy_kernel(sh);
533
534 if (state->total_size <= limit / 2)
535 break;
536 }
537 }
538
539 /**
540 * Search for a shader variant.
541 */
542 static struct ilo_shader *
543 ilo_shader_state_search_variant(struct ilo_shader_state *state,
544 const struct ilo_shader_variant *variant)
545 {
546 struct ilo_shader *sh = NULL, *tmp;
547
548 LIST_FOR_EACH_ENTRY(tmp, &state->variants, list) {
549 if (memcmp(&tmp->variant, variant, sizeof(*variant)) == 0) {
550 sh = tmp;
551 break;
552 }
553 }
554
555 return sh;
556 }
557
558 static void
559 init_shader_urb(const struct ilo_shader *kernel,
560 const struct ilo_shader_state *state,
561 struct ilo_state_shader_urb_info *urb)
562 {
563 urb->cv_input_attr_count = kernel->in.count;
564 urb->read_base = 0;
565 urb->read_count = kernel->in.count;
566
567 urb->output_attr_count = kernel->out.count;
568 urb->user_cull_enables = 0x0;
569 urb->user_clip_enables = 0x0;
570 }
571
572 static void
573 init_shader_kernel(const struct ilo_shader *kernel,
574 const struct ilo_shader_state *state,
575 struct ilo_state_shader_kernel_info *kern)
576 {
577 kern->offset = 0;
578 kern->grf_start = kernel->in.start_grf;
579 kern->pcb_attr_count =
580 (kernel->pcb.cbuf0_size + kernel->pcb.clip_state_size + 15) / 16;
581 kern->scratch_size = 0;
582 }
583
584 static void
585 init_shader_resource(const struct ilo_shader *kernel,
586 const struct ilo_shader_state *state,
587 struct ilo_state_shader_resource_info *resource)
588 {
589 resource->sampler_count = state->info.num_samplers;
590 resource->surface_count = 0;
591 resource->has_uav = false;
592 }
593
594 static void
595 init_vs(struct ilo_shader *kernel,
596 const struct ilo_shader_state *state)
597 {
598 struct ilo_state_vs_info info;
599
600 memset(&info, 0, sizeof(info));
601
602 init_shader_urb(kernel, state, &info.urb);
603 init_shader_kernel(kernel, state, &info.kernel);
604 init_shader_resource(kernel, state, &info.resource);
605 info.dispatch_enable = true;
606 info.stats_enable = true;
607
608 if (ilo_dev_gen(state->info.dev) == ILO_GEN(6) && kernel->stream_output) {
609 struct ilo_state_gs_info gs_info;
610
611 memset(&gs_info, 0, sizeof(gs_info));
612
613 gs_info.urb.cv_input_attr_count = kernel->out.count;
614 gs_info.urb.read_count = kernel->out.count;
615 gs_info.kernel.grf_start = kernel->gs_start_grf;
616 gs_info.sol.sol_enable = true;
617 gs_info.sol.stats_enable = true;
618 gs_info.sol.render_disable = kernel->variant.u.vs.rasterizer_discard;
619 gs_info.sol.svbi_post_inc = kernel->svbi_post_inc;
620 gs_info.sol.tristrip_reorder = GEN7_REORDER_LEADING;
621 gs_info.dispatch_enable = true;
622 gs_info.stats_enable = true;
623
624 ilo_state_vs_init(&kernel->cso.vs_sol.vs, state->info.dev, &info);
625 ilo_state_gs_init(&kernel->cso.vs_sol.sol, state->info.dev, &gs_info);
626 } else {
627 ilo_state_vs_init(&kernel->cso.vs, state->info.dev, &info);
628 }
629 }
630
631 static void
632 init_gs(struct ilo_shader *kernel,
633 const struct ilo_shader_state *state)
634 {
635 const struct pipe_stream_output_info *so_info = &state->info.stream_output;
636 struct ilo_state_gs_info info;
637
638 memset(&info, 0, sizeof(info));
639
640 init_shader_urb(kernel, state, &info.urb);
641 init_shader_kernel(kernel, state, &info.kernel);
642 init_shader_resource(kernel, state, &info.resource);
643 info.dispatch_enable = true;
644 info.stats_enable = true;
645
646 if (so_info->num_outputs > 0) {
647 info.sol.sol_enable = true;
648 info.sol.stats_enable = true;
649 info.sol.render_disable = kernel->variant.u.gs.rasterizer_discard;
650 info.sol.tristrip_reorder = GEN7_REORDER_LEADING;
651 }
652
653 ilo_state_gs_init(&kernel->cso.gs, state->info.dev, &info);
654 }
655
656 static void
657 init_ps(struct ilo_shader *kernel,
658 const struct ilo_shader_state *state)
659 {
660 struct ilo_state_ps_info info;
661
662 memset(&info, 0, sizeof(info));
663
664 init_shader_kernel(kernel, state, &info.kernel_8);
665 init_shader_resource(kernel, state, &info.resource);
666
667 info.io.has_rt_write = true;
668 info.io.posoffset = GEN6_POSOFFSET_NONE;
669 info.io.attr_count = kernel->in.count;
670 info.io.use_z = kernel->in.has_pos;
671 info.io.use_w = kernel->in.has_pos;
672 info.io.use_coverage_mask = false;
673 info.io.pscdepth = (kernel->out.has_pos) ?
674 GEN7_PSCDEPTH_ON : GEN7_PSCDEPTH_OFF;
675 info.io.write_pixel_mask = kernel->has_kill;
676 info.io.write_omask = false;
677
678 info.params.sample_mask = 0x1;
679 info.params.earlyz_control_psexec = false;
680 info.params.alpha_may_kill = false;
681 info.params.dual_source_blending = false;
682 info.params.has_writeable_rt = true;
683
684 info.valid_kernels = GEN6_PS_DISPATCH_8;
685
686 /*
687 * From the Sandy Bridge PRM, volume 2 part 1, page 284:
688 *
689 * "(MSDISPMODE_PERSAMPLE) This is the high-quality multisample mode
690 * where (over and above PERPIXEL mode) the PS is run for each covered
691 * sample. This mode is also used for "normal" non-multisample
692 * rendering (aka 1X), given Number of Multisamples is programmed to
693 * NUMSAMPLES_1."
694 */
695 info.per_sample_dispatch = true;
696
697 info.rt_clear_enable = false;
698 info.rt_resolve_enable = false;
699 info.cv_per_sample_interp = false;
700 info.cv_has_earlyz_op = false;
701 info.sample_count_one = true;
702 info.cv_has_depth_buffer = true;
703
704 ilo_state_ps_init(&kernel->cso.ps, state->info.dev, &info);
705
706 /* remember current parameters */
707 kernel->ps_params = info.params;
708 }
709
710 static void
711 init_sol(struct ilo_shader *kernel,
712 const struct ilo_dev *dev,
713 const struct pipe_stream_output_info *so_info,
714 bool rasterizer_discard)
715 {
716 struct ilo_state_sol_decl_info decls[4][PIPE_MAX_SO_OUTPUTS];
717 unsigned buf_offsets[PIPE_MAX_SO_BUFFERS];
718 struct ilo_state_sol_info info;
719 unsigned i;
720
721 if (!so_info->num_outputs) {
722 ilo_state_sol_init_disabled(&kernel->sol, dev, rasterizer_discard);
723 return;
724 }
725
726 memset(&info, 0, sizeof(info));
727 info.data = kernel->sol_data;
728 info.data_size = sizeof(kernel->sol_data);
729 info.sol_enable = true;
730 info.stats_enable = true;
731 info.tristrip_reorder = GEN7_REORDER_TRAILING;
732 info.render_disable = rasterizer_discard;
733 info.render_stream = 0;
734
735 for (i = 0; i < 4; i++) {
736 info.buffer_strides[i] = so_info->stride[i] * 4;
737
738 info.streams[i].cv_vue_attr_count = kernel->out.count;
739 info.streams[i].decls = decls[i];
740 }
741
742 memset(decls, 0, sizeof(decls));
743 memset(buf_offsets, 0, sizeof(buf_offsets));
744 for (i = 0; i < so_info->num_outputs; i++) {
745 const unsigned stream = so_info->output[i].stream;
746 const unsigned buffer = so_info->output[i].output_buffer;
747 struct ilo_state_sol_decl_info *decl;
748 unsigned attr;
749
750 /* figure out which attribute is sourced */
751 for (attr = 0; attr < kernel->out.count; attr++) {
752 const int reg_idx = kernel->out.register_indices[attr];
753 if (reg_idx == so_info->output[i].register_index)
754 break;
755 }
756 if (attr >= kernel->out.count) {
757 assert(!"stream output an undefined register");
758 attr = 0;
759 }
760
761 if (info.streams[stream].vue_read_count < attr + 1)
762 info.streams[stream].vue_read_count = attr + 1;
763
764 /* pad with holes first */
765 while (buf_offsets[buffer] < so_info->output[i].dst_offset) {
766 int num_dwords;
767
768 num_dwords = so_info->output[i].dst_offset - buf_offsets[buffer];
769 if (num_dwords > 4)
770 num_dwords = 4;
771
772 assert(info.streams[stream].decl_count < ARRAY_SIZE(decls[stream]));
773 decl = &decls[stream][info.streams[stream].decl_count];
774
775 decl->attr = 0;
776 decl->is_hole = true;
777 decl->component_base = 0;
778 decl->component_count = num_dwords;
779 decl->buffer = buffer;
780
781 info.streams[stream].decl_count++;
782 buf_offsets[buffer] += num_dwords;
783 }
784 assert(buf_offsets[buffer] == so_info->output[i].dst_offset);
785
786 assert(info.streams[stream].decl_count < ARRAY_SIZE(decls[stream]));
787 decl = &decls[stream][info.streams[stream].decl_count];
788
789 decl->attr = attr;
790 decl->is_hole = false;
791 /* PSIZE is at W channel */
792 if (kernel->out.semantic_names[attr] == TGSI_SEMANTIC_PSIZE) {
793 assert(so_info->output[i].start_component == 0);
794 assert(so_info->output[i].num_components == 1);
795 decl->component_base = 3;
796 decl->component_count = 1;
797 } else {
798 decl->component_base = so_info->output[i].start_component;
799 decl->component_count = so_info->output[i].num_components;
800 }
801 decl->buffer = buffer;
802
803 info.streams[stream].decl_count++;
804 buf_offsets[buffer] += so_info->output[i].num_components;
805 }
806
807 ilo_state_sol_init(&kernel->sol, dev, &info);
808 }
809
810 /**
811 * Add a shader variant to the shader state.
812 */
813 static struct ilo_shader *
814 ilo_shader_state_add_variant(struct ilo_shader_state *state,
815 const struct ilo_shader_variant *variant)
816 {
817 bool rasterizer_discard = false;
818 struct ilo_shader *sh;
819
820 switch (state->info.type) {
821 case PIPE_SHADER_VERTEX:
822 sh = ilo_shader_compile_vs(state, variant);
823 rasterizer_discard = variant->u.vs.rasterizer_discard;
824 break;
825 case PIPE_SHADER_FRAGMENT:
826 sh = ilo_shader_compile_fs(state, variant);
827 break;
828 case PIPE_SHADER_GEOMETRY:
829 sh = ilo_shader_compile_gs(state, variant);
830 rasterizer_discard = variant->u.gs.rasterizer_discard;
831 break;
832 case PIPE_SHADER_COMPUTE:
833 sh = ilo_shader_compile_cs(state, variant);
834 break;
835 default:
836 sh = NULL;
837 break;
838 }
839 if (!sh) {
840 assert(!"failed to compile shader");
841 return NULL;
842 }
843
844 sh->variant = *variant;
845
846 init_sol(sh, state->info.dev, &state->info.stream_output,
847 rasterizer_discard);
848
849 ilo_shader_state_add_shader(state, sh);
850
851 return sh;
852 }
853
854 /**
855 * Update state->shader to point to a variant. If the variant does not exist,
856 * it will be added first.
857 */
858 bool
859 ilo_shader_state_use_variant(struct ilo_shader_state *state,
860 const struct ilo_shader_variant *variant)
861 {
862 struct ilo_shader *sh;
863 bool construct_cso = false;
864
865 sh = ilo_shader_state_search_variant(state, variant);
866 if (!sh) {
867 ilo_shader_state_gc(state);
868
869 sh = ilo_shader_state_add_variant(state, variant);
870 if (!sh)
871 return false;
872
873 construct_cso = true;
874 }
875
876 /* move to head */
877 if (state->variants.next != &sh->list) {
878 list_del(&sh->list);
879 list_add(&sh->list, &state->variants);
880 }
881
882 state->shader = sh;
883
884 if (construct_cso) {
885 switch (state->info.type) {
886 case PIPE_SHADER_VERTEX:
887 init_vs(sh, state);
888 break;
889 case PIPE_SHADER_GEOMETRY:
890 init_gs(sh, state);
891 break;
892 case PIPE_SHADER_FRAGMENT:
893 init_ps(sh, state);
894 break;
895 default:
896 break;
897 }
898 }
899
900 return true;
901 }
902
903 struct ilo_shader_state *
904 ilo_shader_create_vs(const struct ilo_dev *dev,
905 const struct pipe_shader_state *state,
906 const struct ilo_state_vector *precompile)
907 {
908 struct ilo_shader_state *shader;
909
910 shader = ilo_shader_state_create(dev, precompile,
911 PIPE_SHADER_VERTEX, state);
912
913 /* states used in ilo_shader_variant_init() */
914 shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_VS |
915 ILO_DIRTY_RASTERIZER |
916 ILO_DIRTY_CBUF;
917
918 return shader;
919 }
920
921 struct ilo_shader_state *
922 ilo_shader_create_gs(const struct ilo_dev *dev,
923 const struct pipe_shader_state *state,
924 const struct ilo_state_vector *precompile)
925 {
926 struct ilo_shader_state *shader;
927
928 shader = ilo_shader_state_create(dev, precompile,
929 PIPE_SHADER_GEOMETRY, state);
930
931 /* states used in ilo_shader_variant_init() */
932 shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_GS |
933 ILO_DIRTY_VS |
934 ILO_DIRTY_RASTERIZER |
935 ILO_DIRTY_CBUF;
936
937 return shader;
938 }
939
940 struct ilo_shader_state *
941 ilo_shader_create_fs(const struct ilo_dev *dev,
942 const struct pipe_shader_state *state,
943 const struct ilo_state_vector *precompile)
944 {
945 struct ilo_shader_state *shader;
946
947 shader = ilo_shader_state_create(dev, precompile,
948 PIPE_SHADER_FRAGMENT, state);
949
950 /* states used in ilo_shader_variant_init() */
951 shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_FS |
952 ILO_DIRTY_RASTERIZER |
953 ILO_DIRTY_FB |
954 ILO_DIRTY_CBUF;
955
956 return shader;
957 }
958
959 struct ilo_shader_state *
960 ilo_shader_create_cs(const struct ilo_dev *dev,
961 const struct pipe_compute_state *state,
962 const struct ilo_state_vector *precompile)
963 {
964 struct ilo_shader_state *shader;
965
966 shader = ilo_shader_state_create(dev, precompile,
967 PIPE_SHADER_COMPUTE, state);
968
969 shader->info.non_orthogonal_states = 0;
970
971 return shader;
972 }
973
974 /**
975 * Destroy a shader state.
976 */
977 void
978 ilo_shader_destroy(struct ilo_shader_state *shader)
979 {
980 struct ilo_shader *sh, *next;
981
982 LIST_FOR_EACH_ENTRY_SAFE(sh, next, &shader->variants, list)
983 ilo_shader_destroy_kernel(sh);
984
985 FREE((struct tgsi_token *) shader->info.tokens);
986 FREE(shader);
987 }
988
989 /**
990 * Return the type (PIPE_SHADER_x) of the shader.
991 */
992 int
993 ilo_shader_get_type(const struct ilo_shader_state *shader)
994 {
995 return shader->info.type;
996 }
997
998 /**
999 * Select a kernel for the given context. This will compile a new kernel if
1000 * none of the existing kernels work with the context.
1001 *
1002 * \param ilo the context
1003 * \param dirty states of the context that are considered changed
1004 * \return true if a different kernel is selected
1005 */
1006 bool
1007 ilo_shader_select_kernel(struct ilo_shader_state *shader,
1008 const struct ilo_state_vector *vec,
1009 uint32_t dirty)
1010 {
1011 struct ilo_shader_variant variant;
1012 bool changed = false;
1013
1014 if (shader->info.non_orthogonal_states & dirty) {
1015 const struct ilo_shader * const old = shader->shader;
1016
1017 ilo_shader_variant_init(&variant, &shader->info, vec);
1018 ilo_shader_state_use_variant(shader, &variant);
1019 changed = (shader->shader != old);
1020 }
1021
1022 if (shader->info.type == PIPE_SHADER_FRAGMENT) {
1023 struct ilo_shader *kernel = shader->shader;
1024
1025 if (kernel->ps_params.sample_mask != vec->sample_mask ||
1026 kernel->ps_params.alpha_may_kill != vec->blend->alpha_may_kill) {
1027 kernel->ps_params.sample_mask = vec->sample_mask;
1028 kernel->ps_params.alpha_may_kill = vec->blend->alpha_may_kill;
1029
1030 ilo_state_ps_set_params(&kernel->cso.ps, shader->info.dev,
1031 &kernel->ps_params);
1032
1033 changed = true;
1034 }
1035 }
1036
1037 return changed;
1038 }
1039
1040 static int
1041 route_attr(const int *semantics, const int *indices, int len,
1042 int semantic, int index)
1043 {
1044 int i;
1045
1046 for (i = 0; i < len; i++) {
1047 if (semantics[i] == semantic && indices[i] == index)
1048 return i;
1049 }
1050
1051 /* failed to match for COLOR, try BCOLOR */
1052 if (semantic == TGSI_SEMANTIC_COLOR) {
1053 for (i = 0; i < len; i++) {
1054 if (semantics[i] == TGSI_SEMANTIC_BCOLOR && indices[i] == index)
1055 return i;
1056 }
1057 }
1058
1059 return -1;
1060 }
1061
1062 /**
1063 * Select a routing for the given source shader and rasterizer state.
1064 *
1065 * \return true if a different routing is selected
1066 */
1067 bool
1068 ilo_shader_select_kernel_sbe(struct ilo_shader_state *shader,
1069 const struct ilo_shader_state *source,
1070 const struct ilo_rasterizer_state *rasterizer)
1071 {
1072 const bool is_point = true;
1073 const bool light_twoside = rasterizer->state.light_twoside;
1074 const uint32_t sprite_coord_enable = rasterizer->state.sprite_coord_enable;
1075 const int sprite_coord_mode = rasterizer->state.sprite_coord_mode;
1076 struct ilo_shader *kernel = shader->shader;
1077 struct ilo_kernel_routing *routing = &kernel->routing;
1078 struct ilo_state_sbe_swizzle_info swizzles[ILO_STATE_SBE_MAX_SWIZZLE_COUNT];
1079 struct ilo_state_sbe_info info;
1080 const int *src_semantics, *src_indices;
1081 int src_skip, src_len, src_slot;
1082 int dst_len, dst_slot;
1083
1084 assert(kernel);
1085
1086 if (source) {
1087 assert(source->shader);
1088
1089 src_semantics = source->shader->out.semantic_names;
1090 src_indices = source->shader->out.semantic_indices;
1091 src_len = source->shader->out.count;
1092
1093 assert(src_len >= 2 &&
1094 src_semantics[0] == TGSI_SEMANTIC_PSIZE &&
1095 src_semantics[1] == TGSI_SEMANTIC_POSITION);
1096
1097 /*
1098 * skip PSIZE and POSITION (how about the optional CLIPDISTs?), unless
1099 * they are all the source shader has and FS needs to read some
1100 * attributes.
1101 */
1102 if (src_len > 2 || !kernel->in.count) {
1103 src_semantics += 2;
1104 src_indices += 2;
1105 src_len -= 2;
1106 src_skip = 2;
1107 }
1108 } else {
1109 src_semantics = kernel->in.semantic_names;
1110 src_indices = kernel->in.semantic_indices;
1111 src_len = kernel->in.count;
1112 src_skip = 0;
1113 }
1114
1115 /* no change */
1116 if (routing->initialized &&
1117 routing->is_point == is_point &&
1118 routing->light_twoside == light_twoside &&
1119 routing->sprite_coord_enable == sprite_coord_enable &&
1120 routing->sprite_coord_mode == sprite_coord_mode &&
1121 routing->src_len <= src_len &&
1122 !memcmp(routing->src_semantics, src_semantics,
1123 sizeof(src_semantics[0]) * routing->src_len) &&
1124 !memcmp(routing->src_indices, src_indices,
1125 sizeof(src_indices[0]) * routing->src_len))
1126 return false;
1127
1128 routing->is_point = is_point;
1129 routing->light_twoside = light_twoside;
1130 routing->sprite_coord_enable = sprite_coord_enable;
1131 routing->sprite_coord_mode = sprite_coord_mode;
1132
1133 assert(kernel->in.count <= Elements(swizzles));
1134 dst_len = MIN2(kernel->in.count, Elements(swizzles));
1135
1136 memset(&swizzles, 0, sizeof(swizzles));
1137 memset(&info, 0, sizeof(info));
1138
1139 info.attr_count = dst_len;
1140 info.cv_vue_attr_count = src_skip + src_len;
1141 info.vue_read_base = src_skip;
1142 info.vue_read_count = 0;
1143 info.has_min_read_count = true;
1144 info.swizzle_enable = false;
1145 info.swizzle_16_31 = false;
1146 info.swizzle_count = 0;
1147 info.swizzles = swizzles;
1148 info.const_interp_enables = kernel->in.const_interp_enable;
1149 info.point_sprite_enables = 0x0;
1150 info.point_sprite_origin_lower_left =
1151 (sprite_coord_mode == PIPE_SPRITE_COORD_LOWER_LEFT);
1152 info.cv_is_point = is_point;
1153
1154 for (dst_slot = 0; dst_slot < dst_len; dst_slot++) {
1155 const int semantic = kernel->in.semantic_names[dst_slot];
1156 const int index = kernel->in.semantic_indices[dst_slot];
1157
1158 if (semantic == TGSI_SEMANTIC_GENERIC &&
1159 (sprite_coord_enable & (1 << index)))
1160 info.point_sprite_enables |= 1 << dst_slot;
1161
1162 if (source) {
1163 src_slot = route_attr(src_semantics, src_indices, src_len,
1164 semantic, index);
1165
1166 /*
1167 * The source shader stage does not output this attribute. The value
1168 * is supposed to be undefined, unless the attribute goes through
1169 * point sprite replacement or the attribute is
1170 * TGSI_SEMANTIC_POSITION. In all cases, we do not care which source
1171 * attribute is picked.
1172 *
1173 * We should update the kernel code and omit the output of
1174 * TGSI_SEMANTIC_POSITION here.
1175 */
1176 if (src_slot < 0)
1177 src_slot = 0;
1178 } else {
1179 src_slot = dst_slot;
1180 }
1181
1182 /* use the following slot for two-sided lighting */
1183 if (semantic == TGSI_SEMANTIC_COLOR && light_twoside &&
1184 src_slot + 1 < src_len &&
1185 src_semantics[src_slot + 1] == TGSI_SEMANTIC_BCOLOR &&
1186 src_indices[src_slot + 1] == index) {
1187 swizzles[dst_slot].attr_select = GEN6_INPUTATTR_FACING;
1188 swizzles[dst_slot].attr = src_slot;
1189 info.swizzle_enable = true;
1190 src_slot++;
1191 } else {
1192 swizzles[dst_slot].attr_select = GEN6_INPUTATTR_NORMAL;
1193 swizzles[dst_slot].attr = src_slot;
1194 if (src_slot != dst_slot)
1195 info.swizzle_enable = true;
1196 }
1197
1198 swizzles[dst_slot].force_zeros = false;
1199
1200 if (info.vue_read_count < src_slot + 1)
1201 info.vue_read_count = src_slot + 1;
1202 }
1203
1204 if (info.swizzle_enable)
1205 info.swizzle_count = dst_len;
1206
1207 if (routing->initialized)
1208 ilo_state_sbe_set_info(&routing->sbe, shader->info.dev, &info);
1209 else
1210 ilo_state_sbe_init(&routing->sbe, shader->info.dev, &info);
1211
1212 routing->src_len = info.vue_read_count;
1213 memcpy(routing->src_semantics, src_semantics,
1214 sizeof(src_semantics[0]) * routing->src_len);
1215 memcpy(routing->src_indices, src_indices,
1216 sizeof(src_indices[0]) * routing->src_len);
1217
1218 routing->initialized = true;
1219
1220 return true;
1221 }
1222
1223 /**
1224 * Return the cache offset of the selected kernel. This must be called after
1225 * ilo_shader_select_kernel() and ilo_shader_cache_upload().
1226 */
1227 uint32_t
1228 ilo_shader_get_kernel_offset(const struct ilo_shader_state *shader)
1229 {
1230 const struct ilo_shader *kernel = shader->shader;
1231
1232 assert(kernel && kernel->uploaded);
1233
1234 return kernel->cache_offset;
1235 }
1236
1237 /**
1238 * Query a kernel parameter for the selected kernel.
1239 */
1240 int
1241 ilo_shader_get_kernel_param(const struct ilo_shader_state *shader,
1242 enum ilo_kernel_param param)
1243 {
1244 const struct ilo_shader *kernel = shader->shader;
1245 int val;
1246
1247 assert(kernel);
1248
1249 switch (param) {
1250 case ILO_KERNEL_INPUT_COUNT:
1251 val = kernel->in.count;
1252 break;
1253 case ILO_KERNEL_OUTPUT_COUNT:
1254 val = kernel->out.count;
1255 break;
1256 case ILO_KERNEL_SAMPLER_COUNT:
1257 val = shader->info.num_samplers;
1258 break;
1259 case ILO_KERNEL_URB_DATA_START_REG:
1260 val = kernel->in.start_grf;
1261 break;
1262 case ILO_KERNEL_SKIP_CBUF0_UPLOAD:
1263 val = kernel->skip_cbuf0_upload;
1264 break;
1265 case ILO_KERNEL_PCB_CBUF0_SIZE:
1266 val = kernel->pcb.cbuf0_size;
1267 break;
1268
1269 case ILO_KERNEL_SURFACE_TOTAL_COUNT:
1270 val = kernel->bt.total_count;
1271 break;
1272 case ILO_KERNEL_SURFACE_TEX_BASE:
1273 val = kernel->bt.tex_base;
1274 break;
1275 case ILO_KERNEL_SURFACE_TEX_COUNT:
1276 val = kernel->bt.tex_count;
1277 break;
1278 case ILO_KERNEL_SURFACE_CONST_BASE:
1279 val = kernel->bt.const_base;
1280 break;
1281 case ILO_KERNEL_SURFACE_CONST_COUNT:
1282 val = kernel->bt.const_count;
1283 break;
1284 case ILO_KERNEL_SURFACE_RES_BASE:
1285 val = kernel->bt.res_base;
1286 break;
1287 case ILO_KERNEL_SURFACE_RES_COUNT:
1288 val = kernel->bt.res_count;
1289 break;
1290
1291 case ILO_KERNEL_VS_INPUT_INSTANCEID:
1292 val = shader->info.has_instanceid;
1293 break;
1294 case ILO_KERNEL_VS_INPUT_VERTEXID:
1295 val = shader->info.has_vertexid;
1296 break;
1297 case ILO_KERNEL_VS_INPUT_EDGEFLAG:
1298 if (shader->info.edgeflag_in >= 0) {
1299 /* we rely on the state tracker here */
1300 assert(shader->info.edgeflag_in == kernel->in.count - 1);
1301 val = true;
1302 }
1303 else {
1304 val = false;
1305 }
1306 break;
1307 case ILO_KERNEL_VS_PCB_UCP_SIZE:
1308 val = kernel->pcb.clip_state_size;
1309 break;
1310 case ILO_KERNEL_VS_GEN6_SO:
1311 val = kernel->stream_output;
1312 break;
1313 case ILO_KERNEL_VS_GEN6_SO_START_REG:
1314 val = kernel->gs_start_grf;
1315 break;
1316 case ILO_KERNEL_VS_GEN6_SO_POINT_OFFSET:
1317 val = kernel->gs_offsets[0];
1318 break;
1319 case ILO_KERNEL_VS_GEN6_SO_LINE_OFFSET:
1320 val = kernel->gs_offsets[1];
1321 break;
1322 case ILO_KERNEL_VS_GEN6_SO_TRI_OFFSET:
1323 val = kernel->gs_offsets[2];
1324 break;
1325 case ILO_KERNEL_VS_GEN6_SO_SURFACE_COUNT:
1326 val = kernel->gs_bt_so_count;
1327 break;
1328
1329 case ILO_KERNEL_GS_DISCARD_ADJACENCY:
1330 val = kernel->in.discard_adj;
1331 break;
1332 case ILO_KERNEL_GS_GEN6_SVBI_POST_INC:
1333 val = kernel->svbi_post_inc;
1334 break;
1335 case ILO_KERNEL_GS_GEN6_SURFACE_SO_BASE:
1336 val = kernel->bt.gen6_so_base;
1337 break;
1338 case ILO_KERNEL_GS_GEN6_SURFACE_SO_COUNT:
1339 val = kernel->bt.gen6_so_count;
1340 break;
1341
1342 case ILO_KERNEL_FS_INPUT_Z:
1343 case ILO_KERNEL_FS_INPUT_W:
1344 val = kernel->in.has_pos;
1345 break;
1346 case ILO_KERNEL_FS_OUTPUT_Z:
1347 val = kernel->out.has_pos;
1348 break;
1349 case ILO_KERNEL_FS_USE_KILL:
1350 val = kernel->has_kill;
1351 break;
1352 case ILO_KERNEL_FS_BARYCENTRIC_INTERPOLATIONS:
1353 val = kernel->in.barycentric_interpolation_mode;
1354 break;
1355 case ILO_KERNEL_FS_DISPATCH_16_OFFSET:
1356 val = 0;
1357 break;
1358 case ILO_KERNEL_FS_SURFACE_RT_BASE:
1359 val = kernel->bt.rt_base;
1360 break;
1361 case ILO_KERNEL_FS_SURFACE_RT_COUNT:
1362 val = kernel->bt.rt_count;
1363 break;
1364
1365 case ILO_KERNEL_CS_LOCAL_SIZE:
1366 val = shader->info.compute.req_local_mem;
1367 break;
1368 case ILO_KERNEL_CS_PRIVATE_SIZE:
1369 val = shader->info.compute.req_private_mem;
1370 break;
1371 case ILO_KERNEL_CS_INPUT_SIZE:
1372 val = shader->info.compute.req_input_mem;
1373 break;
1374 case ILO_KERNEL_CS_SIMD_SIZE:
1375 val = 16;
1376 break;
1377 case ILO_KERNEL_CS_SURFACE_GLOBAL_BASE:
1378 val = kernel->bt.global_base;
1379 break;
1380 case ILO_KERNEL_CS_SURFACE_GLOBAL_COUNT:
1381 val = kernel->bt.global_count;
1382 break;
1383
1384 default:
1385 assert(!"unknown kernel parameter");
1386 val = 0;
1387 break;
1388 }
1389
1390 return val;
1391 }
1392
1393 /**
1394 * Return the CSO of the selected kernel.
1395 */
1396 const union ilo_shader_cso *
1397 ilo_shader_get_kernel_cso(const struct ilo_shader_state *shader)
1398 {
1399 const struct ilo_shader *kernel = shader->shader;
1400
1401 assert(kernel);
1402
1403 return &kernel->cso;
1404 }
1405
1406 /**
1407 * Return the SO info of the selected kernel.
1408 */
1409 const struct pipe_stream_output_info *
1410 ilo_shader_get_kernel_so_info(const struct ilo_shader_state *shader)
1411 {
1412 return &shader->info.stream_output;
1413 }
1414
1415 const struct ilo_state_sol *
1416 ilo_shader_get_kernel_sol(const struct ilo_shader_state *shader)
1417 {
1418 const struct ilo_shader *kernel = shader->shader;
1419
1420 assert(kernel);
1421
1422 return &kernel->sol;
1423 }
1424
1425 /**
1426 * Return the routing info of the selected kernel.
1427 */
1428 const struct ilo_state_sbe *
1429 ilo_shader_get_kernel_sbe(const struct ilo_shader_state *shader)
1430 {
1431 const struct ilo_shader *kernel = shader->shader;
1432
1433 assert(kernel);
1434
1435 return &kernel->routing.sbe;
1436 }