2 * Mesa 3-D graphics library
4 * Copyright (C) 2012-2013 LunarG, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Chia-I Wu <olv@lunarg.com>
28 #include "tgsi/tgsi_dump.h"
29 #include "tgsi/tgsi_util.h"
30 #include "toy_compiler.h"
32 #include "toy_legalize.h"
33 #include "toy_optimize.h"
34 #include "toy_helpers.h"
35 #include "ilo_context.h"
36 #include "ilo_shader_internal.h"
38 struct vs_compile_context
{
39 struct ilo_shader
*shader
;
40 const struct ilo_shader_variant
*variant
;
42 struct toy_compiler tc
;
44 enum brw_message_target const_cache
;
46 int output_map
[PIPE_MAX_SHADER_OUTPUTS
];
60 vs_lower_opcode_tgsi_in(struct vs_compile_context
*vcc
,
61 struct toy_dst dst
, int dim
, int idx
)
63 struct toy_compiler
*tc
= &vcc
->tc
;
68 slot
= toy_tgsi_find_input(&vcc
->tgsi
, idx
);
70 const int first_in_grf
= vcc
->first_vue_grf
+
71 (vcc
->shader
->in
.count
- vcc
->tgsi
.num_inputs
);
72 const int grf
= first_in_grf
+ vcc
->tgsi
.inputs
[slot
].semantic_index
;
73 const struct toy_src src
= tsrc(TOY_FILE_GRF
, grf
, 0);
78 /* undeclared input */
79 tc_MOV(tc
, dst
, tsrc_imm_f(0.0f
));
84 vs_lower_opcode_tgsi_const_pcb(struct vs_compile_context
*vcc
,
85 struct toy_dst dst
, int dim
,
88 const int i
= idx
.val32
;
89 const int grf
= vcc
->first_const_grf
+ i
/ 2;
90 const int grf_subreg
= (i
& 1) * 16;
93 if (!vcc
->variant
->use_pcb
|| dim
!= 0 || idx
.file
!= TOY_FILE_IMM
||
94 grf
>= vcc
->first_ucp_grf
)
98 src
= tsrc_rect(tsrc(TOY_FILE_GRF
, grf
, grf_subreg
), TOY_RECT_041
);
99 tc_MOV(&vcc
->tc
, dst
, src
);
105 vs_lower_opcode_tgsi_const_gen6(struct vs_compile_context
*vcc
,
106 struct toy_dst dst
, int dim
,
109 const struct toy_dst header
=
110 tdst_ud(tdst(TOY_FILE_MRF
, vcc
->first_free_mrf
, 0));
111 const struct toy_dst block_offsets
=
112 tdst_ud(tdst(TOY_FILE_MRF
, vcc
->first_free_mrf
+ 1, 0));
113 const struct toy_src r0
= tsrc_ud(tsrc(TOY_FILE_GRF
, 0, 0));
114 struct toy_compiler
*tc
= &vcc
->tc
;
115 unsigned msg_type
, msg_ctrl
, msg_len
;
116 struct toy_inst
*inst
;
119 if (vs_lower_opcode_tgsi_const_pcb(vcc
, dst
, dim
, idx
))
122 /* set message header */
123 inst
= tc_MOV(tc
, header
, r0
);
124 inst
->mask_ctrl
= BRW_MASK_DISABLE
;
126 /* set block offsets */
127 tc_MOV(tc
, block_offsets
, idx
);
129 msg_type
= GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
;
130 msg_ctrl
= BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD
<< 8;;
133 desc
= tsrc_imm_mdesc_data_port(tc
, false, msg_len
, 1, true, false,
134 msg_type
, msg_ctrl
, ILO_VS_CONST_SURFACE(dim
));
136 tc_SEND(tc
, dst
, tsrc_from(header
), desc
, vcc
->const_cache
);
140 vs_lower_opcode_tgsi_const_gen7(struct vs_compile_context
*vcc
,
141 struct toy_dst dst
, int dim
,
144 struct toy_compiler
*tc
= &vcc
->tc
;
145 const struct toy_dst offset
=
146 tdst_ud(tdst(TOY_FILE_MRF
, vcc
->first_free_mrf
, 0));
149 if (vs_lower_opcode_tgsi_const_pcb(vcc
, dst
, dim
, idx
))
153 * In 259b65e2e7938de4aab323033cfe2b33369ddb07, pull constant load was
154 * changed from OWord Dual Block Read to ld to increase performance in the
155 * classic driver. Since we use the constant cache instead of the data
156 * cache, I wonder if we still want to follow the classic driver.
160 tc_MOV(tc
, offset
, idx
);
162 desc
= tsrc_imm_mdesc_sampler(tc
, 1, 1, false,
163 BRW_SAMPLER_SIMD_MODE_SIMD4X2
,
164 GEN5_SAMPLER_MESSAGE_SAMPLE_LD
,
166 ILO_VS_CONST_SURFACE(dim
));
168 tc_SEND(tc
, dst
, tsrc_from(offset
), desc
, BRW_SFID_SAMPLER
);
172 vs_lower_opcode_tgsi_imm(struct vs_compile_context
*vcc
,
173 struct toy_dst dst
, int idx
)
178 imm
= toy_tgsi_get_imm(&vcc
->tgsi
, idx
, NULL
);
180 for (ch
= 0; ch
< 4; ch
++) {
183 tdst_writemask(tdst_ud(dst
), 1 << ch
),
184 tsrc_imm_ud(imm
[ch
]));
190 vs_lower_opcode_tgsi_sv(struct vs_compile_context
*vcc
,
191 struct toy_dst dst
, int dim
, int idx
)
193 struct toy_compiler
*tc
= &vcc
->tc
;
194 const struct toy_tgsi
*tgsi
= &vcc
->tgsi
;
199 slot
= toy_tgsi_find_system_value(tgsi
, idx
);
203 switch (tgsi
->system_values
[slot
].semantic_name
) {
204 case TGSI_SEMANTIC_INSTANCEID
:
205 case TGSI_SEMANTIC_VERTEXID
:
207 * In 3DSTATE_VERTEX_ELEMENTS, we prepend an extra vertex element for
208 * the generated IDs, with VID in the X channel and IID in the Y
212 const int grf
= vcc
->first_vue_grf
;
213 const struct toy_src src
= tsrc(TOY_FILE_GRF
, grf
, 0);
214 const enum toy_swizzle swizzle
=
215 (tgsi
->system_values
[slot
].semantic_name
==
216 TGSI_SEMANTIC_INSTANCEID
) ? TOY_SWIZZLE_Y
: TOY_SWIZZLE_X
;
218 tc_MOV(tc
, tdst_d(dst
), tsrc_d(tsrc_swizzle1(src
, swizzle
)));
221 case TGSI_SEMANTIC_PRIMID
:
223 tc_fail(tc
, "unhandled system value");
224 tc_MOV(tc
, dst
, tsrc_imm_d(0));
230 vs_lower_opcode_tgsi_direct(struct vs_compile_context
*vcc
,
231 struct toy_inst
*inst
)
233 struct toy_compiler
*tc
= &vcc
->tc
;
236 assert(inst
->src
[0].file
== TOY_FILE_IMM
);
237 dim
= inst
->src
[0].val32
;
239 assert(inst
->src
[1].file
== TOY_FILE_IMM
);
240 idx
= inst
->src
[1].val32
;
242 switch (inst
->opcode
) {
243 case TOY_OPCODE_TGSI_IN
:
244 vs_lower_opcode_tgsi_in(vcc
, inst
->dst
, dim
, idx
);
246 case TOY_OPCODE_TGSI_CONST
:
247 if (tc
->dev
->gen
>= ILO_GEN(7))
248 vs_lower_opcode_tgsi_const_gen7(vcc
, inst
->dst
, dim
, inst
->src
[1]);
250 vs_lower_opcode_tgsi_const_gen6(vcc
, inst
->dst
, dim
, inst
->src
[1]);
252 case TOY_OPCODE_TGSI_SV
:
253 vs_lower_opcode_tgsi_sv(vcc
, inst
->dst
, dim
, idx
);
255 case TOY_OPCODE_TGSI_IMM
:
257 vs_lower_opcode_tgsi_imm(vcc
, inst
->dst
, idx
);
260 tc_fail(tc
, "unhandled TGSI fetch");
264 tc_discard_inst(tc
, inst
);
268 vs_lower_opcode_tgsi_indirect(struct vs_compile_context
*vcc
,
269 struct toy_inst
*inst
)
271 struct toy_compiler
*tc
= &vcc
->tc
;
272 enum tgsi_file_type file
;
274 struct toy_src indirect_dim
, indirect_idx
;
276 assert(inst
->src
[0].file
== TOY_FILE_IMM
);
277 file
= inst
->src
[0].val32
;
279 assert(inst
->src
[1].file
== TOY_FILE_IMM
);
280 dim
= inst
->src
[1].val32
;
281 indirect_dim
= inst
->src
[2];
283 assert(inst
->src
[3].file
== TOY_FILE_IMM
);
284 idx
= inst
->src
[3].val32
;
285 indirect_idx
= inst
->src
[4];
287 /* no dimension indirection */
288 assert(indirect_dim
.file
== TOY_FILE_IMM
);
289 dim
+= indirect_dim
.val32
;
291 switch (inst
->opcode
) {
292 case TOY_OPCODE_TGSI_INDIRECT_FETCH
:
293 if (file
== TGSI_FILE_CONSTANT
) {
295 struct toy_dst tmp
= tc_alloc_tmp(tc
);
297 tc_ADD(tc
, tmp
, indirect_idx
, tsrc_imm_d(idx
));
298 indirect_idx
= tsrc_from(tmp
);
301 if (tc
->dev
->gen
>= ILO_GEN(7))
302 vs_lower_opcode_tgsi_const_gen7(vcc
, inst
->dst
, dim
, indirect_idx
);
304 vs_lower_opcode_tgsi_const_gen6(vcc
, inst
->dst
, dim
, indirect_idx
);
308 case TOY_OPCODE_TGSI_INDIRECT_STORE
:
310 tc_fail(tc
, "unhandled TGSI indirection");
314 tc_discard_inst(tc
, inst
);
318 * Emit instructions to move sampling parameters to the message registers.
321 vs_add_sampler_params(struct toy_compiler
*tc
, int msg_type
, int base_mrf
,
322 struct toy_src coords
, int num_coords
,
323 struct toy_src bias_or_lod
, struct toy_src ref_or_si
,
324 struct toy_src ddx
, struct toy_src ddy
, int num_derivs
)
326 const unsigned coords_writemask
= (1 << num_coords
) - 1;
330 assert(num_coords
<= 4);
331 assert(num_derivs
<= 3 && num_derivs
<= num_coords
);
333 for (i
= 0; i
< Elements(m
); i
++)
334 m
[i
] = tdst(TOY_FILE_MRF
, base_mrf
+ i
, 0);
337 case GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
:
338 tc_MOV(tc
, tdst_writemask(m
[0], coords_writemask
), coords
);
339 tc_MOV(tc
, tdst_writemask(m
[1], TOY_WRITEMASK_X
), bias_or_lod
);
342 case GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
:
343 tc_MOV(tc
, tdst_writemask(m
[0], coords_writemask
), coords
);
344 tc_MOV(tc
, tdst_writemask(m
[1], TOY_WRITEMASK_XZ
),
345 tsrc_swizzle(ddx
, 0, 0, 1, 1));
346 tc_MOV(tc
, tdst_writemask(m
[1], TOY_WRITEMASK_YW
),
347 tsrc_swizzle(ddy
, 0, 0, 1, 1));
348 if (num_derivs
> 2) {
349 tc_MOV(tc
, tdst_writemask(m
[2], TOY_WRITEMASK_X
),
350 tsrc_swizzle1(ddx
, 2));
351 tc_MOV(tc
, tdst_writemask(m
[2], TOY_WRITEMASK_Y
),
352 tsrc_swizzle1(ddy
, 2));
354 num_params
= 4 + num_derivs
* 2;
356 case GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
:
357 tc_MOV(tc
, tdst_writemask(m
[0], coords_writemask
), coords
);
358 tc_MOV(tc
, tdst_writemask(m
[1], TOY_WRITEMASK_X
), ref_or_si
);
359 tc_MOV(tc
, tdst_writemask(m
[1], TOY_WRITEMASK_Y
), bias_or_lod
);
362 case GEN5_SAMPLER_MESSAGE_SAMPLE_LD
:
363 assert(num_coords
<= 3);
364 tc_MOV(tc
, tdst_writemask(tdst_d(m
[0]), coords_writemask
), coords
);
365 tc_MOV(tc
, tdst_writemask(tdst_d(m
[0]), TOY_WRITEMASK_W
), bias_or_lod
);
366 if (tc
->dev
->gen
>= ILO_GEN(7)) {
370 tc_MOV(tc
, tdst_writemask(tdst_d(m
[1]), TOY_WRITEMASK_X
), ref_or_si
);
374 case GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
:
375 tc_MOV(tc
, tdst_writemask(tdst_d(m
[0]), TOY_WRITEMASK_X
), bias_or_lod
);
379 tc_fail(tc
, "unknown sampler opcode");
384 return (num_params
+ 3) / 4;
388 * Set up message registers and return the message descriptor for sampling.
390 static struct toy_src
391 vs_prepare_tgsi_sampling(struct toy_compiler
*tc
, const struct toy_inst
*inst
,
392 int base_mrf
, unsigned *ret_sampler_index
)
394 unsigned simd_mode
, msg_type
, msg_len
, sampler_index
, binding_table_index
;
395 struct toy_src coords
, ddx
, ddy
, bias_or_lod
, ref_or_si
;
396 int num_coords
, ref_pos
, num_derivs
;
399 simd_mode
= BRW_SAMPLER_SIMD_MODE_SIMD4X2
;
401 coords
= inst
->src
[0];
404 bias_or_lod
= tsrc_null();
405 ref_or_si
= tsrc_null();
409 num_coords
= tgsi_util_get_texture_coord_dim(inst
->tex
.target
, &ref_pos
);
411 /* extract the parameters */
412 switch (inst
->opcode
) {
413 case TOY_OPCODE_TGSI_TXD
:
417 msg_type
= HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
;
418 ref_or_si
= tsrc_swizzle1(coords
, ref_pos
);
420 if (tc
->dev
->gen
< ILO_GEN(7.5))
421 tc_fail(tc
, "TXD with shadow sampler not supported");
424 msg_type
= GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
;
429 num_derivs
= num_coords
;
432 case TOY_OPCODE_TGSI_TXL
:
436 msg_type
= GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
;
437 ref_or_si
= tsrc_swizzle1(coords
, ref_pos
);
440 msg_type
= GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
;
443 bias_or_lod
= tsrc_swizzle1(coords
, TOY_SWIZZLE_W
);
445 case TOY_OPCODE_TGSI_TXF
:
446 msg_type
= GEN5_SAMPLER_MESSAGE_SAMPLE_LD
;
448 switch (inst
->tex
.target
) {
449 case TGSI_TEXTURE_2D_MSAA
:
450 case TGSI_TEXTURE_2D_ARRAY_MSAA
:
451 assert(ref_pos
>= 0 && ref_pos
< 4);
452 /* lod is always 0 */
453 bias_or_lod
= tsrc_imm_d(0);
454 ref_or_si
= tsrc_swizzle1(coords
, ref_pos
);
457 bias_or_lod
= tsrc_swizzle1(coords
, TOY_SWIZZLE_W
);
461 /* offset the coordinates */
462 if (!tsrc_is_null(inst
->tex
.offsets
[0])) {
465 tmp
= tc_alloc_tmp(tc
);
466 tc_ADD(tc
, tmp
, coords
, inst
->tex
.offsets
[0]);
467 coords
= tsrc_from(tmp
);
472 case TOY_OPCODE_TGSI_TXQ
:
473 msg_type
= GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
;
475 bias_or_lod
= tsrc_swizzle1(coords
, TOY_SWIZZLE_X
);
477 case TOY_OPCODE_TGSI_TXQ_LZ
:
478 msg_type
= GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
;
482 case TOY_OPCODE_TGSI_TXL2
:
486 msg_type
= GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
;
487 ref_or_si
= tsrc_swizzle1(coords
, ref_pos
);
490 msg_type
= GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
;
493 bias_or_lod
= tsrc_swizzle1(inst
->src
[1], TOY_SWIZZLE_X
);
497 assert(!"unhandled sampling opcode");
498 if (ret_sampler_index
)
499 *ret_sampler_index
= 0;
504 assert(inst
->src
[sampler_src
].file
== TOY_FILE_IMM
);
505 sampler_index
= inst
->src
[sampler_src
].val32
;
506 binding_table_index
= ILO_VS_TEXTURE_SURFACE(sampler_index
);
509 * From the Sandy Bridge PRM, volume 4 part 1, page 18:
511 * "Note that the (cube map) coordinates delivered to the sampling
512 * engine must already have been divided by the component with the
513 * largest absolute value."
515 switch (inst
->tex
.target
) {
516 case TGSI_TEXTURE_CUBE
:
517 case TGSI_TEXTURE_SHADOWCUBE
:
518 case TGSI_TEXTURE_CUBE_ARRAY
:
519 case TGSI_TEXTURE_SHADOWCUBE_ARRAY
:
520 /* TXQ does not need coordinates */
521 if (num_coords
>= 3) {
522 struct toy_dst tmp
, max
;
523 struct toy_src abs_coords
[3];
526 tmp
= tc_alloc_tmp(tc
);
527 max
= tdst_writemask(tmp
, TOY_WRITEMASK_W
);
529 for (i
= 0; i
< 3; i
++)
530 abs_coords
[i
] = tsrc_absolute(tsrc_swizzle1(coords
, i
));
532 tc_SEL(tc
, max
, abs_coords
[0], abs_coords
[0], BRW_CONDITIONAL_GE
);
533 tc_SEL(tc
, max
, tsrc_from(max
), abs_coords
[0], BRW_CONDITIONAL_GE
);
534 tc_INV(tc
, max
, tsrc_from(max
));
536 for (i
= 0; i
< 3; i
++)
537 tc_MUL(tc
, tdst_writemask(tmp
, 1 << i
), coords
, tsrc_from(max
));
539 coords
= tsrc_from(tmp
);
544 /* set up sampler parameters */
545 msg_len
= vs_add_sampler_params(tc
, msg_type
, base_mrf
,
546 coords
, num_coords
, bias_or_lod
, ref_or_si
, ddx
, ddy
, num_derivs
);
549 * From the Sandy Bridge PRM, volume 4 part 1, page 136:
551 * "The maximum message length allowed to the sampler is 11. This would
552 * disallow sample_d, sample_b_c, and sample_l_c with a SIMD Mode of
556 tc_fail(tc
, "maximum length for messages to the sampler is 11");
558 if (ret_sampler_index
)
559 *ret_sampler_index
= sampler_index
;
561 return tsrc_imm_mdesc_sampler(tc
, msg_len
, 1,
562 false, simd_mode
, msg_type
, sampler_index
, binding_table_index
);
566 vs_lower_opcode_tgsi_sampling(struct vs_compile_context
*vcc
,
567 struct toy_inst
*inst
)
569 struct toy_compiler
*tc
= &vcc
->tc
;
571 struct toy_dst dst
, tmp
;
572 unsigned sampler_index
;
574 unsigned swizzle_zero_mask
, swizzle_one_mask
, swizzle_normal_mask
;
577 desc
= vs_prepare_tgsi_sampling(tc
, inst
,
578 vcc
->first_free_mrf
, &sampler_index
);
580 switch (inst
->opcode
) {
581 case TOY_OPCODE_TGSI_TXF
:
582 case TOY_OPCODE_TGSI_TXQ
:
583 case TOY_OPCODE_TGSI_TXQ_LZ
:
591 toy_compiler_lower_to_send(tc
, inst
, false, BRW_SFID_SAMPLER
);
592 inst
->src
[0] = tsrc(TOY_FILE_MRF
, vcc
->first_free_mrf
, 0);
595 /* write to a temp first */
596 tmp
= tc_alloc_tmp(tc
);
597 tmp
.type
= inst
->dst
.type
;
601 tc_move_inst(tc
, inst
);
604 assert(sampler_index
< vcc
->variant
->num_sampler_views
);
605 swizzles
[0] = vcc
->variant
->sampler_view_swizzles
[sampler_index
].r
;
606 swizzles
[1] = vcc
->variant
->sampler_view_swizzles
[sampler_index
].g
;
607 swizzles
[2] = vcc
->variant
->sampler_view_swizzles
[sampler_index
].b
;
608 swizzles
[3] = vcc
->variant
->sampler_view_swizzles
[sampler_index
].a
;
611 swizzles
[0] = PIPE_SWIZZLE_RED
;
612 swizzles
[1] = PIPE_SWIZZLE_GREEN
;
613 swizzles
[2] = PIPE_SWIZZLE_BLUE
;
614 swizzles
[3] = PIPE_SWIZZLE_ALPHA
;
617 swizzle_zero_mask
= 0;
618 swizzle_one_mask
= 0;
619 swizzle_normal_mask
= 0;
620 for (i
= 0; i
< 4; i
++) {
621 switch (swizzles
[i
]) {
622 case PIPE_SWIZZLE_ZERO
:
623 swizzle_zero_mask
|= 1 << i
;
626 case PIPE_SWIZZLE_ONE
:
627 swizzle_one_mask
|= 1 << i
;
631 swizzle_normal_mask
|= 1 << i
;
636 /* swizzle the results */
637 if (swizzle_normal_mask
) {
638 tc_MOV(tc
, tdst_writemask(dst
, swizzle_normal_mask
),
639 tsrc_swizzle(tsrc_from(tmp
), swizzles
[0],
640 swizzles
[1], swizzles
[2], swizzles
[3]));
642 if (swizzle_zero_mask
)
643 tc_MOV(tc
, tdst_writemask(dst
, swizzle_zero_mask
), tsrc_imm_f(0.0f
));
644 if (swizzle_one_mask
)
645 tc_MOV(tc
, tdst_writemask(dst
, swizzle_one_mask
), tsrc_imm_f(1.0f
));
649 vs_lower_opcode_urb_write(struct toy_compiler
*tc
, struct toy_inst
*inst
)
651 /* vs_write_vue() has set up the message registers */
652 toy_compiler_lower_to_send(tc
, inst
, false, BRW_SFID_URB
);
656 vs_lower_virtual_opcodes(struct vs_compile_context
*vcc
)
658 struct toy_compiler
*tc
= &vcc
->tc
;
659 struct toy_inst
*inst
;
662 while ((inst
= tc_next(tc
)) != NULL
) {
663 switch (inst
->opcode
) {
664 case TOY_OPCODE_TGSI_IN
:
665 case TOY_OPCODE_TGSI_CONST
:
666 case TOY_OPCODE_TGSI_SV
:
667 case TOY_OPCODE_TGSI_IMM
:
668 vs_lower_opcode_tgsi_direct(vcc
, inst
);
670 case TOY_OPCODE_TGSI_INDIRECT_FETCH
:
671 case TOY_OPCODE_TGSI_INDIRECT_STORE
:
672 vs_lower_opcode_tgsi_indirect(vcc
, inst
);
674 case TOY_OPCODE_TGSI_TEX
:
675 case TOY_OPCODE_TGSI_TXB
:
676 case TOY_OPCODE_TGSI_TXD
:
677 case TOY_OPCODE_TGSI_TXL
:
678 case TOY_OPCODE_TGSI_TXP
:
679 case TOY_OPCODE_TGSI_TXF
:
680 case TOY_OPCODE_TGSI_TXQ
:
681 case TOY_OPCODE_TGSI_TXQ_LZ
:
682 case TOY_OPCODE_TGSI_TEX2
:
683 case TOY_OPCODE_TGSI_TXB2
:
684 case TOY_OPCODE_TGSI_TXL2
:
685 case TOY_OPCODE_TGSI_SAMPLE
:
686 case TOY_OPCODE_TGSI_SAMPLE_I
:
687 case TOY_OPCODE_TGSI_SAMPLE_I_MS
:
688 case TOY_OPCODE_TGSI_SAMPLE_B
:
689 case TOY_OPCODE_TGSI_SAMPLE_C
:
690 case TOY_OPCODE_TGSI_SAMPLE_C_LZ
:
691 case TOY_OPCODE_TGSI_SAMPLE_D
:
692 case TOY_OPCODE_TGSI_SAMPLE_L
:
693 case TOY_OPCODE_TGSI_GATHER4
:
694 case TOY_OPCODE_TGSI_SVIEWINFO
:
695 case TOY_OPCODE_TGSI_SAMPLE_POS
:
696 case TOY_OPCODE_TGSI_SAMPLE_INFO
:
697 vs_lower_opcode_tgsi_sampling(vcc
, inst
);
702 case TOY_OPCODE_SQRT
:
706 case TOY_OPCODE_FDIV
:
708 case TOY_OPCODE_INT_DIV_QUOTIENT
:
709 case TOY_OPCODE_INT_DIV_REMAINDER
:
710 toy_compiler_lower_math(tc
, inst
);
712 case TOY_OPCODE_URB_WRITE
:
713 vs_lower_opcode_urb_write(tc
, inst
);
716 if (inst
->opcode
> 127)
717 tc_fail(tc
, "unhandled virtual opcode");
724 * Compile the shader.
727 vs_compile(struct vs_compile_context
*vcc
)
729 struct toy_compiler
*tc
= &vcc
->tc
;
730 struct ilo_shader
*sh
= vcc
->shader
;
732 vs_lower_virtual_opcodes(vcc
);
733 toy_compiler_legalize_for_ra(tc
);
734 toy_compiler_optimize(tc
);
735 toy_compiler_allocate_registers(tc
,
738 vcc
->num_grf_per_vrf
);
739 toy_compiler_legalize_for_asm(tc
);
742 ilo_err("failed to legalize VS instructions: %s\n", tc
->reason
);
746 if (ilo_debug
& ILO_DEBUG_VS
) {
747 ilo_printf("legalized instructions:\n");
748 toy_compiler_dump(tc
);
753 sh
->kernel
= toy_compiler_assemble(tc
, &sh
->kernel_size
);
756 static const uint32_t microcode
[] = {
757 /* fill in the microcode here */
760 const bool swap
= true;
762 sh
->kernel_size
= sizeof(microcode
);
763 sh
->kernel
= MALLOC(sh
->kernel_size
);
766 const int num_dwords
= sizeof(microcode
) / 4;
767 const uint32_t *src
= microcode
;
768 uint32_t *dst
= (uint32_t *) sh
->kernel
;
771 for (i
= 0; i
< num_dwords
; i
+= 4) {
773 dst
[i
+ 0] = src
[i
+ 3];
774 dst
[i
+ 1] = src
[i
+ 2];
775 dst
[i
+ 2] = src
[i
+ 1];
776 dst
[i
+ 3] = src
[i
+ 0];
779 memcpy(dst
, src
, 16);
786 ilo_err("failed to compile VS: %s\n", tc
->reason
);
790 if (ilo_debug
& ILO_DEBUG_VS
) {
791 ilo_printf("disassembly:\n");
792 toy_compiler_disassemble(tc
, sh
->kernel
, sh
->kernel_size
);
800 * Collect the toy registers to be written to the VUE.
803 vs_collect_outputs(struct vs_compile_context
*vcc
, struct toy_src
*outs
)
805 const struct toy_tgsi
*tgsi
= &vcc
->tgsi
;
808 for (i
= 0; i
< vcc
->shader
->out
.count
; i
++) {
809 const int slot
= vcc
->output_map
[i
];
810 const int vrf
= (slot
>= 0) ? toy_tgsi_get_vrf(tgsi
,
811 TGSI_FILE_OUTPUT
, 0, tgsi
->outputs
[slot
].index
) : -1;
817 dst
= tdst(TOY_FILE_VRF
, vrf
, 0);
818 src
= tsrc_from(dst
);
821 /* PSIZE is at channel W */
822 tc_MOV(&vcc
->tc
, tdst_writemask(dst
, TOY_WRITEMASK_W
),
823 tsrc_swizzle1(src
, TOY_SWIZZLE_X
));
825 /* the other channels are for the header */
827 tc_MOV(&vcc
->tc
, tdst_writemask(dst
, TOY_WRITEMASK_XYZ
),
831 /* initialize unused channels to 0.0f */
832 if (tgsi
->outputs
[slot
].undefined_mask
) {
833 dst
= tdst_writemask(dst
, tgsi
->outputs
[slot
].undefined_mask
);
834 tc_MOV(&vcc
->tc
, dst
, tsrc_imm_f(0.0f
));
839 /* XXX this is too ugly */
840 if (vcc
->shader
->out
.semantic_names
[i
] == TGSI_SEMANTIC_CLIPDIST
&&
842 /* ok, we need to compute clip distance */
843 int clipvert_slot
= -1, clipvert_vrf
, j
;
845 for (j
= 0; j
< tgsi
->num_outputs
; j
++) {
846 if (tgsi
->outputs
[j
].semantic_name
==
847 TGSI_SEMANTIC_CLIPVERTEX
) {
851 else if (tgsi
->outputs
[j
].semantic_name
==
852 TGSI_SEMANTIC_POSITION
) {
853 /* remember pos, but keep looking */
858 clipvert_vrf
= (clipvert_slot
>= 0) ? toy_tgsi_get_vrf(tgsi
,
859 TGSI_FILE_OUTPUT
, 0, tgsi
->outputs
[clipvert_slot
].index
) : -1;
860 if (clipvert_vrf
>= 0) {
861 struct toy_dst tmp
= tc_alloc_tmp(&vcc
->tc
);
862 struct toy_src clipvert
= tsrc(TOY_FILE_VRF
, clipvert_vrf
, 0);
863 int first_ucp
, last_ucp
;
865 if (vcc
->shader
->out
.semantic_indices
[i
]) {
867 last_ucp
= MIN2(7, vcc
->variant
->u
.vs
.num_ucps
- 1);
871 last_ucp
= MIN2(3, vcc
->variant
->u
.vs
.num_ucps
- 1);
874 for (j
= first_ucp
; j
<= last_ucp
; j
++) {
875 const int plane_grf
= vcc
->first_ucp_grf
+ j
/ 2;
876 const int plane_subreg
= (j
& 1) * 16;
877 const struct toy_src plane
= tsrc_rect(tsrc(TOY_FILE_GRF
,
878 plane_grf
, plane_subreg
), TOY_RECT_041
);
879 const unsigned writemask
= 1 << ((j
>= 4) ? j
- 4 : j
);
881 tc_DP4(&vcc
->tc
, tdst_writemask(tmp
, writemask
),
885 src
= tsrc_from(tmp
);
888 src
= tsrc_imm_f(0.0f
);
892 src
= (i
== 0) ? tsrc_imm_d(0) : tsrc_imm_f(0.0f
);
903 * Emit instructions to write the VUE.
906 vs_write_vue(struct vs_compile_context
*vcc
)
908 struct toy_compiler
*tc
= &vcc
->tc
;
909 struct toy_src outs
[PIPE_MAX_SHADER_OUTPUTS
];
910 struct toy_dst header
;
912 struct toy_inst
*inst
;
913 int sent_attrs
, total_attrs
;
915 header
= tdst_ud(tdst(TOY_FILE_MRF
, vcc
->first_free_mrf
, 0));
916 r0
= tsrc_ud(tsrc(TOY_FILE_GRF
, 0, 0));
917 inst
= tc_MOV(tc
, header
, r0
);
918 inst
->mask_ctrl
= BRW_MASK_DISABLE
;
920 if (tc
->dev
->gen
>= ILO_GEN(7)) {
921 inst
= tc_OR(tc
, tdst_offset(header
, 0, 5),
922 tsrc_rect(tsrc_offset(r0
, 0, 5), TOY_RECT_010
),
923 tsrc_rect(tsrc_imm_ud(0xff00), TOY_RECT_010
));
924 inst
->exec_size
= BRW_EXECUTE_1
;
925 inst
->access_mode
= BRW_ALIGN_1
;
926 inst
->mask_ctrl
= BRW_MASK_DISABLE
;
929 total_attrs
= vs_collect_outputs(vcc
, outs
);
931 while (sent_attrs
< total_attrs
) {
933 int mrf
= vcc
->first_free_mrf
+ 1, avail_mrf_for_attrs
;
934 int num_attrs
, msg_len
, i
;
937 num_attrs
= total_attrs
- sent_attrs
;
940 /* see if we need another message */
941 avail_mrf_for_attrs
= vcc
->last_free_mrf
- mrf
+ 1;
942 if (num_attrs
> avail_mrf_for_attrs
) {
944 * From the Sandy Bridge PRM, volume 4 part 2, page 22:
946 * "Offset. This field specifies a destination offset (in 256-bit
947 * units) from the start of the URB entry(s), as referenced by
948 * URB Return Handle n, at which the data (if any) will be
951 * As we need to offset the following messages, we must make sure
952 * this one writes an even number of attributes.
954 num_attrs
= avail_mrf_for_attrs
& ~1;
958 if (tc
->dev
->gen
>= ILO_GEN(7)) {
959 /* do not forget about the header */
960 msg_len
= 1 + num_attrs
;
964 * From the Sandy Bridge PRM, volume 4 part 2, page 26:
966 * "At least 256 bits per vertex (512 bits total, M1 & M2) must
967 * be written. Writing only 128 bits per vertex (256 bits
968 * total, M1 only) results in UNDEFINED operation."
970 * "[DevSNB] Interleave writes must be in multiples of 256 per
973 * That is, we must write or appear to write an even number of
974 * attributes, starting from two.
976 if (num_attrs
% 2 && num_attrs
== avail_mrf_for_attrs
) {
981 msg_len
= 1 + align(num_attrs
, 2);
984 for (i
= 0; i
< num_attrs
; i
++)
985 tc_MOV(tc
, tdst(TOY_FILE_MRF
, mrf
++, 0), outs
[sent_attrs
+ i
]);
987 assert(sent_attrs
% 2 == 0);
988 desc
= tsrc_imm_mdesc_urb(tc
, eot
, msg_len
, 0,
989 eot
, true, false, BRW_URB_SWIZZLE_INTERLEAVE
, sent_attrs
/ 2, 0);
991 tc_add2(tc
, TOY_OPCODE_URB_WRITE
, tdst_null(), tsrc_from(header
), desc
);
993 sent_attrs
+= num_attrs
;
998 * Set up shader inputs for fixed-function units.
1001 vs_setup_shader_in(struct ilo_shader
*sh
, const struct toy_tgsi
*tgsi
)
1005 /* vertex/instance id is the first VE if exists */
1006 for (i
= 0; i
< tgsi
->num_system_values
; i
++) {
1009 switch (tgsi
->system_values
[i
].semantic_name
) {
1010 case TGSI_SEMANTIC_INSTANCEID
:
1011 case TGSI_SEMANTIC_VERTEXID
:
1019 sh
->in
.semantic_names
[sh
->in
.count
] =
1020 tgsi
->system_values
[i
].semantic_name
;
1021 sh
->in
.semantic_indices
[sh
->in
.count
] =
1022 tgsi
->system_values
[i
].semantic_index
;
1023 sh
->in
.interp
[sh
->in
.count
] = TGSI_INTERPOLATE_CONSTANT
;
1024 sh
->in
.centroid
[sh
->in
.count
] = false;
1032 for (i
= 0; i
< tgsi
->num_inputs
; i
++) {
1033 assert(tgsi
->inputs
[i
].semantic_name
== TGSI_SEMANTIC_GENERIC
);
1034 if (tgsi
->inputs
[i
].semantic_index
>= num_attrs
)
1035 num_attrs
= tgsi
->inputs
[i
].semantic_index
+ 1;
1037 assert(num_attrs
<= PIPE_MAX_ATTRIBS
);
1039 /* VF cannot remap VEs. VE[i] must be used as GENERIC[i]. */
1040 for (i
= 0; i
< num_attrs
; i
++) {
1041 sh
->in
.semantic_names
[sh
->in
.count
+ i
] = TGSI_SEMANTIC_GENERIC
;
1042 sh
->in
.semantic_indices
[sh
->in
.count
+ i
] = i
;
1043 sh
->in
.interp
[sh
->in
.count
+ i
] = TGSI_INTERPOLATE_CONSTANT
;
1044 sh
->in
.centroid
[sh
->in
.count
+ i
] = false;
1047 sh
->in
.count
+= num_attrs
;
1049 sh
->in
.has_pos
= false;
1050 sh
->in
.has_linear_interp
= false;
1051 sh
->in
.barycentric_interpolation_mode
= 0;
1055 * Set up shader outputs for fixed-function units.
1058 vs_setup_shader_out(struct ilo_shader
*sh
, const struct toy_tgsi
*tgsi
,
1059 bool output_clipdist
, int *output_map
)
1061 int psize_slot
= -1, pos_slot
= -1;
1062 int clipdist_slot
[2] = { -1, -1 };
1063 int color_slot
[4] = { -1, -1, -1, -1 };
1066 /* find out the slots of outputs that need special care */
1067 for (i
= 0; i
< tgsi
->num_outputs
; i
++) {
1068 switch (tgsi
->outputs
[i
].semantic_name
) {
1069 case TGSI_SEMANTIC_PSIZE
:
1072 case TGSI_SEMANTIC_POSITION
:
1075 case TGSI_SEMANTIC_CLIPDIST
:
1076 if (tgsi
->outputs
[i
].semantic_index
)
1077 clipdist_slot
[1] = i
;
1079 clipdist_slot
[0] = i
;
1081 case TGSI_SEMANTIC_COLOR
:
1082 if (tgsi
->outputs
[i
].semantic_index
)
1087 case TGSI_SEMANTIC_BCOLOR
:
1088 if (tgsi
->outputs
[i
].semantic_index
)
1098 /* the first two VUEs are always PSIZE and POSITION */
1100 output_map
[0] = psize_slot
;
1101 output_map
[1] = pos_slot
;
1103 sh
->out
.register_indices
[0] =
1104 (psize_slot
>= 0) ? tgsi
->outputs
[psize_slot
].index
: -1;
1105 sh
->out
.semantic_names
[0] = TGSI_SEMANTIC_PSIZE
;
1106 sh
->out
.semantic_indices
[0] = 0;
1108 sh
->out
.register_indices
[1] =
1109 (pos_slot
>= 0) ? tgsi
->outputs
[pos_slot
].index
: -1;
1110 sh
->out
.semantic_names
[1] = TGSI_SEMANTIC_POSITION
;
1111 sh
->out
.semantic_indices
[1] = 0;
1113 sh
->out
.has_pos
= true;
1115 /* followed by optional clip distances */
1116 if (output_clipdist
) {
1117 sh
->out
.register_indices
[num_outs
] =
1118 (clipdist_slot
[0] >= 0) ? tgsi
->outputs
[clipdist_slot
[0]].index
: -1;
1119 sh
->out
.semantic_names
[num_outs
] = TGSI_SEMANTIC_CLIPDIST
;
1120 sh
->out
.semantic_indices
[num_outs
] = 0;
1121 output_map
[num_outs
++] = clipdist_slot
[0];
1123 sh
->out
.register_indices
[num_outs
] =
1124 (clipdist_slot
[1] >= 0) ? tgsi
->outputs
[clipdist_slot
[1]].index
: -1;
1125 sh
->out
.semantic_names
[num_outs
] = TGSI_SEMANTIC_CLIPDIST
;
1126 sh
->out
.semantic_indices
[num_outs
] = 1;
1127 output_map
[num_outs
++] = clipdist_slot
[1];
1131 * make BCOLOR follow COLOR so that we can make use of
1132 * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING in 3DSTATE_SF
1134 for (i
= 0; i
< 4; i
++) {
1135 const int slot
= color_slot
[i
];
1140 sh
->out
.register_indices
[num_outs
] = tgsi
->outputs
[slot
].index
;
1141 sh
->out
.semantic_names
[num_outs
] = tgsi
->outputs
[slot
].semantic_name
;
1142 sh
->out
.semantic_indices
[num_outs
] = tgsi
->outputs
[slot
].semantic_index
;
1144 output_map
[num_outs
++] = slot
;
1147 /* add the rest of the outputs */
1148 for (i
= 0; i
< tgsi
->num_outputs
; i
++) {
1149 switch (tgsi
->outputs
[i
].semantic_name
) {
1150 case TGSI_SEMANTIC_PSIZE
:
1151 case TGSI_SEMANTIC_POSITION
:
1152 case TGSI_SEMANTIC_CLIPDIST
:
1153 case TGSI_SEMANTIC_COLOR
:
1154 case TGSI_SEMANTIC_BCOLOR
:
1157 sh
->out
.register_indices
[num_outs
] = tgsi
->outputs
[i
].index
;
1158 sh
->out
.semantic_names
[num_outs
] = tgsi
->outputs
[i
].semantic_name
;
1159 sh
->out
.semantic_indices
[num_outs
] = tgsi
->outputs
[i
].semantic_index
;
1160 output_map
[num_outs
++] = i
;
1165 sh
->out
.count
= num_outs
;
1169 * Translate the TGSI tokens.
1172 vs_setup_tgsi(struct toy_compiler
*tc
, const struct tgsi_token
*tokens
,
1173 struct toy_tgsi
*tgsi
)
1175 if (ilo_debug
& ILO_DEBUG_VS
) {
1176 ilo_printf("dumping vertex shader\n");
1179 tgsi_dump(tokens
, 0);
1183 toy_compiler_translate_tgsi(tc
, tokens
, true, tgsi
);
1185 ilo_err("failed to translate VS TGSI tokens: %s\n", tc
->reason
);
1189 if (ilo_debug
& ILO_DEBUG_VS
) {
1190 ilo_printf("TGSI translator:\n");
1191 toy_tgsi_dump(tgsi
);
1193 toy_compiler_dump(tc
);
1201 * Set up VS compile context. This includes translating the TGSI tokens.
1204 vs_setup(struct vs_compile_context
*vcc
,
1205 const struct ilo_shader_state
*state
,
1206 const struct ilo_shader_variant
*variant
)
1210 memset(vcc
, 0, sizeof(*vcc
));
1212 vcc
->shader
= CALLOC_STRUCT(ilo_shader
);
1216 vcc
->variant
= variant
;
1218 toy_compiler_init(&vcc
->tc
, state
->info
.dev
);
1219 vcc
->tc
.templ
.access_mode
= BRW_ALIGN_16
;
1220 vcc
->tc
.templ
.exec_size
= BRW_EXECUTE_8
;
1221 vcc
->tc
.rect_linear_width
= 4;
1224 * The classic driver uses the sampler cache (gen6) or the data cache
1227 vcc
->const_cache
= GEN6_SFID_DATAPORT_CONSTANT_CACHE
;
1229 if (!vs_setup_tgsi(&vcc
->tc
, state
->info
.tokens
, &vcc
->tgsi
)) {
1230 toy_compiler_cleanup(&vcc
->tc
);
1235 vs_setup_shader_in(vcc
->shader
, &vcc
->tgsi
);
1236 vs_setup_shader_out(vcc
->shader
, &vcc
->tgsi
,
1237 (vcc
->variant
->u
.vs
.num_ucps
> 0), vcc
->output_map
);
1239 if (vcc
->variant
->use_pcb
&& !vcc
->tgsi
.const_indirect
) {
1240 num_consts
= (vcc
->tgsi
.const_count
+ 1) / 2;
1243 * From the Sandy Bridge PRM, volume 2 part 1, page 138:
1245 * "The sum of all four read length fields (each incremented to
1246 * represent the actual read length) must be less than or equal to
1249 if (num_consts
> 32)
1256 vcc
->shader
->skip_cbuf0_upload
= (!vcc
->tgsi
.const_count
|| num_consts
);
1257 vcc
->shader
->pcb
.cbuf0_size
= num_consts
* (sizeof(float) * 8);
1259 /* r0 is reserved for payload header */
1260 vcc
->first_const_grf
= 1;
1261 vcc
->first_ucp_grf
= vcc
->first_const_grf
+ num_consts
;
1263 /* fit each pair of user clip planes into a register */
1264 vcc
->first_vue_grf
= vcc
->first_ucp_grf
+
1265 (vcc
->variant
->u
.vs
.num_ucps
+ 1) / 2;
1267 vcc
->first_free_grf
= vcc
->first_vue_grf
+ vcc
->shader
->in
.count
;
1268 vcc
->last_free_grf
= 127;
1270 /* m0 is reserved for system routines */
1271 vcc
->first_free_mrf
= 1;
1272 vcc
->last_free_mrf
= 15;
1274 vcc
->num_grf_per_vrf
= 1;
1276 if (vcc
->tc
.dev
->gen
>= ILO_GEN(7)) {
1277 vcc
->last_free_grf
-= 15;
1278 vcc
->first_free_mrf
= vcc
->last_free_grf
+ 1;
1279 vcc
->last_free_mrf
= vcc
->first_free_mrf
+ 14;
1282 vcc
->shader
->in
.start_grf
= vcc
->first_const_grf
;
1283 vcc
->shader
->pcb
.clip_state_size
=
1284 vcc
->variant
->u
.vs
.num_ucps
* (sizeof(float) * 4);
1290 * Compile the vertex shader.
1293 ilo_shader_compile_vs(const struct ilo_shader_state
*state
,
1294 const struct ilo_shader_variant
*variant
)
1296 struct vs_compile_context vcc
;
1299 if (!vs_setup(&vcc
, state
, variant
))
1302 if (vcc
.tc
.dev
->gen
>= ILO_GEN(7)) {
1306 need_gs
= variant
->u
.vs
.rasterizer_discard
||
1307 state
->info
.stream_output
.num_outputs
;
1312 if (!vs_compile(&vcc
)) {
1317 toy_tgsi_cleanup(&vcc
.tgsi
);
1318 toy_compiler_cleanup(&vcc
.tc
);
1321 int so_mapping
[PIPE_MAX_SHADER_OUTPUTS
];
1324 for (i
= 0; i
< vcc
.tgsi
.num_outputs
; i
++) {
1327 for (j
= 0; j
< vcc
.shader
->out
.count
; j
++) {
1328 if (vcc
.tgsi
.outputs
[i
].semantic_name
==
1329 vcc
.shader
->out
.semantic_names
[j
] &&
1330 vcc
.tgsi
.outputs
[i
].semantic_index
==
1331 vcc
.shader
->out
.semantic_indices
[j
]) {
1337 so_mapping
[i
] = attr
;
1340 if (!ilo_shader_compile_gs_passthrough(state
, variant
,
1341 so_mapping
, vcc
.shader
)) {
1342 ilo_shader_destroy_kernel(vcc
.shader
);