ff4e4be01cc04b22f13249596ccc53673cf40d32
[mesa.git] / src / gallium / drivers / ilo / shader / ilo_shader_vs.c
1 /*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2012-2013 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28 #include "tgsi/tgsi_dump.h"
29 #include "toy_compiler.h"
30 #include "toy_tgsi.h"
31 #include "toy_legalize.h"
32 #include "toy_optimize.h"
33 #include "toy_helpers.h"
34 #include "ilo_context.h"
35 #include "ilo_shader.h"
36
37 struct vs_compile_context {
38 struct ilo_shader *shader;
39 const struct ilo_shader_variant *variant;
40
41 struct toy_compiler tc;
42 struct toy_tgsi tgsi;
43 enum brw_message_target const_cache;
44
45 int output_map[PIPE_MAX_SHADER_OUTPUTS];
46
47 int num_grf_per_vrf;
48 int first_const_grf;
49 int first_vue_grf;
50 int first_free_grf;
51 int last_free_grf;
52
53 int first_free_mrf;
54 int last_free_mrf;
55 };
56
57 static void
58 vs_lower_opcode_tgsi_in(struct vs_compile_context *vcc,
59 struct toy_dst dst, int dim, int idx)
60 {
61 struct toy_compiler *tc = &vcc->tc;
62 int slot;
63
64 assert(!dim);
65
66 slot = toy_tgsi_find_input(&vcc->tgsi, idx);
67 if (slot >= 0) {
68 const int first_in_grf = vcc->first_vue_grf +
69 (vcc->shader->in.count - vcc->tgsi.num_inputs);
70 const int grf = first_in_grf + vcc->tgsi.inputs[slot].semantic_index;
71 const struct toy_src src = tsrc(TOY_FILE_GRF, grf, 0);
72
73 tc_MOV(tc, dst, src);
74 }
75 else {
76 /* undeclared input */
77 tc_MOV(tc, dst, tsrc_imm_f(0.0f));
78 }
79 }
80
81 static void
82 vs_lower_opcode_tgsi_const_gen6(struct vs_compile_context *vcc,
83 struct toy_dst dst, int dim,
84 struct toy_src idx)
85 {
86 const struct toy_dst header =
87 tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf, 0));
88 const struct toy_dst block_offsets =
89 tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf + 1, 0));
90 const struct toy_src r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0));
91 struct toy_compiler *tc = &vcc->tc;
92 unsigned msg_type, msg_ctrl, msg_len;
93 struct toy_inst *inst;
94 struct toy_src desc;
95
96 /* set message header */
97 inst = tc_MOV(tc, header, r0);
98 inst->mask_ctrl = BRW_MASK_DISABLE;
99
100 /* set block offsets */
101 tc_MOV(tc, block_offsets, idx);
102
103 msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
104 msg_ctrl = BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD << 8;;
105 msg_len = 2;
106
107 desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false,
108 msg_type, msg_ctrl, ILO_VS_CONST_SURFACE(dim));
109
110 tc_SEND(tc, dst, tsrc_from(header), desc, vcc->const_cache);
111 }
112
113 static void
114 vs_lower_opcode_tgsi_const_gen7(struct vs_compile_context *vcc,
115 struct toy_dst dst, int dim,
116 struct toy_src idx)
117 {
118 struct toy_compiler *tc = &vcc->tc;
119 const struct toy_dst offset =
120 tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf, 0));
121 struct toy_src desc;
122
123 /*
124 * In 259b65e2e7938de4aab323033cfe2b33369ddb07, pull constant load was
125 * changed from OWord Dual Block Read to ld to increase performance in the
126 * classic driver. Since we use the constant cache instead of the data
127 * cache, I wonder if we still want to follow the classic driver.
128 */
129
130 /* set offset */
131 tc_MOV(tc, offset, idx);
132
133 desc = tsrc_imm_mdesc_sampler(tc, 1, 1, false,
134 BRW_SAMPLER_SIMD_MODE_SIMD4X2,
135 GEN5_SAMPLER_MESSAGE_SAMPLE_LD,
136 0,
137 ILO_VS_CONST_SURFACE(dim));
138
139 tc_SEND(tc, dst, tsrc_from(offset), desc, BRW_SFID_SAMPLER);
140 }
141
142 static void
143 vs_lower_opcode_tgsi_imm(struct vs_compile_context *vcc,
144 struct toy_dst dst, int idx)
145 {
146 const uint32_t *imm;
147 int ch;
148
149 imm = toy_tgsi_get_imm(&vcc->tgsi, idx, NULL);
150
151 for (ch = 0; ch < 4; ch++) {
152 /* raw moves */
153 tc_MOV(&vcc->tc,
154 tdst_writemask(tdst_ud(dst), 1 << ch),
155 tsrc_imm_ud(imm[ch]));
156 }
157 }
158
159
160 static void
161 vs_lower_opcode_tgsi_sv(struct vs_compile_context *vcc,
162 struct toy_dst dst, int dim, int idx)
163 {
164 struct toy_compiler *tc = &vcc->tc;
165 const struct toy_tgsi *tgsi = &vcc->tgsi;
166 int slot;
167
168 assert(!dim);
169
170 slot = toy_tgsi_find_system_value(tgsi, idx);
171 if (slot < 0)
172 return;
173
174 switch (tgsi->system_values[slot].semantic_name) {
175 case TGSI_SEMANTIC_INSTANCEID:
176 case TGSI_SEMANTIC_VERTEXID:
177 /*
178 * In 3DSTATE_VERTEX_ELEMENTS, we prepend an extra vertex element for
179 * the generated IDs, with VID in the X channel and IID in the Y
180 * channel.
181 */
182 {
183 const int grf = vcc->first_vue_grf;
184 const struct toy_src src = tsrc(TOY_FILE_GRF, grf, 0);
185 const enum toy_swizzle swizzle =
186 (tgsi->system_values[slot].semantic_name ==
187 TGSI_SEMANTIC_INSTANCEID) ? TOY_SWIZZLE_Y : TOY_SWIZZLE_X;
188
189 tc_MOV(tc, tdst_d(dst), tsrc_d(tsrc_swizzle1(src, swizzle)));
190 }
191 break;
192 case TGSI_SEMANTIC_PRIMID:
193 default:
194 tc_fail(tc, "unhandled system value");
195 tc_MOV(tc, dst, tsrc_imm_d(0));
196 break;
197 }
198 }
199
200 static void
201 vs_lower_opcode_tgsi_direct(struct vs_compile_context *vcc,
202 struct toy_inst *inst)
203 {
204 struct toy_compiler *tc = &vcc->tc;
205 int dim, idx;
206
207 assert(inst->src[0].file == TOY_FILE_IMM);
208 dim = inst->src[0].val32;
209
210 assert(inst->src[1].file == TOY_FILE_IMM);
211 idx = inst->src[1].val32;
212
213 switch (inst->opcode) {
214 case TOY_OPCODE_TGSI_IN:
215 vs_lower_opcode_tgsi_in(vcc, inst->dst, dim, idx);
216 break;
217 case TOY_OPCODE_TGSI_CONST:
218 if (tc->dev->gen >= ILO_GEN(7))
219 vs_lower_opcode_tgsi_const_gen7(vcc, inst->dst, dim, inst->src[1]);
220 else
221 vs_lower_opcode_tgsi_const_gen6(vcc, inst->dst, dim, inst->src[1]);
222 break;
223 case TOY_OPCODE_TGSI_SV:
224 vs_lower_opcode_tgsi_sv(vcc, inst->dst, dim, idx);
225 break;
226 case TOY_OPCODE_TGSI_IMM:
227 assert(!dim);
228 vs_lower_opcode_tgsi_imm(vcc, inst->dst, idx);
229 break;
230 default:
231 tc_fail(tc, "unhandled TGSI fetch");
232 break;
233 }
234
235 tc_discard_inst(tc, inst);
236 }
237
238 static void
239 vs_lower_opcode_tgsi_indirect(struct vs_compile_context *vcc,
240 struct toy_inst *inst)
241 {
242 struct toy_compiler *tc = &vcc->tc;
243 enum tgsi_file_type file;
244 int dim, idx;
245 struct toy_src indirect_dim, indirect_idx;
246
247 assert(inst->src[0].file == TOY_FILE_IMM);
248 file = inst->src[0].val32;
249
250 assert(inst->src[1].file == TOY_FILE_IMM);
251 dim = inst->src[1].val32;
252 indirect_dim = inst->src[2];
253
254 assert(inst->src[3].file == TOY_FILE_IMM);
255 idx = inst->src[3].val32;
256 indirect_idx = inst->src[4];
257
258 /* no dimension indirection */
259 assert(indirect_dim.file == TOY_FILE_IMM);
260 dim += indirect_dim.val32;
261
262 switch (inst->opcode) {
263 case TOY_OPCODE_TGSI_INDIRECT_FETCH:
264 if (file == TGSI_FILE_CONSTANT) {
265 if (idx) {
266 struct toy_dst tmp = tc_alloc_tmp(tc);
267
268 tc_ADD(tc, tmp, indirect_idx, tsrc_imm_d(idx));
269 indirect_idx = tsrc_from(tmp);
270 }
271
272 if (tc->dev->gen >= ILO_GEN(7))
273 vs_lower_opcode_tgsi_const_gen7(vcc, inst->dst, dim, indirect_idx);
274 else
275 vs_lower_opcode_tgsi_const_gen6(vcc, inst->dst, dim, indirect_idx);
276 break;
277 }
278 /* fall through */
279 case TOY_OPCODE_TGSI_INDIRECT_STORE:
280 default:
281 tc_fail(tc, "unhandled TGSI indirection");
282 break;
283 }
284
285 tc_discard_inst(tc, inst);
286 }
287
288 /**
289 * Emit instructions to move sampling parameters to the message registers.
290 */
291 static int
292 vs_add_sampler_params(struct toy_compiler *tc, int msg_type, int base_mrf,
293 struct toy_src coords, int num_coords,
294 struct toy_src bias_or_lod, struct toy_src ref_or_si,
295 struct toy_src ddx, struct toy_src ddy, int num_derivs)
296 {
297 const unsigned coords_writemask = (1 << num_coords) - 1;
298 struct toy_dst m[3];
299 int num_params, i;
300
301 assert(num_coords <= 4);
302 assert(num_derivs <= 3 && num_derivs <= num_coords);
303
304 for (i = 0; i < Elements(m); i++)
305 m[i] = tdst(TOY_FILE_MRF, base_mrf + i, 0);
306
307 switch (msg_type) {
308 case GEN5_SAMPLER_MESSAGE_SAMPLE_LOD:
309 tc_MOV(tc, tdst_writemask(m[0], coords_writemask), coords);
310 tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_X), bias_or_lod);
311 num_params = 5;
312 break;
313 case GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS:
314 tc_MOV(tc, tdst_writemask(m[0], coords_writemask), coords);
315 tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_XZ),
316 tsrc_swizzle(ddx, 0, 0, 1, 1));
317 tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_YW),
318 tsrc_swizzle(ddy, 0, 0, 1, 1));
319 if (num_derivs > 2) {
320 tc_MOV(tc, tdst_writemask(m[2], TOY_WRITEMASK_X),
321 tsrc_swizzle1(ddx, 2));
322 tc_MOV(tc, tdst_writemask(m[2], TOY_WRITEMASK_Y),
323 tsrc_swizzle1(ddy, 2));
324 }
325 num_params = 4 + num_derivs * 2;
326 break;
327 case GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE:
328 tc_MOV(tc, tdst_writemask(m[0], coords_writemask), coords);
329 tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_X), ref_or_si);
330 tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_Y), bias_or_lod);
331 num_params = 6;
332 break;
333 case GEN5_SAMPLER_MESSAGE_SAMPLE_LD:
334 assert(num_coords <= 3);
335 tc_MOV(tc, tdst_writemask(tdst_d(m[0]), coords_writemask), coords);
336 tc_MOV(tc, tdst_writemask(tdst_d(m[0]), TOY_WRITEMASK_W), bias_or_lod);
337 if (tc->dev->gen >= ILO_GEN(7)) {
338 num_params = 4;
339 }
340 else {
341 tc_MOV(tc, tdst_writemask(tdst_d(m[1]), TOY_WRITEMASK_X), ref_or_si);
342 num_params = 5;
343 }
344 break;
345 case GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO:
346 tc_MOV(tc, tdst_writemask(tdst_d(m[0]), TOY_WRITEMASK_X), bias_or_lod);
347 num_params = 1;
348 break;
349 default:
350 tc_fail(tc, "unknown sampler opcode");
351 num_params = 0;
352 break;
353 }
354
355 return (num_params + 3) / 4;
356 }
357
358 /**
359 * Set up message registers and return the message descriptor for sampling.
360 */
361 static struct toy_src
362 vs_prepare_tgsi_sampling(struct toy_compiler *tc, const struct toy_inst *inst,
363 int base_mrf, unsigned *ret_sampler_index)
364 {
365 unsigned simd_mode, msg_type, msg_len, sampler_index, binding_table_index;
366 struct toy_src coords, ddx, ddy, bias_or_lod, ref_or_si;
367 int num_coords, ref_pos, num_derivs;
368 int sampler_src;
369
370 simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD4X2;
371
372 coords = inst->src[0];
373 ddx = tsrc_null();
374 ddy = tsrc_null();
375 bias_or_lod = tsrc_null();
376 ref_or_si = tsrc_null();
377 num_derivs = 0;
378 sampler_src = 1;
379
380 num_coords = toy_tgsi_get_texture_coord_dim(inst->tex.target, &ref_pos);
381
382 /* extract the parameters */
383 switch (inst->opcode) {
384 case TOY_OPCODE_TGSI_TXD:
385 if (ref_pos >= 0)
386 tc_fail(tc, "TXD with shadow sampler not supported");
387
388 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
389 ddx = inst->src[1];
390 ddy = inst->src[2];
391 num_derivs = num_coords;
392 sampler_src = 3;
393 break;
394 case TOY_OPCODE_TGSI_TXL:
395 if (ref_pos >= 0) {
396 assert(ref_pos < 3);
397
398 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE;
399 ref_or_si = tsrc_swizzle1(coords, ref_pos);
400 }
401 else {
402 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LOD;
403 }
404
405 bias_or_lod = tsrc_swizzle1(coords, TOY_SWIZZLE_W);
406 break;
407 case TOY_OPCODE_TGSI_TXF:
408 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;
409
410 switch (inst->tex.target) {
411 case TGSI_TEXTURE_2D_MSAA:
412 case TGSI_TEXTURE_2D_ARRAY_MSAA:
413 assert(ref_pos >= 0 && ref_pos < 4);
414 /* lod is always 0 */
415 bias_or_lod = tsrc_imm_d(0);
416 ref_or_si = tsrc_swizzle1(coords, ref_pos);
417 break;
418 default:
419 bias_or_lod = tsrc_swizzle1(coords, TOY_SWIZZLE_W);
420 break;
421 }
422
423 /* offset the coordinates */
424 if (!tsrc_is_null(inst->tex.offsets[0])) {
425 struct toy_dst tmp;
426
427 tmp = tc_alloc_tmp(tc);
428 tc_ADD(tc, tmp, coords, inst->tex.offsets[0]);
429 coords = tsrc_from(tmp);
430 }
431
432 sampler_src = 1;
433 break;
434 case TOY_OPCODE_TGSI_TXQ:
435 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO;
436 num_coords = 0;
437 bias_or_lod = tsrc_swizzle1(coords, TOY_SWIZZLE_X);
438 break;
439 case TOY_OPCODE_TGSI_TXQ_LZ:
440 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO;
441 num_coords = 0;
442 sampler_src = 0;
443 break;
444 case TOY_OPCODE_TGSI_TXL2:
445 if (ref_pos >= 0) {
446 assert(ref_pos < 4);
447
448 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE;
449 ref_or_si = tsrc_swizzle1(coords, ref_pos);
450 }
451 else {
452 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LOD;
453 }
454
455 bias_or_lod = tsrc_swizzle1(inst->src[1], TOY_SWIZZLE_X);
456 sampler_src = 2;
457 break;
458 default:
459 assert(!"unhandled sampling opcode");
460 return tsrc_null();
461 break;
462 }
463
464 assert(inst->src[sampler_src].file == TOY_FILE_IMM);
465 sampler_index = inst->src[sampler_src].val32;
466 binding_table_index = ILO_VS_TEXTURE_SURFACE(sampler_index);
467
468 /*
469 * From the Sandy Bridge PRM, volume 4 part 1, page 18:
470 *
471 * "Note that the (cube map) coordinates delivered to the sampling
472 * engine must already have been divided by the component with the
473 * largest absolute value."
474 */
475 switch (inst->tex.target) {
476 case TGSI_TEXTURE_CUBE:
477 case TGSI_TEXTURE_SHADOWCUBE:
478 case TGSI_TEXTURE_CUBE_ARRAY:
479 case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
480 /* TXQ does not need coordinates */
481 if (num_coords >= 3) {
482 struct toy_dst tmp, max;
483 struct toy_src abs_coords[3];
484 int i;
485
486 tmp = tc_alloc_tmp(tc);
487 max = tdst_writemask(tmp, TOY_WRITEMASK_W);
488
489 for (i = 0; i < 3; i++)
490 abs_coords[i] = tsrc_absolute(tsrc_swizzle1(coords, i));
491
492 tc_SEL(tc, max, abs_coords[0], abs_coords[0], BRW_CONDITIONAL_GE);
493 tc_SEL(tc, max, tsrc_from(max), abs_coords[0], BRW_CONDITIONAL_GE);
494 tc_INV(tc, max, tsrc_from(max));
495
496 for (i = 0; i < 3; i++)
497 tc_MUL(tc, tdst_writemask(tmp, 1 << i), coords, tsrc_from(max));
498
499 coords = tsrc_from(tmp);
500 }
501 break;
502 }
503
504 /* set up sampler parameters */
505 msg_len = vs_add_sampler_params(tc, msg_type, base_mrf,
506 coords, num_coords, bias_or_lod, ref_or_si, ddx, ddy, num_derivs);
507
508 /*
509 * From the Sandy Bridge PRM, volume 4 part 1, page 136:
510 *
511 * "The maximum message length allowed to the sampler is 11. This would
512 * disallow sample_d, sample_b_c, and sample_l_c with a SIMD Mode of
513 * SIMD16."
514 */
515 if (msg_len > 11)
516 tc_fail(tc, "maximum length for messages to the sampler is 11");
517
518 if (ret_sampler_index)
519 *ret_sampler_index = sampler_index;
520
521 return tsrc_imm_mdesc_sampler(tc, msg_len, 1,
522 false, simd_mode, msg_type, sampler_index, binding_table_index);
523 }
524
525 static void
526 vs_lower_opcode_tgsi_sampling(struct vs_compile_context *vcc,
527 struct toy_inst *inst)
528 {
529 struct toy_compiler *tc = &vcc->tc;
530 struct toy_src desc;
531 struct toy_dst dst, tmp;
532 unsigned sampler_index;
533 int swizzles[4], i;
534 unsigned swizzle_zero_mask, swizzle_one_mask, swizzle_normal_mask;
535 bool need_filter;
536
537 desc = vs_prepare_tgsi_sampling(tc, inst,
538 vcc->first_free_mrf, &sampler_index);
539
540 switch (inst->opcode) {
541 case TOY_OPCODE_TGSI_TXF:
542 case TOY_OPCODE_TGSI_TXQ:
543 case TOY_OPCODE_TGSI_TXQ_LZ:
544 need_filter = false;
545 break;
546 default:
547 need_filter = true;
548 break;
549 }
550
551 toy_compiler_lower_to_send(tc, inst, false, BRW_SFID_SAMPLER);
552 inst->src[0] = tsrc(TOY_FILE_MRF, vcc->first_free_mrf, 0);
553 inst->src[1] = desc;
554
555 /* write to a temp first */
556 tmp = tc_alloc_tmp(tc);
557 dst = inst->dst;
558 inst->dst = tmp;
559
560 tc_move_inst(tc, inst);
561
562 if (need_filter) {
563 assert(sampler_index < vcc->variant->num_sampler_views);
564 swizzles[0] = vcc->variant->sampler_view_swizzles[sampler_index].r;
565 swizzles[1] = vcc->variant->sampler_view_swizzles[sampler_index].g;
566 swizzles[2] = vcc->variant->sampler_view_swizzles[sampler_index].b;
567 swizzles[3] = vcc->variant->sampler_view_swizzles[sampler_index].a;
568 }
569 else {
570 swizzles[0] = PIPE_SWIZZLE_RED;
571 swizzles[1] = PIPE_SWIZZLE_GREEN;
572 swizzles[2] = PIPE_SWIZZLE_BLUE;
573 swizzles[3] = PIPE_SWIZZLE_ALPHA;
574 }
575
576 swizzle_zero_mask = 0;
577 swizzle_one_mask = 0;
578 swizzle_normal_mask = 0;
579 for (i = 0; i < 4; i++) {
580 switch (swizzles[i]) {
581 case PIPE_SWIZZLE_ZERO:
582 swizzle_zero_mask |= 1 << i;
583 swizzles[i] = i;
584 break;
585 case PIPE_SWIZZLE_ONE:
586 swizzle_one_mask |= 1 << i;
587 swizzles[i] = i;
588 break;
589 default:
590 swizzle_normal_mask |= 1 << i;
591 break;
592 }
593 }
594
595 /* swizzle the results */
596 if (swizzle_normal_mask) {
597 tc_MOV(tc, tdst_writemask(dst, swizzle_normal_mask),
598 tsrc_swizzle(tsrc_from(tmp), swizzles[0],
599 swizzles[1], swizzles[2], swizzles[3]));
600 }
601 if (swizzle_zero_mask)
602 tc_MOV(tc, tdst_writemask(dst, swizzle_zero_mask), tsrc_imm_f(0.0f));
603 if (swizzle_one_mask)
604 tc_MOV(tc, tdst_writemask(dst, swizzle_one_mask), tsrc_imm_f(1.0f));
605 }
606
607 static void
608 vs_lower_opcode_urb_write(struct toy_compiler *tc, struct toy_inst *inst)
609 {
610 /* vs_write_vue() has set up the message registers */
611 toy_compiler_lower_to_send(tc, inst, false, BRW_SFID_URB);
612 }
613
614 static void
615 vs_lower_virtual_opcodes(struct vs_compile_context *vcc)
616 {
617 struct toy_compiler *tc = &vcc->tc;
618 struct toy_inst *inst;
619
620 tc_head(tc);
621 while ((inst = tc_next(tc)) != NULL) {
622 switch (inst->opcode) {
623 case TOY_OPCODE_TGSI_IN:
624 case TOY_OPCODE_TGSI_CONST:
625 case TOY_OPCODE_TGSI_SV:
626 case TOY_OPCODE_TGSI_IMM:
627 vs_lower_opcode_tgsi_direct(vcc, inst);
628 break;
629 case TOY_OPCODE_TGSI_INDIRECT_FETCH:
630 case TOY_OPCODE_TGSI_INDIRECT_STORE:
631 vs_lower_opcode_tgsi_indirect(vcc, inst);
632 break;
633 case TOY_OPCODE_TGSI_TEX:
634 case TOY_OPCODE_TGSI_TXB:
635 case TOY_OPCODE_TGSI_TXD:
636 case TOY_OPCODE_TGSI_TXL:
637 case TOY_OPCODE_TGSI_TXP:
638 case TOY_OPCODE_TGSI_TXF:
639 case TOY_OPCODE_TGSI_TXQ:
640 case TOY_OPCODE_TGSI_TXQ_LZ:
641 case TOY_OPCODE_TGSI_TEX2:
642 case TOY_OPCODE_TGSI_TXB2:
643 case TOY_OPCODE_TGSI_TXL2:
644 case TOY_OPCODE_TGSI_SAMPLE:
645 case TOY_OPCODE_TGSI_SAMPLE_I:
646 case TOY_OPCODE_TGSI_SAMPLE_I_MS:
647 case TOY_OPCODE_TGSI_SAMPLE_B:
648 case TOY_OPCODE_TGSI_SAMPLE_C:
649 case TOY_OPCODE_TGSI_SAMPLE_C_LZ:
650 case TOY_OPCODE_TGSI_SAMPLE_D:
651 case TOY_OPCODE_TGSI_SAMPLE_L:
652 case TOY_OPCODE_TGSI_GATHER4:
653 case TOY_OPCODE_TGSI_SVIEWINFO:
654 case TOY_OPCODE_TGSI_SAMPLE_POS:
655 case TOY_OPCODE_TGSI_SAMPLE_INFO:
656 vs_lower_opcode_tgsi_sampling(vcc, inst);
657 break;
658 case TOY_OPCODE_INV:
659 case TOY_OPCODE_LOG:
660 case TOY_OPCODE_EXP:
661 case TOY_OPCODE_SQRT:
662 case TOY_OPCODE_RSQ:
663 case TOY_OPCODE_SIN:
664 case TOY_OPCODE_COS:
665 case TOY_OPCODE_FDIV:
666 case TOY_OPCODE_POW:
667 case TOY_OPCODE_INT_DIV_QUOTIENT:
668 case TOY_OPCODE_INT_DIV_REMAINDER:
669 toy_compiler_lower_math(tc, inst);
670 break;
671 case TOY_OPCODE_URB_WRITE:
672 vs_lower_opcode_urb_write(tc, inst);
673 break;
674 default:
675 if (inst->opcode > 127)
676 tc_fail(tc, "unhandled virtual opcode");
677 break;
678 }
679 }
680 }
681
682 /**
683 * Compile the shader.
684 */
685 static bool
686 vs_compile(struct vs_compile_context *vcc)
687 {
688 struct toy_compiler *tc = &vcc->tc;
689 struct ilo_shader *sh = vcc->shader;
690
691 vs_lower_virtual_opcodes(vcc);
692 toy_compiler_legalize_for_ra(tc);
693 toy_compiler_optimize(tc);
694 toy_compiler_allocate_registers(tc,
695 vcc->first_free_grf,
696 vcc->last_free_grf,
697 vcc->num_grf_per_vrf);
698 toy_compiler_legalize_for_asm(tc);
699
700 if (tc->fail) {
701 ilo_err("failed to legalize VS instructions: %s\n", tc->reason);
702 return false;
703 }
704
705 if (ilo_debug & ILO_DEBUG_VS) {
706 ilo_printf("legalized instructions:\n");
707 toy_compiler_dump(tc);
708 ilo_printf("\n");
709 }
710
711 if (true) {
712 sh->kernel = toy_compiler_assemble(tc, &sh->kernel_size);
713 }
714 else {
715 static const uint32_t microcode[] = {
716 /* fill in the microcode here */
717 0x0, 0x0, 0x0, 0x0,
718 };
719 const bool swap = true;
720
721 sh->kernel_size = sizeof(microcode);
722 sh->kernel = MALLOC(sh->kernel_size);
723
724 if (sh->kernel) {
725 const int num_dwords = sizeof(microcode) / 4;
726 const uint32_t *src = microcode;
727 uint32_t *dst = (uint32_t *) sh->kernel;
728 int i;
729
730 for (i = 0; i < num_dwords; i += 4) {
731 if (swap) {
732 dst[i + 0] = src[i + 3];
733 dst[i + 1] = src[i + 2];
734 dst[i + 2] = src[i + 1];
735 dst[i + 3] = src[i + 0];
736 }
737 else {
738 memcpy(dst, src, 16);
739 }
740 }
741 }
742 }
743
744 if (!sh->kernel) {
745 ilo_err("failed to compile VS: %s\n", tc->reason);
746 return false;
747 }
748
749 if (ilo_debug & ILO_DEBUG_VS) {
750 ilo_printf("disassembly:\n");
751 toy_compiler_disassemble(tc, sh->kernel, sh->kernel_size);
752 ilo_printf("\n");
753 }
754
755 return true;
756 }
757
758 /**
759 * Collect the toy registers to be written to the VUE.
760 */
761 static int
762 vs_collect_outputs(struct vs_compile_context *vcc, struct toy_src *outs)
763 {
764 const struct toy_tgsi *tgsi = &vcc->tgsi;
765 int i;
766
767 for (i = 0; i < vcc->shader->out.count; i++) {
768 const int slot = vcc->output_map[i];
769 const int vrf = (slot >= 0) ? toy_tgsi_get_vrf(tgsi,
770 TGSI_FILE_OUTPUT, 0, tgsi->outputs[slot].index) : -1;
771 struct toy_src src;
772
773 if (vrf >= 0) {
774 struct toy_dst dst;
775
776 dst = tdst(TOY_FILE_VRF, vrf, 0);
777 src = tsrc_from(dst);
778
779 if (i == 0) {
780 /* PSIZE is at channel W */
781 tc_MOV(&vcc->tc, tdst_writemask(dst, TOY_WRITEMASK_W),
782 tsrc_swizzle1(src, TOY_SWIZZLE_X));
783
784 /* the other channels are for the header */
785 dst = tdst_d(dst);
786 tc_MOV(&vcc->tc, tdst_writemask(dst, TOY_WRITEMASK_XYZ),
787 tsrc_imm_d(0));
788 }
789 else {
790 /* initialize unused channels to 0.0f */
791 if (tgsi->outputs[slot].undefined_mask) {
792 dst = tdst_writemask(dst, tgsi->outputs[slot].undefined_mask);
793 tc_MOV(&vcc->tc, dst, tsrc_imm_f(0.0f));
794 }
795 }
796 }
797 else {
798 /* XXX this is too ugly */
799 if (vcc->shader->out.semantic_names[i] == TGSI_SEMANTIC_CLIPDIST &&
800 slot < 0) {
801 /* ok, we need to compute clip distance */
802 int clipvert_slot = -1, clipvert_vrf, j;
803
804 for (j = 0; j < tgsi->num_outputs; j++) {
805 if (tgsi->outputs[j].semantic_name ==
806 TGSI_SEMANTIC_CLIPVERTEX) {
807 clipvert_slot = j;
808 break;
809 }
810 else if (tgsi->outputs[j].semantic_name ==
811 TGSI_SEMANTIC_POSITION) {
812 /* remember pos, but keep looking */
813 clipvert_slot = j;
814 }
815 }
816
817 clipvert_vrf = (clipvert_slot >= 0) ? toy_tgsi_get_vrf(tgsi,
818 TGSI_FILE_OUTPUT, 0, tgsi->outputs[clipvert_slot].index) : -1;
819 if (clipvert_vrf >= 0) {
820 struct toy_dst tmp = tc_alloc_tmp(&vcc->tc);
821 struct toy_src clipvert = tsrc(TOY_FILE_VRF, clipvert_vrf, 0);
822 int first_ucp, last_ucp;
823
824 if (vcc->shader->out.semantic_indices[i]) {
825 first_ucp = 4;
826 last_ucp = MIN2(7, vcc->variant->u.vs.num_ucps - 1);
827 }
828 else {
829 first_ucp = 0;
830 last_ucp = MIN2(3, vcc->variant->u.vs.num_ucps - 1);
831 }
832
833 for (j = first_ucp; j <= last_ucp; j++) {
834 const int plane_grf = vcc->first_const_grf + j / 2;
835 const int plane_subreg = (j & 1) * 16;
836 const struct toy_src plane = tsrc_rect(tsrc(TOY_FILE_GRF,
837 plane_grf, plane_subreg), TOY_RECT_041);
838 const unsigned writemask = 1 << ((j >= 4) ? j - 4 : j);
839
840 tc_DP4(&vcc->tc, tdst_writemask(tmp, writemask),
841 clipvert, plane);
842 }
843
844 src = tsrc_from(tmp);
845 }
846 else {
847 src = tsrc_imm_f(0.0f);
848 }
849 }
850 else {
851 src = (i == 0) ? tsrc_imm_d(0) : tsrc_imm_f(0.0f);
852 }
853 }
854
855 outs[i] = src;
856 }
857
858 return i;
859 }
860
861 /**
862 * Emit instructions to write the VUE.
863 */
864 static void
865 vs_write_vue(struct vs_compile_context *vcc)
866 {
867 struct toy_compiler *tc = &vcc->tc;
868 struct toy_src outs[PIPE_MAX_SHADER_OUTPUTS];
869 struct toy_dst header;
870 struct toy_src r0;
871 struct toy_inst *inst;
872 int sent_attrs, total_attrs;
873
874 header = tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf, 0));
875 r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0));
876 inst = tc_MOV(tc, header, r0);
877 inst->mask_ctrl = BRW_MASK_DISABLE;
878
879 if (tc->dev->gen >= ILO_GEN(7)) {
880 inst = tc_OR(tc, tdst_offset(header, 0, 5),
881 tsrc_rect(tsrc_offset(r0, 0, 5), TOY_RECT_010),
882 tsrc_rect(tsrc_imm_ud(0xff00), TOY_RECT_010));
883 inst->exec_size = BRW_EXECUTE_1;
884 inst->access_mode = BRW_ALIGN_1;
885 inst->mask_ctrl = BRW_MASK_DISABLE;
886 }
887
888 total_attrs = vs_collect_outputs(vcc, outs);
889 sent_attrs = 0;
890 while (sent_attrs < total_attrs) {
891 struct toy_src desc;
892 int mrf = vcc->first_free_mrf + 1, avail_mrf_for_attrs;
893 int num_attrs, msg_len, i;
894 bool eot;
895
896 num_attrs = total_attrs - sent_attrs;
897 eot = true;
898
899 /* see if we need another message */
900 avail_mrf_for_attrs = vcc->last_free_mrf - mrf + 1;
901 if (num_attrs > avail_mrf_for_attrs) {
902 /*
903 * From the Sandy Bridge PRM, volume 4 part 2, page 22:
904 *
905 * "Offset. This field specifies a destination offset (in 256-bit
906 * units) from the start of the URB entry(s), as referenced by
907 * URB Return Handle n, at which the data (if any) will be
908 * written."
909 *
910 * As we need to offset the following messages, we must make sure
911 * this one writes an even number of attributes.
912 */
913 num_attrs = avail_mrf_for_attrs & ~1;
914 eot = false;
915 }
916
917 if (tc->dev->gen >= ILO_GEN(7)) {
918 /* do not forget about the header */
919 msg_len = 1 + num_attrs;
920 }
921 else {
922 /*
923 * From the Sandy Bridge PRM, volume 4 part 2, page 26:
924 *
925 * "At least 256 bits per vertex (512 bits total, M1 & M2) must
926 * be written. Writing only 128 bits per vertex (256 bits
927 * total, M1 only) results in UNDEFINED operation."
928 *
929 * "[DevSNB] Interleave writes must be in multiples of 256 per
930 * vertex."
931 *
932 * That is, we must write or appear to write an even number of
933 * attributes, starting from two.
934 */
935 if (num_attrs % 2 && num_attrs == avail_mrf_for_attrs) {
936 num_attrs--;
937 eot = false;
938 }
939
940 msg_len = 1 + align(num_attrs, 2);
941 }
942
943 for (i = 0; i < num_attrs; i++)
944 tc_MOV(tc, tdst(TOY_FILE_MRF, mrf++, 0), outs[sent_attrs + i]);
945
946 assert(sent_attrs % 2 == 0);
947 desc = tsrc_imm_mdesc_urb(tc, eot, msg_len, 0,
948 eot, true, false, BRW_URB_SWIZZLE_INTERLEAVE, sent_attrs / 2, 0);
949
950 tc_add2(tc, TOY_OPCODE_URB_WRITE, tdst_null(), tsrc_from(header), desc);
951
952 sent_attrs += num_attrs;
953 }
954 }
955
956 /**
957 * Set up shader inputs for fixed-function units.
958 */
959 static void
960 vs_setup_shader_in(struct ilo_shader *sh, const struct toy_tgsi *tgsi)
961 {
962 int num_attrs, i;
963
964 /* vertex/instance id is the first VE if exists */
965 for (i = 0; i < tgsi->num_system_values; i++) {
966 bool found = false;
967
968 switch (tgsi->system_values[i].semantic_name) {
969 case TGSI_SEMANTIC_INSTANCEID:
970 case TGSI_SEMANTIC_VERTEXID:
971 found = true;
972 break;
973 default:
974 break;
975 }
976
977 if (found) {
978 sh->in.semantic_names[sh->in.count] =
979 tgsi->system_values[i].semantic_name;
980 sh->in.semantic_indices[sh->in.count] =
981 tgsi->system_values[i].semantic_index;
982 sh->in.interp[sh->in.count] = TGSI_INTERPOLATE_CONSTANT;
983 sh->in.centroid[sh->in.count] = false;
984
985 sh->in.count++;
986 break;
987 }
988 }
989
990 num_attrs = 0;
991 for (i = 0; i < tgsi->num_inputs; i++) {
992 assert(tgsi->inputs[i].semantic_name == TGSI_SEMANTIC_GENERIC);
993 if (tgsi->inputs[i].semantic_index >= num_attrs)
994 num_attrs = tgsi->inputs[i].semantic_index + 1;
995 }
996 assert(num_attrs <= PIPE_MAX_ATTRIBS);
997
998 /* VF cannot remap VEs. VE[i] must be used as GENERIC[i]. */
999 for (i = 0; i < num_attrs; i++) {
1000 sh->in.semantic_names[sh->in.count + i] = TGSI_SEMANTIC_GENERIC;
1001 sh->in.semantic_indices[sh->in.count + i] = i;
1002 sh->in.interp[sh->in.count + i] = TGSI_INTERPOLATE_CONSTANT;
1003 sh->in.centroid[sh->in.count + i] = false;
1004 }
1005
1006 sh->in.count += num_attrs;
1007
1008 sh->in.has_pos = false;
1009 sh->in.has_linear_interp = false;
1010 sh->in.barycentric_interpolation_mode = 0;
1011 }
1012
1013 /**
1014 * Set up shader outputs for fixed-function units.
1015 */
1016 static void
1017 vs_setup_shader_out(struct ilo_shader *sh, const struct toy_tgsi *tgsi,
1018 bool output_clipdist, int *output_map)
1019 {
1020 int psize_slot = -1, pos_slot = -1;
1021 int clipdist_slot[2] = { -1, -1 };
1022 int color_slot[4] = { -1, -1, -1, -1 };
1023 int num_outs, i;
1024
1025 /* find out the slots of outputs that need special care */
1026 for (i = 0; i < tgsi->num_outputs; i++) {
1027 switch (tgsi->outputs[i].semantic_name) {
1028 case TGSI_SEMANTIC_PSIZE:
1029 psize_slot = i;
1030 break;
1031 case TGSI_SEMANTIC_POSITION:
1032 pos_slot = i;
1033 break;
1034 case TGSI_SEMANTIC_CLIPDIST:
1035 if (tgsi->outputs[i].semantic_index)
1036 clipdist_slot[1] = i;
1037 else
1038 clipdist_slot[0] = i;
1039 break;
1040 case TGSI_SEMANTIC_COLOR:
1041 if (tgsi->outputs[i].semantic_index)
1042 color_slot[2] = i;
1043 else
1044 color_slot[0] = i;
1045 break;
1046 case TGSI_SEMANTIC_BCOLOR:
1047 if (tgsi->outputs[i].semantic_index)
1048 color_slot[3] = i;
1049 else
1050 color_slot[1] = i;
1051 break;
1052 default:
1053 break;
1054 }
1055 }
1056
1057 /* the first two VUEs are always PSIZE and POSITION */
1058 num_outs = 2;
1059 sh->out.semantic_names[0] = TGSI_SEMANTIC_PSIZE;
1060 sh->out.semantic_indices[0] = 0;
1061 sh->out.semantic_names[1] = TGSI_SEMANTIC_POSITION;
1062 sh->out.semantic_indices[1] = 0;
1063
1064 sh->out.has_pos = true;
1065 output_map[0] = psize_slot;
1066 output_map[1] = pos_slot;
1067
1068 /* followed by optional clip distances */
1069 if (output_clipdist) {
1070 sh->out.semantic_names[num_outs] = TGSI_SEMANTIC_CLIPDIST;
1071 sh->out.semantic_indices[num_outs] = 0;
1072 output_map[num_outs++] = clipdist_slot[0];
1073
1074 sh->out.semantic_names[num_outs] = TGSI_SEMANTIC_CLIPDIST;
1075 sh->out.semantic_indices[num_outs] = 1;
1076 output_map[num_outs++] = clipdist_slot[1];
1077 }
1078
1079 /*
1080 * make BCOLOR follow COLOR so that we can make use of
1081 * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING in 3DSTATE_SF
1082 */
1083 for (i = 0; i < 4; i++) {
1084 const int slot = color_slot[i];
1085
1086 if (slot < 0)
1087 continue;
1088
1089 sh->out.semantic_names[num_outs] = tgsi->outputs[slot].semantic_name;
1090 sh->out.semantic_indices[num_outs] = tgsi->outputs[slot].semantic_index;
1091
1092 output_map[num_outs++] = slot;
1093 }
1094
1095 /* add the rest of the outputs */
1096 for (i = 0; i < tgsi->num_outputs; i++) {
1097 switch (tgsi->outputs[i].semantic_name) {
1098 case TGSI_SEMANTIC_PSIZE:
1099 case TGSI_SEMANTIC_POSITION:
1100 case TGSI_SEMANTIC_CLIPDIST:
1101 case TGSI_SEMANTIC_COLOR:
1102 case TGSI_SEMANTIC_BCOLOR:
1103 break;
1104 default:
1105 sh->out.semantic_names[num_outs] = tgsi->outputs[i].semantic_name;
1106 sh->out.semantic_indices[num_outs] = tgsi->outputs[i].semantic_index;
1107 output_map[num_outs++] = i;
1108 break;
1109 }
1110 }
1111
1112 sh->out.count = num_outs;
1113 }
1114
1115 /**
1116 * Translate the TGSI tokens.
1117 */
1118 static bool
1119 vs_setup_tgsi(struct toy_compiler *tc, const struct tgsi_token *tokens,
1120 struct toy_tgsi *tgsi)
1121 {
1122 if (ilo_debug & ILO_DEBUG_VS) {
1123 ilo_printf("dumping vertex shader\n");
1124 ilo_printf("\n");
1125
1126 tgsi_dump(tokens, 0);
1127 ilo_printf("\n");
1128 }
1129
1130 toy_compiler_translate_tgsi(tc, tokens, true, tgsi);
1131 if (tc->fail) {
1132 ilo_err("failed to translate VS TGSI tokens: %s\n", tc->reason);
1133 return false;
1134 }
1135
1136 if (ilo_debug & ILO_DEBUG_VS) {
1137 ilo_printf("TGSI translator:\n");
1138 toy_tgsi_dump(tgsi);
1139 ilo_printf("\n");
1140 toy_compiler_dump(tc);
1141 ilo_printf("\n");
1142 }
1143
1144 return true;
1145 }
1146
1147 /**
1148 * Set up VS compile context. This includes translating the TGSI tokens.
1149 */
1150 static bool
1151 vs_setup(struct vs_compile_context *vcc,
1152 const struct ilo_shader_state *state,
1153 const struct ilo_shader_variant *variant)
1154 {
1155 int num_consts;
1156
1157 memset(vcc, 0, sizeof(*vcc));
1158
1159 vcc->shader = CALLOC_STRUCT(ilo_shader);
1160 if (!vcc->shader)
1161 return false;
1162
1163 vcc->variant = variant;
1164
1165 toy_compiler_init(&vcc->tc, state->info.dev);
1166 vcc->tc.templ.access_mode = BRW_ALIGN_16;
1167 vcc->tc.templ.exec_size = BRW_EXECUTE_8;
1168 vcc->tc.rect_linear_width = 4;
1169
1170 /*
1171 * The classic driver uses the sampler cache (gen6) or the data cache
1172 * (gen7). Why?
1173 */
1174 vcc->const_cache = GEN6_SFID_DATAPORT_CONSTANT_CACHE;
1175
1176 if (!vs_setup_tgsi(&vcc->tc, state->info.tokens, &vcc->tgsi)) {
1177 toy_compiler_cleanup(&vcc->tc);
1178 FREE(vcc->shader);
1179 return false;
1180 }
1181
1182 vs_setup_shader_in(vcc->shader, &vcc->tgsi);
1183 vs_setup_shader_out(vcc->shader, &vcc->tgsi,
1184 (vcc->variant->u.vs.num_ucps > 0), vcc->output_map);
1185
1186 /* fit each pair of user clip planes into a register */
1187 num_consts = (vcc->variant->u.vs.num_ucps + 1) / 2;
1188
1189 /* r0 is reserved for payload header */
1190 vcc->first_const_grf = 1;
1191 vcc->first_vue_grf = vcc->first_const_grf + num_consts;
1192 vcc->first_free_grf = vcc->first_vue_grf + vcc->shader->in.count;
1193 vcc->last_free_grf = 127;
1194
1195 /* m0 is reserved for system routines */
1196 vcc->first_free_mrf = 1;
1197 vcc->last_free_mrf = 15;
1198
1199 vcc->num_grf_per_vrf = 1;
1200
1201 if (vcc->tc.dev->gen >= ILO_GEN(7)) {
1202 vcc->last_free_grf -= 15;
1203 vcc->first_free_mrf = vcc->last_free_grf + 1;
1204 vcc->last_free_mrf = vcc->first_free_mrf + 14;
1205 }
1206
1207 vcc->shader->in.start_grf = vcc->first_const_grf;
1208 vcc->shader->pcb.clip_state_size =
1209 vcc->variant->u.vs.num_ucps * (sizeof(float) * 4);
1210
1211 return true;
1212 }
1213
1214 /**
1215 * Compile the vertex shader.
1216 */
1217 struct ilo_shader *
1218 ilo_shader_compile_vs(const struct ilo_shader_state *state,
1219 const struct ilo_shader_variant *variant)
1220 {
1221 struct vs_compile_context vcc;
1222 bool need_gs;
1223
1224 if (!vs_setup(&vcc, state, variant))
1225 return NULL;
1226
1227 if (vcc.tc.dev->gen >= ILO_GEN(7)) {
1228 need_gs = false;
1229 }
1230 else {
1231 need_gs = variant->u.vs.rasterizer_discard ||
1232 state->info.stream_output.num_outputs;
1233 }
1234
1235 vs_write_vue(&vcc);
1236
1237 if (!vs_compile(&vcc)) {
1238 FREE(vcc.shader);
1239 vcc.shader = NULL;
1240 }
1241
1242 toy_tgsi_cleanup(&vcc.tgsi);
1243 toy_compiler_cleanup(&vcc.tc);
1244
1245 if (need_gs) {
1246 int so_mapping[PIPE_MAX_SHADER_OUTPUTS];
1247 int i, j;
1248
1249 for (i = 0; i < vcc.tgsi.num_outputs; i++) {
1250 int attr = 0;
1251
1252 for (j = 0; j < vcc.shader->out.count; j++) {
1253 if (vcc.tgsi.outputs[i].semantic_name ==
1254 vcc.shader->out.semantic_names[j] &&
1255 vcc.tgsi.outputs[i].semantic_index ==
1256 vcc.shader->out.semantic_indices[j]) {
1257 attr = j;
1258 break;
1259 }
1260 }
1261
1262 so_mapping[i] = attr;
1263 }
1264
1265 if (!ilo_shader_compile_gs_passthrough(state, variant,
1266 so_mapping, vcc.shader)) {
1267 ilo_shader_destroy(vcc.shader);
1268 vcc.shader = NULL;
1269 }
1270 }
1271
1272 return vcc.shader;
1273 }