iris: bad inherited comments
[mesa.git] / src / gallium / drivers / iris / iris_batch.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sublicense, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include "iris_batch.h"
26 #include "iris_binder.h"
27 #include "iris_bufmgr.h"
28 #include "iris_context.h"
29
30 #include "drm-uapi/i915_drm.h"
31
32 #include "util/hash_table.h"
33 #include "util/set.h"
34 #include "main/macros.h"
35
36 #include <errno.h>
37 #include <xf86drm.h>
38
39 #define FILE_DEBUG_FLAG DEBUG_BUFMGR
40
41 #define BATCH_SZ (20 * 1024)
42
43 /* Terminating the batch takes either 4 bytes for MI_BATCH_BUFFER_END
44 * or 12 bytes for MI_BATCH_BUFFER_START (when chaining). Plus, we may
45 * need an extra 4 bytes to pad out to the nearest QWord. So reserve 16.
46 */
47 #define BATCH_RESERVED 16
48
49 static void decode_batch(struct iris_batch *batch);
50
51 static void
52 iris_batch_reset(struct iris_batch *batch);
53
54 UNUSED static void
55 dump_validation_list(struct iris_batch *batch)
56 {
57 fprintf(stderr, "Validation list (length %d):\n", batch->exec_count);
58
59 for (int i = 0; i < batch->exec_count; i++) {
60 uint64_t flags = batch->validation_list[i].flags;
61 assert(batch->validation_list[i].handle ==
62 batch->exec_bos[i]->gem_handle);
63 fprintf(stderr, "[%2d]: %2d %-14s %p %-7s @ 0x%016llx (%"PRIu64"B) - %d refs\n",
64 i,
65 batch->validation_list[i].handle,
66 batch->exec_bos[i]->name,
67 batch->exec_bos[i],
68 (flags & EXEC_OBJECT_WRITE) ? "(write)" : "",
69 batch->validation_list[i].offset,
70 batch->exec_bos[i]->size,
71 batch->exec_bos[i]->refcount);
72 }
73 }
74
75 static struct gen_batch_decode_bo
76 decode_get_bo(void *v_batch, uint64_t address)
77 {
78 struct iris_batch *batch = v_batch;
79
80 for (int i = 0; i < batch->exec_count; i++) {
81 struct iris_bo *bo = batch->exec_bos[i];
82 /* The decoder zeroes out the top 16 bits, so we need to as well */
83 uint64_t bo_address = bo->gtt_offset & (~0ull >> 16);
84
85 if (address >= bo_address && address < bo_address + bo->size) {
86 return (struct gen_batch_decode_bo) {
87 .addr = address,
88 .size = bo->size,
89 .map = iris_bo_map(batch->dbg, bo, MAP_READ) +
90 (address - bo_address),
91 };
92 }
93 }
94
95 return (struct gen_batch_decode_bo) { };
96 }
97
98 static bool
99 uint_key_compare(const void *a, const void *b)
100 {
101 return a == b;
102 }
103
104 static uint32_t
105 uint_key_hash(const void *key)
106 {
107 return (uintptr_t) key;
108 }
109
110 void
111 iris_init_batch(struct iris_batch *batch,
112 struct iris_screen *screen,
113 struct iris_vtable *vtbl,
114 struct pipe_debug_callback *dbg,
115 uint8_t ring)
116 {
117 batch->screen = screen;
118 batch->vtbl = vtbl;
119 batch->dbg = dbg;
120
121 /* ring should be one of I915_EXEC_RENDER, I915_EXEC_BLT, etc. */
122 assert((ring & ~I915_EXEC_RING_MASK) == 0);
123 assert(util_bitcount(ring) == 1);
124 batch->ring = ring;
125
126 batch->exec_count = 0;
127 batch->exec_array_size = 100;
128 batch->exec_bos =
129 malloc(batch->exec_array_size * sizeof(batch->exec_bos[0]));
130 batch->validation_list =
131 malloc(batch->exec_array_size * sizeof(batch->validation_list[0]));
132
133 batch->binder.bo = NULL;
134
135 batch->cache.render = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
136 _mesa_key_pointer_equal);
137 batch->cache.depth = _mesa_set_create(NULL, _mesa_hash_pointer,
138 _mesa_key_pointer_equal);
139 if (unlikely(INTEL_DEBUG)) {
140 batch->state_sizes =
141 _mesa_hash_table_create(NULL, uint_key_hash, uint_key_compare);
142
143 const unsigned decode_flags =
144 GEN_BATCH_DECODE_FULL |
145 ((INTEL_DEBUG & DEBUG_COLOR) ? GEN_BATCH_DECODE_IN_COLOR : 0) |
146 GEN_BATCH_DECODE_OFFSETS |
147 GEN_BATCH_DECODE_FLOATS;
148
149 gen_batch_decode_ctx_init(&batch->decoder, &screen->devinfo,
150 stderr, decode_flags, NULL,
151 decode_get_bo, NULL, batch);
152 batch->decoder.max_vbo_decoded_lines = 32;
153 }
154
155 iris_batch_reset(batch);
156 }
157
158 #define READ_ONCE(x) (*(volatile __typeof__(x) *)&(x))
159
160 static unsigned
161 add_exec_bo(struct iris_batch *batch, struct iris_bo *bo)
162 {
163 unsigned index = READ_ONCE(bo->index);
164
165 if (index < batch->exec_count && batch->exec_bos[index] == bo)
166 return index;
167
168 /* May have been shared between multiple active batches */
169 for (index = 0; index < batch->exec_count; index++) {
170 if (batch->exec_bos[index] == bo)
171 return index;
172 }
173
174 iris_bo_reference(bo);
175
176 if (batch->exec_count == batch->exec_array_size) {
177 batch->exec_array_size *= 2;
178 batch->exec_bos =
179 realloc(batch->exec_bos,
180 batch->exec_array_size * sizeof(batch->exec_bos[0]));
181 batch->validation_list =
182 realloc(batch->validation_list,
183 batch->exec_array_size * sizeof(batch->validation_list[0]));
184 }
185
186 batch->validation_list[batch->exec_count] =
187 (struct drm_i915_gem_exec_object2) {
188 .handle = bo->gem_handle,
189 .offset = bo->gtt_offset,
190 .flags = bo->kflags,
191 };
192
193 bo->index = batch->exec_count;
194 batch->exec_bos[batch->exec_count] = bo;
195 batch->aperture_space += bo->size;
196
197 return batch->exec_count++;
198 }
199
200 static void
201 create_batch(struct iris_batch *batch)
202 {
203 struct iris_screen *screen = batch->screen;
204 struct iris_bufmgr *bufmgr = screen->bufmgr;
205
206 batch->bo = iris_bo_alloc(bufmgr, "command buffer",
207 BATCH_SZ + BATCH_RESERVED, IRIS_MEMZONE_OTHER);
208 batch->bo->kflags |= EXEC_OBJECT_CAPTURE;
209 batch->map = iris_bo_map(NULL, batch->bo, MAP_READ | MAP_WRITE);
210 batch->map_next = batch->map;
211 batch->contains_draw = false;
212
213 add_exec_bo(batch, batch->bo);
214 }
215
216 static void
217 iris_batch_reset(struct iris_batch *batch)
218 {
219 if (batch->last_bo != NULL) {
220 iris_bo_unreference(batch->last_bo);
221 batch->last_bo = NULL;
222 }
223 batch->last_bo = batch->bo;
224 batch->primary_batch_size = 0;
225
226 create_batch(batch);
227 assert(batch->bo->index == 0);
228
229 iris_destroy_binder(&batch->binder);
230 iris_init_binder(&batch->binder, batch->bo->bufmgr);
231
232 if (batch->state_sizes)
233 _mesa_hash_table_clear(batch->state_sizes, NULL);
234
235 iris_cache_sets_clear(batch);
236 }
237
238 void
239 iris_batch_free(struct iris_batch *batch)
240 {
241 for (int i = 0; i < batch->exec_count; i++) {
242 iris_bo_unreference(batch->exec_bos[i]);
243 }
244 free(batch->exec_bos);
245 free(batch->validation_list);
246 iris_bo_unreference(batch->bo);
247 batch->bo = NULL;
248 batch->map = NULL;
249 batch->map_next = NULL;
250
251 iris_bo_unreference(batch->last_bo);
252
253 _mesa_hash_table_destroy(batch->cache.render, NULL);
254 _mesa_set_destroy(batch->cache.depth, NULL);
255
256 iris_destroy_binder(&batch->binder);
257
258 if (batch->state_sizes) {
259 _mesa_hash_table_destroy(batch->state_sizes, NULL);
260 gen_batch_decode_ctx_finish(&batch->decoder);
261 }
262 }
263
264 static unsigned
265 batch_bytes_used(struct iris_batch *batch)
266 {
267 return batch->map_next - batch->map;
268 }
269
270 /**
271 * If we've chained to a secondary batch, or are getting near to the end,
272 * then flush. This should only be called between draws.
273 */
274 void
275 iris_batch_maybe_flush(struct iris_batch *batch, unsigned estimate)
276 {
277 if (batch->bo != batch->exec_bos[0] ||
278 batch_bytes_used(batch) + estimate >= BATCH_SZ) {
279 iris_batch_flush(batch);
280 }
281 }
282
283 void
284 iris_require_command_space(struct iris_batch *batch, unsigned size)
285 {
286 const unsigned required_bytes = batch_bytes_used(batch) + size;
287
288 if (required_bytes >= BATCH_SZ) {
289 /* We only support chaining a single time. */
290 assert(batch->bo == batch->exec_bos[0]);
291
292 uint32_t *cmd = batch->map_next;
293 uint64_t *addr = batch->map_next + 4;
294 uint32_t *noop = batch->map_next + 12;
295 batch->map_next += 12;
296
297 /* No longer held by batch->bo, still held by validation list */
298 iris_bo_unreference(batch->bo);
299 batch->primary_batch_size = ALIGN(batch_bytes_used(batch), 8);
300 create_batch(batch);
301
302 /* Emit MI_BATCH_BUFFER_START to chain to another batch. */
303 *cmd = (0x31 << 23) | (1 << 8) | (3 - 2);
304 *addr = batch->bo->gtt_offset;
305 *noop = 0;
306 }
307 }
308
309 void *
310 iris_get_command_space(struct iris_batch *batch, unsigned bytes)
311 {
312 iris_require_command_space(batch, bytes);
313 void *map = batch->map_next;
314 batch->map_next += bytes;
315 return map;
316 }
317
318 void
319 iris_batch_emit(struct iris_batch *batch, const void *data, unsigned size)
320 {
321 void *map = iris_get_command_space(batch, size);
322 memcpy(map, data, size);
323 }
324
325 /**
326 * Terminate a batch with MI_BATCH_BUFFER_END.
327 */
328 static void
329 iris_finish_batch(struct iris_batch *batch)
330 {
331 if (batch->bo == batch->exec_bos[0])
332 batch->primary_batch_size = batch_bytes_used(batch);
333
334 // XXX: ISP DIS
335
336 /* Emit MI_BATCH_BUFFER_END to finish our batch. Note that execbuf2
337 * requires our batch size to be QWord aligned, so we pad it out if
338 * necessary by emitting an extra MI_NOOP after the end.
339 */
340 const bool qword_aligned = (batch_bytes_used(batch) % 8) == 0;
341 uint32_t *map = batch->map_next;
342
343 map[0] = (0xA << 23);
344 map[1] = 0;
345
346 batch->map_next += qword_aligned ? 8 : 4;
347 }
348
349 static int
350 submit_batch(struct iris_batch *batch, int in_fence_fd, int *out_fence_fd)
351 {
352 iris_bo_unmap(batch->bo);
353
354 /* The requirement for using I915_EXEC_NO_RELOC are:
355 *
356 * The addresses written in the objects must match the corresponding
357 * reloc.gtt_offset which in turn must match the corresponding
358 * execobject.offset.
359 *
360 * Any render targets written to in the batch must be flagged with
361 * EXEC_OBJECT_WRITE.
362 *
363 * To avoid stalling, execobject.offset should match the current
364 * address of that object within the active context.
365 */
366 struct drm_i915_gem_execbuffer2 execbuf = {
367 .buffers_ptr = (uintptr_t) batch->validation_list,
368 .buffer_count = batch->exec_count,
369 .batch_start_offset = 0,
370 .batch_len = batch->primary_batch_size,
371 .flags = batch->ring |
372 I915_EXEC_NO_RELOC |
373 I915_EXEC_BATCH_FIRST |
374 I915_EXEC_HANDLE_LUT,
375 .rsvd1 = batch->hw_ctx_id, /* rsvd1 is actually the context ID */
376 };
377
378 unsigned long cmd = DRM_IOCTL_I915_GEM_EXECBUFFER2;
379
380 if (in_fence_fd != -1) {
381 execbuf.rsvd2 = in_fence_fd;
382 execbuf.flags |= I915_EXEC_FENCE_IN;
383 }
384
385 if (out_fence_fd != NULL) {
386 cmd = DRM_IOCTL_I915_GEM_EXECBUFFER2_WR;
387 *out_fence_fd = -1;
388 execbuf.flags |= I915_EXEC_FENCE_OUT;
389 }
390
391 int ret = drm_ioctl(batch->screen->fd, cmd, &execbuf);
392 if (ret != 0) {
393 ret = -errno;
394 DBG("execbuf FAILED: errno = %d\n", -ret);
395 } else {
396 DBG("execbuf succeeded\n");
397 }
398
399 for (int i = 0; i < batch->exec_count; i++) {
400 struct iris_bo *bo = batch->exec_bos[i];
401
402 bo->idle = false;
403 bo->index = -1;
404 }
405
406 if (ret == 0 && out_fence_fd != NULL)
407 *out_fence_fd = execbuf.rsvd2 >> 32;
408
409 return ret;
410 }
411
412 /**
413 * The in_fence_fd is ignored if -1. Otherwise this function takes ownership
414 * of the fd.
415 *
416 * The out_fence_fd is ignored if NULL. Otherwise, the caller takes ownership
417 * of the returned fd.
418 */
419 int
420 _iris_batch_flush_fence(struct iris_batch *batch,
421 int in_fence_fd, int *out_fence_fd,
422 const char *file, int line)
423 {
424 if (batch_bytes_used(batch) == 0)
425 return 0;
426
427 iris_finish_batch(batch);
428
429 if (unlikely(INTEL_DEBUG & (DEBUG_BATCH | DEBUG_SUBMIT))) {
430 int bytes_for_commands = batch_bytes_used(batch);
431 int bytes_for_binder = batch->binder.insert_point;
432 int second_bytes = 0;
433 if (batch->bo != batch->exec_bos[0]) {
434 second_bytes = bytes_for_commands;
435 bytes_for_commands += batch->primary_batch_size;
436 }
437 fprintf(stderr, "%19s:%-3d: Batchbuffer flush with %5d+%5db (%0.1f%%) "
438 "(cmds), %5db (%0.1f%%) (binder), %4d BOs (%0.1fMb aperture)\n",
439 file, line,
440 batch->primary_batch_size, second_bytes,
441 100.0f * bytes_for_commands / BATCH_SZ,
442 bytes_for_binder, 100.0f * bytes_for_binder / IRIS_BINDER_SIZE,
443 batch->exec_count,
444 (float) batch->aperture_space / (1024 * 1024));
445 dump_validation_list(batch);
446 }
447
448 if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) {
449 decode_batch(batch);
450 }
451
452 int ret = submit_batch(batch, in_fence_fd, out_fence_fd);
453
454 //throttle(iris);
455
456 if (ret >= 0) {
457 //if (iris->ctx.Const.ResetStrategy == GL_LOSE_CONTEXT_ON_RESET_ARB)
458 //iris_check_for_reset(ice);
459
460 if (unlikely(INTEL_DEBUG & DEBUG_SYNC)) {
461 dbg_printf("waiting for idle\n");
462 iris_bo_wait_rendering(batch->bo);
463 }
464 } else {
465 #ifdef DEBUG
466 fprintf(stderr, "iris: Failed to submit batchbuffer: %s\n",
467 strerror(-ret));
468 abort();
469 #endif
470 }
471
472 /* Clean up after the batch we submitted and prepare for a new one. */
473 for (int i = 0; i < batch->exec_count; i++) {
474 iris_bo_unreference(batch->exec_bos[i]);
475 batch->exec_bos[i] = NULL;
476 }
477 batch->exec_count = 0;
478 batch->aperture_space = 0;
479
480 /* Start a new batch buffer. */
481 iris_batch_reset(batch);
482
483 return 0;
484 }
485
486 bool
487 iris_batch_references(struct iris_batch *batch, struct iris_bo *bo)
488 {
489 unsigned index = READ_ONCE(bo->index);
490 if (index < batch->exec_count && batch->exec_bos[index] == bo)
491 return true;
492
493 for (int i = 0; i < batch->exec_count; i++) {
494 if (batch->exec_bos[i] == bo)
495 return true;
496 }
497 return false;
498 }
499
500 /* This is the only way buffers get added to the validate list.
501 */
502 void
503 iris_use_pinned_bo(struct iris_batch *batch,
504 struct iris_bo *bo,
505 bool writable)
506 {
507 assert(bo->kflags & EXEC_OBJECT_PINNED);
508 unsigned index = add_exec_bo(batch, bo);
509 if (writable)
510 batch->validation_list[index].flags |= EXEC_OBJECT_WRITE;
511 }
512
513 static void
514 decode_batch(struct iris_batch *batch)
515 {
516 //if (batch->bo != batch->exec_bos[0]) {
517 void *map = iris_bo_map(batch->dbg, batch->exec_bos[0], MAP_READ);
518 gen_print_batch(&batch->decoder, map, batch->primary_batch_size,
519 batch->exec_bos[0]->gtt_offset);
520
521 //fprintf(stderr, "Secondary batch...\n");
522 //}
523
524 //gen_print_batch(&batch->decoder, batch->map, batch_bytes_used(batch),
525 //batch->bo->gtt_offset);
526 }