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24 #ifndef IRIS_BATCH_DOT_H
25 #define IRIS_BATCH_DOT_H
31 #include "util/u_dynarray.h"
33 #include "drm-uapi/i915_drm.h"
34 #include "common/gen_decoder.h"
36 #include "iris_fence.h"
38 /* The kernel assumes batchbuffers are smaller than 256kB. */
39 #define MAX_BATCH_SIZE (256 * 1024)
41 /* Our target batch size - flush approximately at this point. */
42 #define BATCH_SZ (20 * 1024)
44 enum iris_batch_name
{
49 #define IRIS_BATCH_COUNT 2
58 struct iris_screen
*screen
;
59 struct iris_vtable
*vtbl
;
60 struct pipe_debug_callback
*dbg
;
61 struct pipe_device_reset_callback
*reset
;
63 /** What batch is this? (e.g. IRIS_BATCH_RENDER/COMPUTE) */
64 enum iris_batch_name name
;
66 /** Current batchbuffer being queued up. */
70 /** Size of the primary batch if we've moved on to a secondary. */
71 unsigned primary_batch_size
;
73 /** Last Surface State Base Address set in this hardware context. */
74 uint64_t last_surface_base_address
;
78 /** Which engine this batch targets - a I915_EXEC_RING_MASK value */
81 /** The validation list */
82 struct drm_i915_gem_exec_object2
*validation_list
;
83 struct iris_bo
**exec_bos
;
88 * A list of iris_syncpts associated with this batch.
90 * The first list entry will always be a signalling sync-point, indicating
91 * that this batch has completed. The others are likely to be sync-points
92 * to wait on before executing the batch.
94 struct util_dynarray syncpts
;
96 /** A list of drm_i915_exec_fences to have execbuf signal or wait on */
97 struct util_dynarray exec_fences
;
99 /** The amount of aperture space (in bytes) used by all exec_bos */
102 /** A sync-point for the last batch that was submitted. */
103 struct iris_syncpt
*last_syncpt
;
105 /** List of other batches which we might need to flush to use a BO */
106 struct iris_batch
*other_batches
[IRIS_BATCH_COUNT
- 1];
110 * Set of struct brw_bo * that have been rendered to within this
111 * batchbuffer and would need flushing before being used from another
112 * cache domain that isn't coherent with it (i.e. the sampler).
114 struct hash_table
*render
;
117 * Set of struct brw_bo * that have been used as a depth buffer within
118 * this batchbuffer and would need flushing before being used from
119 * another cache domain that isn't coherent with it (i.e. the sampler).
124 struct gen_batch_decode_ctx decoder
;
125 struct hash_table_u64
*state_sizes
;
127 /** Have we emitted any draw calls to this batch? */
131 void iris_init_batch(struct iris_batch
*batch
,
132 struct iris_screen
*screen
,
133 struct iris_vtable
*vtbl
,
134 struct pipe_debug_callback
*dbg
,
135 struct pipe_device_reset_callback
*reset
,
136 struct hash_table_u64
*state_sizes
,
137 struct iris_batch
*all_batches
,
138 enum iris_batch_name name
,
141 void iris_chain_to_new_batch(struct iris_batch
*batch
);
142 void iris_batch_free(struct iris_batch
*batch
);
143 void iris_batch_maybe_flush(struct iris_batch
*batch
, unsigned estimate
);
145 void _iris_batch_flush(struct iris_batch
*batch
, const char *file
, int line
);
146 #define iris_batch_flush(batch) _iris_batch_flush((batch), __FILE__, __LINE__)
148 bool iris_batch_references(struct iris_batch
*batch
, struct iris_bo
*bo
);
150 #define RELOC_WRITE EXEC_OBJECT_WRITE
152 void iris_use_pinned_bo(struct iris_batch
*batch
, struct iris_bo
*bo
,
155 enum pipe_reset_status
iris_batch_check_for_reset(struct iris_batch
*batch
);
157 static inline unsigned
158 iris_batch_bytes_used(struct iris_batch
*batch
)
160 return batch
->map_next
- batch
->map
;
164 * Ensure the current command buffer has \param size bytes of space
165 * remaining. If not, this creates a secondary batch buffer and emits
166 * a jump from the primary batch to the start of the secondary.
168 * Most callers want iris_get_command_space() instead.
171 iris_require_command_space(struct iris_batch
*batch
, unsigned size
)
173 const unsigned required_bytes
= iris_batch_bytes_used(batch
) + size
;
175 if (required_bytes
>= BATCH_SZ
) {
176 iris_chain_to_new_batch(batch
);
181 * Allocate space in the current command buffer, and return a pointer
182 * to the mapped area so the caller can write commands there.
184 * This should be called whenever emitting commands.
187 iris_get_command_space(struct iris_batch
*batch
, unsigned bytes
)
189 iris_require_command_space(batch
, bytes
);
190 void *map
= batch
->map_next
;
191 batch
->map_next
+= bytes
;
196 * Helper to emit GPU commands - allocates space, copies them there.
199 iris_batch_emit(struct iris_batch
*batch
, const void *data
, unsigned size
)
201 void *map
= iris_get_command_space(batch
, size
);
202 memcpy(map
, data
, size
);
206 * Get a pointer to the batch's signalling syncpt. Does not refcount.
208 static inline struct iris_syncpt
*
209 iris_batch_get_signal_syncpt(struct iris_batch
*batch
)
211 /* The signalling syncpt is the first one in the list. */
212 struct iris_syncpt
*syncpt
=
213 ((struct iris_syncpt
**) util_dynarray_begin(&batch
->syncpts
))[0];
219 * Take a reference to the batch's signalling syncpt.
221 * Callers can use this to wait for the the current batch under construction
222 * to complete (after flushing it).
225 iris_batch_reference_signal_syncpt(struct iris_batch
*batch
,
226 struct iris_syncpt
**out_syncpt
)
228 struct iris_syncpt
*syncpt
= iris_batch_get_signal_syncpt(batch
);
229 iris_syncpt_reference(batch
->screen
, out_syncpt
, syncpt
);
233 * Record the size of a piece of state for use in INTEL_DEBUG=bat printing.
236 iris_record_state_size(struct hash_table_u64
*ht
,
237 uint32_t offset_from_base
,
241 _mesa_hash_table_u64_insert(ht
, offset_from_base
,
242 (void *)(uintptr_t) size
);