iris: set EXEC_OBJECT_WRITE
[mesa.git] / src / gallium / drivers / iris / iris_batch.h
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef IRIS_BATCH_DOT_H
25 #define IRIS_BATCH_DOT_H
26
27 #include <stdint.h>
28 #include <stdbool.h>
29
30 /* The kernel assumes batchbuffers are smaller than 256kB. */
31 #define MAX_BATCH_SIZE (256 * 1024)
32
33 /* 3DSTATE_BINDING_TABLE_POINTERS has a U16 offset from Surface State Base
34 * Address, which means that we can't put binding tables beyond 64kB. This
35 * effectively limits the maximum statebuffer size to 64kB.
36 */
37 #define MAX_STATE_SIZE (64 * 1024)
38
39 struct iris_address {
40 struct iris_bo *bo;
41 uint64_t offset;
42 bool write;
43 };
44
45 struct iris_batch_buffer {
46 struct iris_bo *bo;
47 void *map;
48 void *map_next;
49
50 struct iris_bo *partial_bo;
51 unsigned partial_bytes;
52 };
53
54 struct iris_batch {
55 struct iris_screen *screen;
56 struct pipe_debug_callback *dbg;
57
58 /** Current batchbuffer being queued up. */
59 struct iris_batch_buffer cmdbuf;
60
61 /** Last BO submitted to the hardware. Used for glFinish(). */
62 struct iris_bo *last_cmd_bo;
63
64 uint32_t hw_ctx_id;
65
66 /** Which ring this batch targets - a I915_EXEC_RING_MASK value */
67 uint8_t ring;
68
69 bool no_wrap;
70
71 /** The validation list */
72 struct drm_i915_gem_exec_object2 *validation_list;
73 struct iris_bo **exec_bos;
74 int exec_count;
75 int exec_array_size;
76
77 /** The amount of aperture space (in bytes) used by all exec_bos */
78 int aperture_space;
79
80 /** Map from batch offset to iris_alloc_state data (with DEBUG_BATCH) */
81 struct hash_table *state_sizes;
82
83 void (*emit_state_base_address)(struct iris_batch *batch);
84 };
85
86 void iris_init_batch(struct iris_batch *batch,
87 struct iris_screen *screen,
88 struct pipe_debug_callback *dbg,
89 uint8_t ring);
90 void iris_batch_free(struct iris_batch *batch);
91 void iris_require_command_space(struct iris_batch *batch, unsigned size);
92 void iris_batch_emit(struct iris_batch *batch, const void *data, unsigned size);
93
94 int _iris_batch_flush_fence(struct iris_batch *batch,
95 int in_fence_fd, int *out_fence_fd,
96 const char *file, int line);
97
98
99 #define iris_batch_flush_fence(batch, in_fence_fd, out_fence_fd) \
100 _iris_batch_flush_fence((batch), (in_fence_fd), (out_fence_fd), \
101 __FILE__, __LINE__)
102
103 #define iris_batch_flush(batch) iris_batch_flush_fence((batch), -1, NULL)
104
105 bool iris_batch_references(struct iris_batch *batch, struct iris_bo *bo);
106
107 #define RELOC_WRITE EXEC_OBJECT_WRITE
108
109 void iris_use_pinned_bo(struct iris_batch *batch, struct iris_bo *bo,
110 bool writable);
111
112 #endif