src/gallium/drivers/iris/iris_batch.h

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef IRIS_BATCH_DOT_H
  25 #define IRIS_BATCH_DOT_H
  26
  27 #include <stdint.h>
  28 #include <stdbool.h>
  29 #include "i915_drm.h"
  30 #include "common/gen_decoder.h"
  31 #include "iris_binder.h"
  32
  33 /* The kernel assumes batchbuffers are smaller than 256kB. */
  34 #define MAX_BATCH_SIZE (256 * 1024)
  35
  36 struct iris_address {
  37    struct iris_bo *bo;
  38    uint64_t offset;
  39    bool write;
  40 };
  41
  42 struct iris_batch {
  43    struct iris_screen *screen;
  44    struct iris_vtable *vtbl;
  45    struct pipe_debug_callback *dbg;
  46
  47    /** Current batchbuffer being queued up. */
  48    struct iris_bo *bo;
  49    void *map;
  50    void *map_next;
  51    /** Size of the primary batch if we've moved on to a secondary. */
  52    unsigned primary_batch_size;
  53
  54    /** Last BO submitted to the hardware.  Used for glFinish(). */
  55    struct iris_bo *last_bo;
  56
  57    uint32_t hw_ctx_id;
  58
  59    /** Which ring this batch targets - a I915_EXEC_RING_MASK value */
  60    uint8_t ring;
  61
  62    /** The validation list */
  63    struct drm_i915_gem_exec_object2 *validation_list;
  64    struct iris_bo **exec_bos;
  65    int exec_count;
  66    int exec_array_size;
  67
  68    /** The amount of aperture space (in bytes) used by all exec_bos */
  69    int aperture_space;
  70
  71    /** Binder (containing binding tables) */
  72    struct iris_binder binder;
  73
  74    struct {
  75       /**
  76        * Set of struct brw_bo * that have been rendered to within this
  77        * batchbuffer and would need flushing before being used from another
  78        * cache domain that isn't coherent with it (i.e. the sampler).
  79        */
  80       struct hash_table *render;
  81
  82       /**
  83        * Set of struct brw_bo * that have been used as a depth buffer within
  84        * this batchbuffer and would need flushing before being used from
  85        * another cache domain that isn't coherent with it (i.e. the sampler).
  86        */
  87       struct set *depth;
  88    } cache;
  89
  90    /** Map from batch offset to iris_alloc_state data (with DEBUG_BATCH) */
  91    // XXX: unused
  92    struct hash_table *state_sizes;
  93    struct gen_batch_decode_ctx decoder;
  94
  95    /** Have we emitted any draw calls to this batch? */
  96    bool contains_draw;
  97 };
  98
  99 void iris_init_batch(struct iris_batch *batch,
 100                      struct iris_screen *screen,
 101                      struct iris_vtable *vtbl,
 102                      struct pipe_debug_callback *dbg,
 103                      uint8_t ring);
 104 void iris_batch_free(struct iris_batch *batch);
 105 void iris_batch_maybe_flush(struct iris_batch *batch, unsigned estimate);
 106 void iris_require_command_space(struct iris_batch *batch, unsigned size);
 107 void *iris_get_command_space(struct iris_batch *batch, unsigned bytes);
 108 void iris_batch_emit(struct iris_batch *batch, const void *data, unsigned size);
 109
 110 int _iris_batch_flush_fence(struct iris_batch *batch,
 111                             int in_fence_fd, int *out_fence_fd,
 112                             const char *file, int line);
 113
 114
 115 #define iris_batch_flush_fence(batch, in_fence_fd, out_fence_fd) \
 116    _iris_batch_flush_fence((batch), (in_fence_fd), (out_fence_fd), \
 117                            __FILE__, __LINE__)
 118
 119 #define iris_batch_flush(batch) iris_batch_flush_fence((batch), -1, NULL)
 120
 121 bool iris_batch_references(struct iris_batch *batch, struct iris_bo *bo);
 122
 123 #define RELOC_WRITE EXEC_OBJECT_WRITE
 124
 125 void iris_use_pinned_bo(struct iris_batch *batch, struct iris_bo *bo,
 126                         bool writable);
 127
 128 #endif