src/gallium/drivers/iris/iris_batch.h

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef IRIS_BATCH_DOT_H
  25 #define IRIS_BATCH_DOT_H
  26
  27 #include <stdint.h>
  28 #include <stdbool.h>
  29 #include "i915_drm.h"
  30 #include "common/gen_decoder.h"
  31
  32 /* The kernel assumes batchbuffers are smaller than 256kB. */
  33 #define MAX_BATCH_SIZE (256 * 1024)
  34
  35 struct iris_address {
  36    struct iris_bo *bo;
  37    uint64_t offset;
  38    bool write;
  39 };
  40
  41 struct iris_batch {
  42    struct iris_screen *screen;
  43    struct iris_vtable *vtbl;
  44    struct pipe_debug_callback *dbg;
  45
  46    /** Current batchbuffer being queued up. */
  47    struct iris_bo *bo;
  48    void *map;
  49    void *map_next;
  50    /** Size of the primary batch if we've moved on to a secondary. */
  51    unsigned primary_batch_size;
  52
  53
  54    /** Last BO submitted to the hardware.  Used for glFinish(). */
  55    struct iris_bo *last_bo;
  56
  57    uint32_t hw_ctx_id;
  58
  59    /** Which ring this batch targets - a I915_EXEC_RING_MASK value */
  60    uint8_t ring;
  61
  62    /** The validation list */
  63    struct drm_i915_gem_exec_object2 *validation_list;
  64    struct iris_bo **exec_bos;
  65    int exec_count;
  66    int exec_array_size;
  67
  68    /** The amount of aperture space (in bytes) used by all exec_bos */
  69    int aperture_space;
  70
  71    struct {
  72       /**
  73        * Set of struct brw_bo * that have been rendered to within this
  74        * batchbuffer and would need flushing before being used from another
  75        * cache domain that isn't coherent with it (i.e. the sampler).
  76        */
  77       struct hash_table *render;
  78
  79       /**
  80        * Set of struct brw_bo * that have been used as a depth buffer within
  81        * this batchbuffer and would need flushing before being used from
  82        * another cache domain that isn't coherent with it (i.e. the sampler).
  83        */
  84       struct set *depth;
  85    } cache;
  86
  87 #if DEBUG
  88    /** Map from batch offset to iris_alloc_state data (with DEBUG_BATCH) */
  89    // XXX: unused
  90    struct hash_table *state_sizes;
  91    struct gen_batch_decode_ctx decoder;
  92 #endif
  93 };
  94
  95 void iris_init_batch(struct iris_batch *batch,
  96                      struct iris_screen *screen,
  97                      struct iris_vtable *vtbl,
  98                      struct pipe_debug_callback *dbg,
  99                      uint8_t ring);
 100 void iris_batch_free(struct iris_batch *batch);
 101 void iris_batch_maybe_flush(struct iris_batch *batch, unsigned estimate);
 102 void iris_require_command_space(struct iris_batch *batch, unsigned size);
 103 void *iris_get_command_space(struct iris_batch *batch, unsigned bytes);
 104 void iris_batch_emit(struct iris_batch *batch, const void *data, unsigned size);
 105
 106 int _iris_batch_flush_fence(struct iris_batch *batch,
 107                             int in_fence_fd, int *out_fence_fd,
 108                             const char *file, int line);
 109
 110
 111 #define iris_batch_flush_fence(batch, in_fence_fd, out_fence_fd) \
 112    _iris_batch_flush_fence((batch), (in_fence_fd), (out_fence_fd), \
 113                            __FILE__, __LINE__)
 114
 115 #define iris_batch_flush(batch) iris_batch_flush_fence((batch), -1, NULL)
 116
 117 bool iris_batch_references(struct iris_batch *batch, struct iris_bo *bo);
 118
 119 #define RELOC_WRITE EXEC_OBJECT_WRITE
 120
 121 void iris_use_pinned_bo(struct iris_batch *batch, struct iris_bo *bo,
 122                         bool writable);
 123
 124 #endif