iris: Drop 'engine' from iris_batch.
[mesa.git] / src / gallium / drivers / iris / iris_batch.h
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef IRIS_BATCH_DOT_H
25 #define IRIS_BATCH_DOT_H
26
27 #include <stdint.h>
28 #include <stdbool.h>
29 #include <string.h>
30
31 #include "util/u_dynarray.h"
32
33 #include "drm-uapi/i915_drm.h"
34 #include "common/gen_decoder.h"
35
36 #include "iris_fence.h"
37
38 /* The kernel assumes batchbuffers are smaller than 256kB. */
39 #define MAX_BATCH_SIZE (256 * 1024)
40
41 /* Our target batch size - flush approximately at this point. */
42 #define BATCH_SZ (64 * 1024)
43
44 enum iris_batch_name {
45 IRIS_BATCH_RENDER,
46 IRIS_BATCH_COMPUTE,
47 };
48
49 #define IRIS_BATCH_COUNT 2
50
51 struct iris_address {
52 struct iris_bo *bo;
53 uint64_t offset;
54 bool write;
55 };
56
57 struct iris_batch {
58 struct iris_screen *screen;
59 struct iris_vtable *vtbl;
60 struct pipe_debug_callback *dbg;
61 struct pipe_device_reset_callback *reset;
62
63 /** What batch is this? (e.g. IRIS_BATCH_RENDER/COMPUTE) */
64 enum iris_batch_name name;
65
66 /** Current batchbuffer being queued up. */
67 struct iris_bo *bo;
68 void *map;
69 void *map_next;
70 /** Size of the primary batch if we've moved on to a secondary. */
71 unsigned primary_batch_size;
72
73 /** Last Surface State Base Address set in this hardware context. */
74 uint64_t last_surface_base_address;
75
76 uint32_t hw_ctx_id;
77
78 /** The validation list */
79 struct drm_i915_gem_exec_object2 *validation_list;
80 struct iris_bo **exec_bos;
81 int exec_count;
82 int exec_array_size;
83
84 /**
85 * A list of iris_syncpts associated with this batch.
86 *
87 * The first list entry will always be a signalling sync-point, indicating
88 * that this batch has completed. The others are likely to be sync-points
89 * to wait on before executing the batch.
90 */
91 struct util_dynarray syncpts;
92
93 /** A list of drm_i915_exec_fences to have execbuf signal or wait on */
94 struct util_dynarray exec_fences;
95
96 /** The amount of aperture space (in bytes) used by all exec_bos */
97 int aperture_space;
98
99 /** A sync-point for the last batch that was submitted. */
100 struct iris_syncpt *last_syncpt;
101
102 /** List of other batches which we might need to flush to use a BO */
103 struct iris_batch *other_batches[IRIS_BATCH_COUNT - 1];
104
105 struct {
106 /**
107 * Set of struct brw_bo * that have been rendered to within this
108 * batchbuffer and would need flushing before being used from another
109 * cache domain that isn't coherent with it (i.e. the sampler).
110 */
111 struct hash_table *render;
112
113 /**
114 * Set of struct brw_bo * that have been used as a depth buffer within
115 * this batchbuffer and would need flushing before being used from
116 * another cache domain that isn't coherent with it (i.e. the sampler).
117 */
118 struct set *depth;
119 } cache;
120
121 struct gen_batch_decode_ctx decoder;
122 struct hash_table_u64 *state_sizes;
123
124 /** Have we emitted any draw calls to this batch? */
125 bool contains_draw;
126
127 uint32_t last_aux_map_state;
128 };
129
130 void iris_init_batch(struct iris_batch *batch,
131 struct iris_screen *screen,
132 struct iris_vtable *vtbl,
133 struct pipe_debug_callback *dbg,
134 struct pipe_device_reset_callback *reset,
135 struct hash_table_u64 *state_sizes,
136 struct iris_batch *all_batches,
137 enum iris_batch_name name,
138 int priority);
139 void iris_chain_to_new_batch(struct iris_batch *batch);
140 void iris_batch_free(struct iris_batch *batch);
141 void iris_batch_maybe_flush(struct iris_batch *batch, unsigned estimate);
142
143 void _iris_batch_flush(struct iris_batch *batch, const char *file, int line);
144 #define iris_batch_flush(batch) _iris_batch_flush((batch), __FILE__, __LINE__)
145
146 bool iris_batch_references(struct iris_batch *batch, struct iris_bo *bo);
147
148 #define RELOC_WRITE EXEC_OBJECT_WRITE
149
150 void iris_use_pinned_bo(struct iris_batch *batch, struct iris_bo *bo,
151 bool writable);
152
153 enum pipe_reset_status iris_batch_check_for_reset(struct iris_batch *batch);
154
155 static inline unsigned
156 iris_batch_bytes_used(struct iris_batch *batch)
157 {
158 return batch->map_next - batch->map;
159 }
160
161 /**
162 * Ensure the current command buffer has \param size bytes of space
163 * remaining. If not, this creates a secondary batch buffer and emits
164 * a jump from the primary batch to the start of the secondary.
165 *
166 * Most callers want iris_get_command_space() instead.
167 */
168 static inline void
169 iris_require_command_space(struct iris_batch *batch, unsigned size)
170 {
171 const unsigned required_bytes = iris_batch_bytes_used(batch) + size;
172
173 if (required_bytes >= BATCH_SZ) {
174 iris_chain_to_new_batch(batch);
175 }
176 }
177
178 /**
179 * Allocate space in the current command buffer, and return a pointer
180 * to the mapped area so the caller can write commands there.
181 *
182 * This should be called whenever emitting commands.
183 */
184 static inline void *
185 iris_get_command_space(struct iris_batch *batch, unsigned bytes)
186 {
187 iris_require_command_space(batch, bytes);
188 void *map = batch->map_next;
189 batch->map_next += bytes;
190 return map;
191 }
192
193 /**
194 * Helper to emit GPU commands - allocates space, copies them there.
195 */
196 static inline void
197 iris_batch_emit(struct iris_batch *batch, const void *data, unsigned size)
198 {
199 void *map = iris_get_command_space(batch, size);
200 memcpy(map, data, size);
201 }
202
203 /**
204 * Get a pointer to the batch's signalling syncpt. Does not refcount.
205 */
206 static inline struct iris_syncpt *
207 iris_batch_get_signal_syncpt(struct iris_batch *batch)
208 {
209 /* The signalling syncpt is the first one in the list. */
210 struct iris_syncpt *syncpt =
211 ((struct iris_syncpt **) util_dynarray_begin(&batch->syncpts))[0];
212 return syncpt;
213 }
214
215
216 /**
217 * Take a reference to the batch's signalling syncpt.
218 *
219 * Callers can use this to wait for the the current batch under construction
220 * to complete (after flushing it).
221 */
222 static inline void
223 iris_batch_reference_signal_syncpt(struct iris_batch *batch,
224 struct iris_syncpt **out_syncpt)
225 {
226 struct iris_syncpt *syncpt = iris_batch_get_signal_syncpt(batch);
227 iris_syncpt_reference(batch->screen, out_syncpt, syncpt);
228 }
229
230 /**
231 * Record the size of a piece of state for use in INTEL_DEBUG=bat printing.
232 */
233 static inline void
234 iris_record_state_size(struct hash_table_u64 *ht,
235 uint32_t offset_from_base,
236 uint32_t size)
237 {
238 if (ht) {
239 _mesa_hash_table_u64_insert(ht, offset_from_base,
240 (void *)(uintptr_t) size);
241 }
242 }
243
244 #endif