lima/ppir: add ppir_node to ppir_src
[mesa.git] / src / gallium / drivers / iris / iris_blit.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include "pipe/p_defines.h"
25 #include "pipe/p_state.h"
26 #include "pipe/p_context.h"
27 #include "pipe/p_screen.h"
28 #include "util/u_format.h"
29 #include "util/u_inlines.h"
30 #include "util/ralloc.h"
31 #include "intel/blorp/blorp.h"
32 #include "iris_context.h"
33 #include "iris_resource.h"
34 #include "iris_screen.h"
35
36 /**
37 * Helper function for handling mirror image blits.
38 *
39 * If coord0 > coord1, swap them and return "true" (mirrored).
40 */
41 static bool
42 apply_mirror(float *coord0, float *coord1)
43 {
44 if (*coord0 > *coord1) {
45 float tmp = *coord0;
46 *coord0 = *coord1;
47 *coord1 = tmp;
48 return true;
49 }
50 return false;
51 }
52
53 /**
54 * Compute the number of pixels to clip for each side of a rect
55 *
56 * \param x0 The rect's left coordinate
57 * \param y0 The rect's bottom coordinate
58 * \param x1 The rect's right coordinate
59 * \param y1 The rect's top coordinate
60 * \param min_x The clipping region's left coordinate
61 * \param min_y The clipping region's bottom coordinate
62 * \param max_x The clipping region's right coordinate
63 * \param max_y The clipping region's top coordinate
64 * \param clipped_x0 The number of pixels to clip from the left side
65 * \param clipped_y0 The number of pixels to clip from the bottom side
66 * \param clipped_x1 The number of pixels to clip from the right side
67 * \param clipped_y1 The number of pixels to clip from the top side
68 *
69 * \return false if we clip everything away, true otherwise
70 */
71 static inline bool
72 compute_pixels_clipped(float x0, float y0, float x1, float y1,
73 float min_x, float min_y, float max_x, float max_y,
74 float *clipped_x0, float *clipped_y0,
75 float *clipped_x1, float *clipped_y1)
76 {
77 /* If we are going to clip everything away, stop. */
78 if (!(min_x <= max_x &&
79 min_y <= max_y &&
80 x0 <= max_x &&
81 y0 <= max_y &&
82 min_x <= x1 &&
83 min_y <= y1 &&
84 x0 <= x1 &&
85 y0 <= y1)) {
86 return false;
87 }
88
89 if (x0 < min_x)
90 *clipped_x0 = min_x - x0;
91 else
92 *clipped_x0 = 0;
93 if (max_x < x1)
94 *clipped_x1 = x1 - max_x;
95 else
96 *clipped_x1 = 0;
97
98 if (y0 < min_y)
99 *clipped_y0 = min_y - y0;
100 else
101 *clipped_y0 = 0;
102 if (max_y < y1)
103 *clipped_y1 = y1 - max_y;
104 else
105 *clipped_y1 = 0;
106
107 return true;
108 }
109
110 /**
111 * Clips a coordinate (left, right, top or bottom) for the src or dst rect
112 * (whichever requires the largest clip) and adjusts the coordinate
113 * for the other rect accordingly.
114 *
115 * \param mirror true if mirroring is required
116 * \param src the source rect coordinate (for example src_x0)
117 * \param dst0 the dst rect coordinate (for example dst_x0)
118 * \param dst1 the opposite dst rect coordinate (for example dst_x1)
119 * \param clipped_dst0 number of pixels to clip from the dst coordinate
120 * \param clipped_dst1 number of pixels to clip from the opposite dst coordinate
121 * \param scale the src vs dst scale involved for that coordinate
122 * \param is_left_or_bottom true if we are clipping the left or bottom sides
123 * of the rect.
124 */
125 static void
126 clip_coordinates(bool mirror,
127 float *src, float *dst0, float *dst1,
128 float clipped_dst0,
129 float clipped_dst1,
130 float scale,
131 bool is_left_or_bottom)
132 {
133 /* When clipping we need to add or subtract pixels from the original
134 * coordinates depending on whether we are acting on the left/bottom
135 * or right/top sides of the rect respectively. We assume we have to
136 * add them in the code below, and multiply by -1 when we should
137 * subtract.
138 */
139 int mult = is_left_or_bottom ? 1 : -1;
140
141 if (!mirror) {
142 *dst0 += clipped_dst0 * mult;
143 *src += clipped_dst0 * scale * mult;
144 } else {
145 *dst1 -= clipped_dst1 * mult;
146 *src += clipped_dst1 * scale * mult;
147 }
148 }
149
150 /**
151 * Apply a scissor rectangle to blit coordinates.
152 *
153 * Returns true if the blit was entirely scissored away.
154 */
155 static bool
156 apply_blit_scissor(const struct pipe_scissor_state *scissor,
157 float *src_x0, float *src_y0,
158 float *src_x1, float *src_y1,
159 float *dst_x0, float *dst_y0,
160 float *dst_x1, float *dst_y1,
161 bool mirror_x, bool mirror_y)
162 {
163 float clip_dst_x0, clip_dst_x1, clip_dst_y0, clip_dst_y1;
164
165 /* Compute number of pixels to scissor away. */
166 if (!compute_pixels_clipped(*dst_x0, *dst_y0, *dst_x1, *dst_y1,
167 scissor->minx, scissor->miny,
168 scissor->maxx, scissor->maxy,
169 &clip_dst_x0, &clip_dst_y0,
170 &clip_dst_x1, &clip_dst_y1))
171 return true;
172
173 // XXX: comments assume source clipping, which we don't do
174
175 /* When clipping any of the two rects we need to adjust the coordinates
176 * in the other rect considering the scaling factor involved. To obtain
177 * the best precision we want to make sure that we only clip once per
178 * side to avoid accumulating errors due to the scaling adjustment.
179 *
180 * For example, if src_x0 and dst_x0 need both to be clipped we want to
181 * avoid the situation where we clip src_x0 first, then adjust dst_x0
182 * accordingly but then we realize that the resulting dst_x0 still needs
183 * to be clipped, so we clip dst_x0 and adjust src_x0 again. Because we are
184 * applying scaling factors to adjust the coordinates in each clipping
185 * pass we lose some precision and that can affect the results of the
186 * blorp blit operation slightly. What we want to do here is detect the
187 * rect that we should clip first for each side so that when we adjust
188 * the other rect we ensure the resulting coordinate does not need to be
189 * clipped again.
190 *
191 * The code below implements this by comparing the number of pixels that
192 * we need to clip for each side of both rects considering the scales
193 * involved. For example, clip_src_x0 represents the number of pixels
194 * to be clipped for the src rect's left side, so if clip_src_x0 = 5,
195 * clip_dst_x0 = 4 and scale_x = 2 it means that we are clipping more
196 * from the dst rect so we should clip dst_x0 only and adjust src_x0.
197 * This is because clipping 4 pixels in the dst is equivalent to
198 * clipping 4 * 2 = 8 > 5 in the src.
199 */
200
201 if (*src_x0 == *src_x1 || *src_y0 == *src_y1
202 || *dst_x0 == *dst_x1 || *dst_y0 == *dst_y1)
203 return true;
204
205 float scale_x = (float) (*src_x1 - *src_x0) / (*dst_x1 - *dst_x0);
206 float scale_y = (float) (*src_y1 - *src_y0) / (*dst_y1 - *dst_y0);
207
208 /* Clip left side */
209 clip_coordinates(mirror_x, src_x0, dst_x0, dst_x1,
210 clip_dst_x0, clip_dst_x1, scale_x, true);
211
212 /* Clip right side */
213 clip_coordinates(mirror_x, src_x1, dst_x1, dst_x0,
214 clip_dst_x1, clip_dst_x0, scale_x, false);
215
216 /* Clip bottom side */
217 clip_coordinates(mirror_y, src_y0, dst_y0, dst_y1,
218 clip_dst_y0, clip_dst_y1, scale_y, true);
219
220 /* Clip top side */
221 clip_coordinates(mirror_y, src_y1, dst_y1, dst_y0,
222 clip_dst_y1, clip_dst_y0, scale_y, false);
223
224 /* Check for invalid bounds
225 * Can't blit for 0-dimensions
226 */
227 return *src_x0 == *src_x1 || *src_y0 == *src_y1
228 || *dst_x0 == *dst_x1 || *dst_y0 == *dst_y1;
229 }
230
231 void
232 iris_blorp_surf_for_resource(struct iris_vtable *vtbl,
233 struct blorp_surf *surf,
234 struct pipe_resource *p_res,
235 enum isl_aux_usage aux_usage,
236 unsigned level,
237 bool is_render_target)
238 {
239 struct iris_resource *res = (void *) p_res;
240
241 assert(!iris_resource_unfinished_aux_import(res));
242
243 if (aux_usage == ISL_AUX_USAGE_HIZ &&
244 !iris_resource_level_has_hiz(res, level))
245 aux_usage = ISL_AUX_USAGE_NONE;
246
247 *surf = (struct blorp_surf) {
248 .surf = &res->surf,
249 .addr = (struct blorp_address) {
250 .buffer = res->bo,
251 .offset = res->offset,
252 .reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
253 .mocs = vtbl->mocs(res->bo),
254 },
255 .aux_usage = aux_usage,
256 };
257
258 if (aux_usage != ISL_AUX_USAGE_NONE) {
259 surf->aux_surf = &res->aux.surf;
260 surf->aux_addr = (struct blorp_address) {
261 .buffer = res->aux.bo,
262 .offset = res->aux.offset,
263 .reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
264 .mocs = vtbl->mocs(res->bo),
265 };
266 surf->clear_color =
267 iris_resource_get_clear_color(res, NULL, NULL);
268 surf->clear_color_addr = (struct blorp_address) {
269 .buffer = res->aux.clear_color_bo,
270 .offset = res->aux.clear_color_offset,
271 .reloc_flags = 0,
272 .mocs = vtbl->mocs(res->aux.clear_color_bo),
273 };
274 }
275
276 // XXX: ASTC
277 }
278
279 static void
280 tex_cache_flush_hack(struct iris_batch *batch)
281 {
282 /* The hardware seems to have issues with having a two different
283 * format views of the same texture in the sampler cache at the
284 * same time. It's unclear exactly what the issue is but it hurts
285 * blits and copies particularly badly because they often reinterpret
286 * formats. We badly need better understanding of the sampler issue
287 * and a better fix but this works for now and fixes CTS tests.
288 *
289 * If the BO hasn't been referenced yet this batch, we assume that the
290 * texture cache doesn't contain any relevant data nor need flushing.
291 *
292 * TODO: Remove this hack!
293 */
294 const char *reason =
295 "workaround: WaSamplerCacheFlushBetweenRedescribedSurfaceReads";
296
297 iris_emit_pipe_control_flush(batch, reason, PIPE_CONTROL_CS_STALL);
298 iris_emit_pipe_control_flush(batch, reason,
299 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
300 }
301
302 /**
303 * The pipe->blit() driver hook.
304 *
305 * This performs a blit between two surfaces, which copies data but may
306 * also perform format conversion, scaling, flipping, and so on.
307 */
308 static void
309 iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
310 {
311 struct iris_context *ice = (void *) ctx;
312 struct iris_screen *screen = (struct iris_screen *)ctx->screen;
313 const struct gen_device_info *devinfo = &screen->devinfo;
314 struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
315 enum blorp_batch_flags blorp_flags = 0;
316 struct iris_resource *src_res = (void *) info->src.resource;
317 struct iris_resource *dst_res = (void *) info->dst.resource;
318
319 /* We don't support color masking. */
320 assert((info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA ||
321 (info->mask & PIPE_MASK_RGBA) == 0);
322
323 if (info->render_condition_enable) {
324 if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
325 return;
326
327 if (ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT)
328 blorp_flags |= BLORP_BATCH_PREDICATE_ENABLE;
329 }
330
331 struct iris_format_info src_fmt =
332 iris_format_for_usage(devinfo, info->src.format,
333 ISL_SURF_USAGE_TEXTURE_BIT);
334 enum isl_aux_usage src_aux_usage =
335 iris_resource_texture_aux_usage(ice, src_res, src_fmt.fmt, 0);
336
337 if (src_aux_usage == ISL_AUX_USAGE_HIZ)
338 src_aux_usage = ISL_AUX_USAGE_NONE;
339
340 bool src_clear_supported = src_aux_usage != ISL_AUX_USAGE_NONE &&
341 src_res->surf.format == src_fmt.fmt;
342
343 iris_resource_prepare_access(ice, batch, src_res, info->src.level, 1,
344 info->src.box.z, info->src.box.depth,
345 src_aux_usage, src_clear_supported);
346
347 struct iris_format_info dst_fmt =
348 iris_format_for_usage(devinfo, info->dst.format,
349 ISL_SURF_USAGE_RENDER_TARGET_BIT);
350 enum isl_aux_usage dst_aux_usage =
351 iris_resource_render_aux_usage(ice, dst_res, dst_fmt.fmt, false, false);
352 bool dst_clear_supported = dst_aux_usage != ISL_AUX_USAGE_NONE;
353
354 struct blorp_surf src_surf, dst_surf;
355 iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, info->src.resource,
356 src_aux_usage, info->src.level, false);
357 iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, info->dst.resource,
358 dst_aux_usage, info->dst.level, true);
359
360 iris_resource_prepare_access(ice, batch, dst_res, info->dst.level, 1,
361 info->dst.box.z, info->dst.box.depth,
362 dst_aux_usage, dst_clear_supported);
363
364 float src_x0 = info->src.box.x;
365 float src_x1 = info->src.box.x + info->src.box.width;
366 float src_y0 = info->src.box.y;
367 float src_y1 = info->src.box.y + info->src.box.height;
368 float dst_x0 = info->dst.box.x;
369 float dst_x1 = info->dst.box.x + info->dst.box.width;
370 float dst_y0 = info->dst.box.y;
371 float dst_y1 = info->dst.box.y + info->dst.box.height;
372 bool mirror_x = apply_mirror(&src_x0, &src_x1);
373 bool mirror_y = apply_mirror(&src_y0, &src_y1);
374 enum blorp_filter filter;
375
376 if (info->scissor_enable) {
377 bool noop = apply_blit_scissor(&info->scissor,
378 &src_x0, &src_y0, &src_x1, &src_y1,
379 &dst_x0, &dst_y0, &dst_x1, &dst_y1,
380 mirror_x, mirror_y);
381 if (noop)
382 return;
383 }
384
385 if (abs(info->dst.box.width) == abs(info->src.box.width) &&
386 abs(info->dst.box.height) == abs(info->src.box.height)) {
387 if (src_surf.surf->samples > 1 && dst_surf.surf->samples <= 1) {
388 /* The OpenGL ES 3.2 specification, section 16.2.1, says:
389 *
390 * "If the read framebuffer is multisampled (its effective
391 * value of SAMPLE_BUFFERS is one) and the draw framebuffer
392 * is not (its value of SAMPLE_BUFFERS is zero), the samples
393 * corresponding to each pixel location in the source are
394 * converted to a single sample before being written to the
395 * destination. The filter parameter is ignored. If the
396 * source formats are integer types or stencil values, a
397 * single sample’s value is selected for each pixel. If the
398 * source formats are floating-point or normalized types,
399 * the sample values for each pixel are resolved in an
400 * implementation-dependent manner. If the source formats
401 * are depth values, sample values are resolved in an
402 * implementation-dependent manner where the result will be
403 * between the minimum and maximum depth values in the pixel."
404 *
405 * When selecting a single sample, we always choose sample 0.
406 */
407 if (util_format_is_depth_or_stencil(info->src.format) ||
408 util_format_is_pure_integer(info->src.format)) {
409 filter = BLORP_FILTER_SAMPLE_0;
410 } else {
411 filter = BLORP_FILTER_AVERAGE;
412 }
413 } else {
414 /* The OpenGL 4.6 specification, section 18.3.1, says:
415 *
416 * "If the source and destination dimensions are identical,
417 * no filtering is applied."
418 *
419 * Using BLORP_FILTER_NONE will also handle the upsample case by
420 * replicating the one value in the source to all values in the
421 * destination.
422 */
423 filter = BLORP_FILTER_NONE;
424 }
425 } else if (info->filter == PIPE_TEX_FILTER_LINEAR) {
426 filter = BLORP_FILTER_BILINEAR;
427 } else {
428 filter = BLORP_FILTER_NEAREST;
429 }
430
431 bool format_mismatch = src_fmt.fmt != src_res->surf.format;
432
433 if (format_mismatch && iris_batch_references(batch, src_res->bo))
434 tex_cache_flush_hack(batch);
435
436 if (dst_res->base.target == PIPE_BUFFER)
437 util_range_add(&dst_res->valid_buffer_range, dst_x0, dst_x1);
438
439 struct blorp_batch blorp_batch;
440 blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
441
442 unsigned main_mask;
443 if (util_format_is_depth_or_stencil(info->dst.format))
444 main_mask = PIPE_MASK_Z;
445 else
446 main_mask = PIPE_MASK_RGBA;
447
448 if (info->mask & main_mask) {
449 for (int slice = 0; slice < info->dst.box.depth; slice++) {
450 iris_batch_maybe_flush(batch, 1500);
451
452 blorp_blit(&blorp_batch,
453 &src_surf, info->src.level, info->src.box.z + slice,
454 src_fmt.fmt, src_fmt.swizzle,
455 &dst_surf, info->dst.level, info->dst.box.z + slice,
456 dst_fmt.fmt, dst_fmt.swizzle,
457 src_x0, src_y0, src_x1, src_y1,
458 dst_x0, dst_y0, dst_x1, dst_y1,
459 filter, mirror_x, mirror_y);
460 }
461 }
462
463 if ((info->mask & PIPE_MASK_S) &&
464 util_format_has_stencil(util_format_description(info->dst.format)) &&
465 util_format_has_stencil(util_format_description(info->src.format))) {
466 struct iris_resource *src_res, *dst_res, *junk;
467 iris_get_depth_stencil_resources(info->src.resource, &junk, &src_res);
468 iris_get_depth_stencil_resources(info->dst.resource, &junk, &dst_res);
469 iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, &src_res->base,
470 ISL_AUX_USAGE_NONE, info->src.level, false);
471 iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, &dst_res->base,
472 ISL_AUX_USAGE_NONE, info->dst.level, true);
473
474 for (int slice = 0; slice < info->dst.box.depth; slice++) {
475 iris_batch_maybe_flush(batch, 1500);
476
477 blorp_blit(&blorp_batch,
478 &src_surf, info->src.level, info->src.box.z + slice,
479 ISL_FORMAT_R8_UINT, ISL_SWIZZLE_IDENTITY,
480 &dst_surf, info->dst.level, info->dst.box.z + slice,
481 ISL_FORMAT_R8_UINT, ISL_SWIZZLE_IDENTITY,
482 src_x0, src_y0, src_x1, src_y1,
483 dst_x0, dst_y0, dst_x1, dst_y1,
484 filter, mirror_x, mirror_y);
485 }
486 }
487
488 blorp_batch_finish(&blorp_batch);
489
490 if (format_mismatch)
491 tex_cache_flush_hack(batch);
492
493 iris_resource_finish_write(ice, dst_res, info->dst.level, info->dst.box.z,
494 info->dst.box.depth, dst_aux_usage);
495
496 iris_flush_and_dirty_for_history(ice, batch, (struct iris_resource *)
497 info->dst.resource,
498 PIPE_CONTROL_RENDER_TARGET_FLUSH,
499 "cache history: post-blit");
500 }
501
502 static void
503 get_copy_region_aux_settings(const struct gen_device_info *devinfo,
504 struct iris_resource *res,
505 enum isl_aux_usage *out_aux_usage,
506 bool *out_clear_supported)
507 {
508 switch (res->aux.usage) {
509 case ISL_AUX_USAGE_MCS:
510 case ISL_AUX_USAGE_CCS_E:
511 *out_aux_usage = res->aux.usage;
512 /* Prior to Gen9, fast-clear only supported 0/1 clear colors. Since
513 * we're going to re-interpret the format as an integer format possibly
514 * with a different number of components, we can't handle clear colors
515 * until Gen9.
516 */
517 *out_clear_supported = devinfo->gen >= 9;
518 break;
519 default:
520 *out_aux_usage = ISL_AUX_USAGE_NONE;
521 *out_clear_supported = false;
522 break;
523 }
524 }
525
526 /**
527 * Perform a GPU-based raw memory copy between compatible view classes.
528 *
529 * Does not perform any flushing - the new data may still be left in the
530 * render cache, and old data may remain in other caches.
531 *
532 * Wraps blorp_copy() and blorp_buffer_copy().
533 */
534 void
535 iris_copy_region(struct blorp_context *blorp,
536 struct iris_batch *batch,
537 struct pipe_resource *dst,
538 unsigned dst_level,
539 unsigned dstx, unsigned dsty, unsigned dstz,
540 struct pipe_resource *src,
541 unsigned src_level,
542 const struct pipe_box *src_box)
543 {
544 struct blorp_batch blorp_batch;
545 struct iris_context *ice = blorp->driver_ctx;
546 struct iris_screen *screen = (void *) ice->ctx.screen;
547 const struct gen_device_info *devinfo = &screen->devinfo;
548 struct iris_resource *src_res = (void *) src;
549 struct iris_resource *dst_res = (void *) dst;
550
551 enum isl_aux_usage src_aux_usage, dst_aux_usage;
552 bool src_clear_supported, dst_clear_supported;
553 get_copy_region_aux_settings(devinfo, src_res, &src_aux_usage,
554 &src_clear_supported);
555 get_copy_region_aux_settings(devinfo, dst_res, &dst_aux_usage,
556 &dst_clear_supported);
557
558 if (iris_batch_references(batch, src_res->bo))
559 tex_cache_flush_hack(batch);
560
561 if (dst->target == PIPE_BUFFER)
562 util_range_add(&dst_res->valid_buffer_range, dstx, dstx + src_box->width);
563
564 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
565 struct blorp_address src_addr = {
566 .buffer = iris_resource_bo(src), .offset = src_box->x,
567 };
568 struct blorp_address dst_addr = {
569 .buffer = iris_resource_bo(dst), .offset = dstx,
570 .reloc_flags = EXEC_OBJECT_WRITE,
571 };
572
573 iris_batch_maybe_flush(batch, 1500);
574
575 blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
576 blorp_buffer_copy(&blorp_batch, src_addr, dst_addr, src_box->width);
577 blorp_batch_finish(&blorp_batch);
578 } else {
579 // XXX: what about one surface being a buffer and not the other?
580
581 struct blorp_surf src_surf, dst_surf;
582 iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, src, src_aux_usage,
583 src_level, false);
584 iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, dst, dst_aux_usage,
585 dst_level, true);
586
587 iris_resource_prepare_access(ice, batch, src_res, src_level, 1,
588 src_box->z, src_box->depth,
589 src_aux_usage, src_clear_supported);
590 iris_resource_prepare_access(ice, batch, dst_res, dst_level, 1,
591 dstz, src_box->depth,
592 dst_aux_usage, dst_clear_supported);
593
594 blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
595
596 for (int slice = 0; slice < src_box->depth; slice++) {
597 iris_batch_maybe_flush(batch, 1500);
598
599 blorp_copy(&blorp_batch, &src_surf, src_level, src_box->z + slice,
600 &dst_surf, dst_level, dstz + slice,
601 src_box->x, src_box->y, dstx, dsty,
602 src_box->width, src_box->height);
603 }
604 blorp_batch_finish(&blorp_batch);
605
606 iris_resource_finish_write(ice, dst_res, dst_level, dstz,
607 src_box->depth, dst_aux_usage);
608 }
609
610 tex_cache_flush_hack(batch);
611 }
612
613 static struct iris_batch *
614 get_preferred_batch(struct iris_context *ice, struct iris_bo *bo)
615 {
616 /* If the compute batch is already using this buffer, we'd prefer to
617 * continue queueing in the compute batch.
618 */
619 if (iris_batch_references(&ice->batches[IRIS_BATCH_COMPUTE], bo))
620 return &ice->batches[IRIS_BATCH_COMPUTE];
621
622 /* Otherwise default to the render batch. */
623 return &ice->batches[IRIS_BATCH_RENDER];
624 }
625
626
627 /**
628 * The pipe->resource_copy_region() driver hook.
629 *
630 * This implements ARB_copy_image semantics - a raw memory copy between
631 * compatible view classes.
632 */
633 static void
634 iris_resource_copy_region(struct pipe_context *ctx,
635 struct pipe_resource *dst,
636 unsigned dst_level,
637 unsigned dstx, unsigned dsty, unsigned dstz,
638 struct pipe_resource *src,
639 unsigned src_level,
640 const struct pipe_box *src_box)
641 {
642 struct iris_context *ice = (void *) ctx;
643 struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
644
645 /* Use MI_COPY_MEM_MEM for tiny (<= 16 byte, % 4) buffer copies. */
646 if (src->target == PIPE_BUFFER && dst->target == PIPE_BUFFER &&
647 (src_box->width % 4 == 0) && src_box->width <= 16) {
648 struct iris_bo *dst_bo = iris_resource_bo(dst);
649 batch = get_preferred_batch(ice, dst_bo);
650 iris_batch_maybe_flush(batch, 24 + 5 * (src_box->width / 4));
651 iris_emit_pipe_control_flush(batch,
652 "stall for MI_COPY_MEM_MEM copy_region",
653 PIPE_CONTROL_CS_STALL);
654 ice->vtbl.copy_mem_mem(batch, dst_bo, dstx, iris_resource_bo(src),
655 src_box->x, src_box->width);
656 return;
657 }
658
659 iris_copy_region(&ice->blorp, batch, dst, dst_level, dstx, dsty, dstz,
660 src, src_level, src_box);
661
662 if (util_format_is_depth_and_stencil(dst->format) &&
663 util_format_has_stencil(util_format_description(src->format))) {
664 struct iris_resource *junk, *s_src_res, *s_dst_res;
665 iris_get_depth_stencil_resources(src, &junk, &s_src_res);
666 iris_get_depth_stencil_resources(dst, &junk, &s_dst_res);
667
668 iris_copy_region(&ice->blorp, batch, &s_dst_res->base, dst_level, dstx,
669 dsty, dstz, &s_src_res->base, src_level, src_box);
670 }
671
672 iris_flush_and_dirty_for_history(ice, batch, (struct iris_resource *) dst,
673 PIPE_CONTROL_RENDER_TARGET_FLUSH,
674 "cache history: post copy_region");
675 }
676
677 void
678 iris_init_blit_functions(struct pipe_context *ctx)
679 {
680 ctx->blit = iris_blit;
681 ctx->resource_copy_region = iris_resource_copy_region;
682 }