iris: maybe-flush before blorp operations
[mesa.git] / src / gallium / drivers / iris / iris_blit.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include <stdio.h>
24 #include "pipe/p_defines.h"
25 #include "pipe/p_state.h"
26 #include "pipe/p_context.h"
27 #include "pipe/p_screen.h"
28 #include "util/u_inlines.h"
29 #include "util/ralloc.h"
30 #include "intel/blorp/blorp.h"
31 #include "iris_context.h"
32 #include "iris_resource.h"
33 #include "iris_screen.h"
34
35 void
36 iris_blorp_surf_for_resource(struct blorp_surf *surf,
37 struct pipe_resource *p_res,
38 enum isl_aux_usage aux_usage,
39 bool is_render_target)
40 {
41 struct iris_resource *res = (void *) p_res;
42
43 *surf = (struct blorp_surf) {
44 .surf = &res->surf,
45 .addr = (struct blorp_address) {
46 .buffer = res->bo,
47 .offset = 0, // XXX: ???
48 .reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
49 .mocs = I915_MOCS_CACHED, // XXX: BDW MOCS, PTE MOCS
50 },
51 .aux_usage = aux_usage,
52 };
53
54 assert(surf->aux_usage == ISL_AUX_USAGE_NONE);
55 }
56
57 static enum isl_format
58 iris_get_blorp_format(enum pipe_format pf)
59 {
60 switch (pf) {
61 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
62 return ISL_FORMAT_R24_UNORM_X8_TYPELESS;
63 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
64 return ISL_FORMAT_R32_FLOAT;
65 default:
66 return iris_isl_format_for_pipe_format(pf);
67 }
68 }
69
70 static void
71 iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
72 {
73 struct iris_context *ice = (void *) ctx;
74 struct blorp_surf src_surf, dst_surf;
75 iris_blorp_surf_for_resource(&src_surf, info->src.resource,
76 ISL_AUX_USAGE_NONE, false);
77 iris_blorp_surf_for_resource(&dst_surf, info->dst.resource,
78 ISL_AUX_USAGE_NONE, true);
79
80 enum isl_format src_isl_format = iris_get_blorp_format(info->src.format);
81 enum isl_format dst_isl_format = iris_get_blorp_format(info->dst.format);
82
83 // XXX: ???
84 unsigned dst_layer = 0;
85 unsigned src_layer = 0;
86
87 struct isl_swizzle src_isl_swizzle = ISL_SWIZZLE_IDENTITY;
88
89 int src_x0 = info->src.box.x;
90 int src_x1 = info->src.box.x + info->src.box.width;
91 int src_y0 = info->src.box.y;
92 int src_y1 = info->src.box.y + info->src.box.height;
93 int dst_x0 = info->dst.box.x;
94 int dst_x1 = info->dst.box.x + info->dst.box.width;
95 int dst_y0 = info->dst.box.y;
96 int dst_y1 = info->dst.box.y + info->dst.box.height;
97 bool mirror_x = false;
98 bool mirror_y = false;
99 GLenum filter =
100 info->filter == PIPE_TEX_FILTER_LINEAR ? GL_LINEAR : GL_NEAREST;
101
102 struct iris_batch *batch = &ice->render_batch;
103
104 iris_batch_maybe_flush(batch, 1500);
105
106 struct blorp_batch blorp_batch;
107 blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
108 blorp_blit(&blorp_batch, &src_surf, info->src.level, src_layer,
109 src_isl_format, src_isl_swizzle,
110 &dst_surf, info->dst.level, dst_layer,
111 dst_isl_format, ISL_SWIZZLE_IDENTITY,
112 src_x0, src_y0, src_x1, src_y1,
113 dst_x0, dst_y0, dst_x1, dst_y1,
114 filter, mirror_x, mirror_y);
115
116 blorp_batch_finish(&blorp_batch);
117 }
118
119 static void
120 iris_resource_copy_region(struct pipe_context *ctx,
121 struct pipe_resource *dst,
122 unsigned dst_level,
123 unsigned dstx, unsigned dsty, unsigned dstz,
124 struct pipe_resource *src,
125 unsigned src_level,
126 const struct pipe_box *src_box)
127 {
128 struct iris_context *ice = (void *) ctx;
129 struct blorp_surf src_surf, dst_surf;
130 iris_blorp_surf_for_resource(&src_surf, src, ISL_AUX_USAGE_NONE, false);
131 iris_blorp_surf_for_resource(&dst_surf, dst, ISL_AUX_USAGE_NONE, true);
132
133 // XXX: ???
134 unsigned dst_layer = dstz;
135 unsigned src_layer = src_box->z;
136
137 struct iris_batch *batch = &ice->render_batch;
138
139 iris_batch_maybe_flush(batch, 1500);
140
141 struct blorp_batch blorp_batch;
142 blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
143 blorp_copy(&blorp_batch, &src_surf, src_level, src_layer,
144 &dst_surf, dst_level, dst_layer,
145 src_box->x, src_box->y, dstx, dsty,
146 src_box->width, src_box->height);
147 blorp_batch_finish(&blorp_batch);
148 }
149
150 void
151 iris_init_blit_functions(struct pipe_context *ctx)
152 {
153 ctx->blit = iris_blit;
154 ctx->resource_copy_region = iris_resource_copy_region;
155 }