2 * Copyright © 2017 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "pipe/p_defines.h"
26 #include "pipe/p_state.h"
27 #include "util/ralloc.h"
28 #include "util/u_inlines.h"
29 #include "util/u_format.h"
30 #include "util/u_upload_mgr.h"
32 #include "iris_context.h"
33 #include "iris_resource.h"
34 #include "iris_screen.h"
37 iris_flush(struct pipe_context
*ctx
,
38 struct pipe_fence_handle
**fence
,
41 struct iris_context
*ice
= (struct iris_context
*)ctx
;
43 iris_batch_flush(&ice
->render_batch
);
50 * For debugging purposes, this returns a time in seconds.
57 clock_gettime(CLOCK_MONOTONIC
, &tp
);
59 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
63 iris_set_debug_callback(struct pipe_context
*ctx
,
64 const struct pipe_debug_callback
*cb
)
66 struct iris_context
*ice
= (struct iris_context
*)ctx
;
71 memset(&ice
->dbg
, 0, sizeof(ice
->dbg
));
75 iris_destroy_context(struct pipe_context
*ctx
)
77 struct iris_context
*ice
= (struct iris_context
*)ctx
;
79 if (ctx
->stream_uploader
)
80 u_upload_destroy(ctx
->stream_uploader
);
82 iris_destroy_program_cache(ice
);
83 u_upload_destroy(ice
->state
.surface_uploader
);
84 u_upload_destroy(ice
->state
.dynamic_uploader
);
86 iris_batch_free(&ice
->render_batch
);
91 #define genX_call(devinfo, func, ...) \
92 switch (devinfo->gen) { \
94 gen10_##func(__VA_ARGS__); \
97 gen9_##func(__VA_ARGS__); \
100 unreachable("Unknown hardware generation"); \
103 struct pipe_context
*
104 iris_create_context(struct pipe_screen
*pscreen
, void *priv
, unsigned flags
)
106 struct iris_screen
*screen
= (struct iris_screen
*)pscreen
;
107 const struct gen_device_info
*devinfo
= &screen
->devinfo
;
108 struct iris_context
*ice
= rzalloc(NULL
, struct iris_context
);
113 struct pipe_context
*ctx
= &ice
->ctx
;
115 ctx
->screen
= pscreen
;
118 ctx
->stream_uploader
= u_upload_create_default(ctx
);
119 if (!ctx
->stream_uploader
) {
123 ctx
->const_uploader
= ctx
->stream_uploader
;
125 ctx
->destroy
= iris_destroy_context
;
126 ctx
->flush
= iris_flush
;
127 ctx
->set_debug_callback
= iris_set_debug_callback
;
129 ice
->shaders
.urb_size
= devinfo
->urb
.size
;
131 iris_init_blit_functions(ctx
);
132 iris_init_clear_functions(ctx
);
133 iris_init_program_functions(ctx
);
134 iris_init_resource_functions(ctx
);
135 iris_init_query_functions(ctx
);
137 iris_init_program_cache(ice
);
139 ice
->state
.surface_uploader
=
140 u_upload_create(&ice
->ctx
, 16384, PIPE_BIND_CUSTOM
, PIPE_USAGE_IMMUTABLE
,
141 IRIS_RESOURCE_FLAG_SURFACE_MEMZONE
);
142 ice
->state
.dynamic_uploader
=
143 u_upload_create(&ice
->ctx
, 16384, PIPE_BIND_CUSTOM
, PIPE_USAGE_IMMUTABLE
,
144 IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE
);
146 genX_call(devinfo
, init_state
, ice
);
147 genX_call(devinfo
, init_blorp
, ice
);
148 ice
->vtbl
.init_render_context(screen
, &ice
->render_batch
, &ice
->vtbl
,