src/gallium/drivers/iris/iris_context.c

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <time.h>
  25 #include "pipe/p_defines.h"
  26 #include "pipe/p_state.h"
  27 #include "util/ralloc.h"
  28 #include "util/u_inlines.h"
  29 #include "util/u_format.h"
  30 #include "util/u_upload_mgr.h"
  31 #include "i915_drm.h"
  32 #include "iris_context.h"
  33 #include "iris_resource.h"
  34 #include "iris_screen.h"
  35
  36 static void
  37 iris_flush(struct pipe_context *ctx,
  38            struct pipe_fence_handle **fence,
  39            unsigned flags)
  40 {
  41    struct iris_context *ice = (struct iris_context *)ctx;
  42
  43    iris_batch_flush(&ice->render_batch);
  44
  45    if (fence)
  46       *fence = NULL;
  47 }
  48
  49 /**
  50  * For debugging purposes, this returns a time in seconds.
  51  */
  52 double
  53 get_time(void)
  54 {
  55    struct timespec tp;
  56
  57    clock_gettime(CLOCK_MONOTONIC, &tp);
  58
  59    return tp.tv_sec + tp.tv_nsec / 1000000000.0;
  60 }
  61
  62 static void
  63 iris_set_debug_callback(struct pipe_context *ctx,
  64                         const struct pipe_debug_callback *cb)
  65 {
  66    struct iris_context *ice = (struct iris_context *)ctx;
  67
  68    if (cb)
  69       ice->dbg = *cb;
  70    else
  71       memset(&ice->dbg, 0, sizeof(ice->dbg));
  72 }
  73
  74 static void
  75 iris_destroy_context(struct pipe_context *ctx)
  76 {
  77    struct iris_context *ice = (struct iris_context *)ctx;
  78
  79    if (ctx->stream_uploader)
  80       u_upload_destroy(ctx->stream_uploader);
  81
  82    iris_destroy_program_cache(ice);
  83    iris_destroy_binder(&ice->state.binder);
  84    u_upload_destroy(ice->state.surface_uploader);
  85    u_upload_destroy(ice->state.dynamic_uploader);
  86
  87    iris_batch_free(&ice->render_batch);
  88
  89    ralloc_free(ice);
  90 }
  91
  92 #define genX_call(devinfo, func, ...)             \
  93    switch (devinfo->gen) {                        \
  94    case 10:                                       \
  95       gen10_##func(__VA_ARGS__);                  \
  96       break;                                      \
  97    case 9:                                        \
  98       gen9_##func(__VA_ARGS__);                   \
  99       break;                                      \
 100    default:                                       \
 101       unreachable("Unknown hardware generation"); \
 102    }
 103
 104 struct pipe_context *
 105 iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
 106 {
 107    struct iris_screen *screen = (struct iris_screen*)pscreen;
 108    const struct gen_device_info *devinfo = &screen->devinfo;
 109    struct iris_context *ice = rzalloc(NULL, struct iris_context);
 110
 111    if (!ice)
 112       return NULL;
 113
 114    struct pipe_context *ctx = &ice->ctx;
 115
 116    ctx->screen = pscreen;
 117    ctx->priv = priv;
 118
 119    ctx->stream_uploader = u_upload_create_default(ctx);
 120    if (!ctx->stream_uploader) {
 121       free(ctx);
 122       return NULL;
 123    }
 124    ctx->const_uploader = ctx->stream_uploader;
 125
 126    ctx->destroy = iris_destroy_context;
 127    ctx->flush = iris_flush;
 128    ctx->set_debug_callback = iris_set_debug_callback;
 129
 130    ice->shaders.urb_size = devinfo->urb.size;
 131
 132    iris_init_blit_functions(ctx);
 133    iris_init_clear_functions(ctx);
 134    iris_init_program_functions(ctx);
 135    iris_init_resource_functions(ctx);
 136    iris_init_query_functions(ctx);
 137
 138    iris_init_program_cache(ice);
 139
 140    iris_init_binder(&ice->state.binder, screen->bufmgr);
 141
 142    ice->state.surface_uploader =
 143       u_upload_create(&ice->ctx, 16384, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
 144                       IRIS_RESOURCE_FLAG_SURFACE_MEMZONE);
 145    ice->state.dynamic_uploader =
 146       u_upload_create(&ice->ctx, 16384, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
 147                       IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE);
 148
 149    genX_call(devinfo, init_state, ice);
 150    ice->state.init_render_context(screen, &ice->render_batch, &ice->dbg);
 151
 152    return ctx;
 153 }