2 * Copyright © 2017 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef IRIS_CONTEXT_H
24 #define IRIS_CONTEXT_H
26 #include "pipe/p_context.h"
27 #include "pipe/p_state.h"
28 #include "util/u_debug.h"
29 #include "intel/common/gen_debug.h"
30 #include "intel/compiler/brw_compiler.h"
31 #include "iris_batch.h"
32 #include "iris_screen.h"
37 #define IRIS_RESOURCE_FLAG_INSTRUCTION_CACHE (PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
39 #define IRIS_MAX_TEXTURE_SAMPLERS 32
40 #define IRIS_MAX_VIEWPORTS 16
42 #define IRIS_DIRTY_COLOR_CALC_STATE (1ull << 0)
43 #define IRIS_DIRTY_POLYGON_STIPPLE (1ull << 1)
44 #define IRIS_DIRTY_SCISSOR_RECT (1ull << 2)
45 #define IRIS_DIRTY_WM_DEPTH_STENCIL (1ull << 3)
46 #define IRIS_DIRTY_CC_VIEWPORT (1ull << 4)
47 #define IRIS_DIRTY_SF_CL_VIEWPORT (1ull << 5)
48 #define IRIS_DIRTY_PS_BLEND (1ull << 6)
49 #define IRIS_DIRTY_BLEND_STATE (1ull << 7)
50 #define IRIS_DIRTY_RASTER (1ull << 8)
51 #define IRIS_DIRTY_CLIP (1ull << 9)
52 #define IRIS_DIRTY_SCISSOR (1ull << 10)
53 #define IRIS_DIRTY_LINE_STIPPLE (1ull << 11)
54 #define IRIS_DIRTY_VERTEX_ELEMENTS (1ull << 12)
55 #define IRIS_DIRTY_MULTISAMPLE (1ull << 13)
56 #define IRIS_DIRTY_VERTEX_BUFFERS (1ull << 14)
57 #define IRIS_DIRTY_SAMPLE_MASK (1ull << 15)
58 #define IRIS_DIRTY_SAMPLER_STATES_VS (1ull << 16)
59 #define IRIS_DIRTY_SAMPLER_STATES_TCS (1ull << 17)
60 #define IRIS_DIRTY_SAMPLER_STATES_TES (1ull << 18)
61 #define IRIS_DIRTY_SAMPLER_STATES_GS (1ull << 19)
62 #define IRIS_DIRTY_SAMPLER_STATES_PS (1ull << 20)
63 #define IRIS_DIRTY_SAMPLER_STATES_CS (1ull << 21)
64 #define IRIS_DIRTY_UNCOMPILED_VS (1ull << 22)
65 #define IRIS_DIRTY_UNCOMPILED_TCS (1ull << 23)
66 #define IRIS_DIRTY_UNCOMPILED_TES (1ull << 24)
67 #define IRIS_DIRTY_UNCOMPILED_GS (1ull << 25)
68 #define IRIS_DIRTY_UNCOMPILED_FS (1ull << 26)
69 #define IRIS_DIRTY_UNCOMPILED_CS (1ull << 27)
70 #define IRIS_DIRTY_VS (1ull << 28)
71 #define IRIS_DIRTY_TCS (1ull << 29)
72 #define IRIS_DIRTY_TES (1ull << 30)
73 #define IRIS_DIRTY_GS (1ull << 31)
74 #define IRIS_DIRTY_FS (1ull << 32)
75 #define IRIS_DIRTY_CS (1ull << 33)
76 #define IRIS_DIRTY_URB (1ull << 34)
77 #define IRIS_DIRTY_CONSTANTS_VS (1ull << 35)
78 #define IRIS_DIRTY_CONSTANTS_TCS (1ull << 36)
79 #define IRIS_DIRTY_CONSTANTS_TES (1ull << 37)
80 #define IRIS_DIRTY_CONSTANTS_GS (1ull << 38)
81 #define IRIS_DIRTY_CONSTANTS_FS (1ull << 39)
83 enum brw_param_domain
{
84 BRW_PARAM_DOMAIN_BUILTIN
= 0,
85 BRW_PARAM_DOMAIN_PARAMETER
,
86 BRW_PARAM_DOMAIN_UNIFORM
,
87 BRW_PARAM_DOMAIN_IMAGE
,
90 #define BRW_PARAM(domain, val) (BRW_PARAM_DOMAIN_##domain << 24 | (val))
91 #define BRW_PARAM_DOMAIN(param) ((uint32_t)(param) >> 24)
92 #define BRW_PARAM_VALUE(param) ((uint32_t)(param) & 0x00ffffff)
94 #define BRW_PARAM_PARAMETER(idx, comp) \
95 BRW_PARAM(PARAMETER, ((idx) << 2) | (comp))
96 #define BRW_PARAM_PARAMETER_IDX(param) (BRW_PARAM_VALUE(param) >> 2)
97 #define BRW_PARAM_PARAMETER_COMP(param) (BRW_PARAM_VALUE(param) & 0x3)
99 #define BRW_PARAM_UNIFORM(idx) BRW_PARAM(UNIFORM, (idx))
100 #define BRW_PARAM_UNIFORM_IDX(param) BRW_PARAM_VALUE(param)
102 #define BRW_PARAM_IMAGE(idx, offset) BRW_PARAM(IMAGE, ((idx) << 8) | (offset))
103 #define BRW_PARAM_IMAGE_IDX(value) (BRW_PARAM_VALUE(value) >> 8)
104 #define BRW_PARAM_IMAGE_OFFSET(value) (BRW_PARAM_VALUE(value) & 0xf)
106 struct iris_depth_stencil_alpha_state
;
108 enum iris_program_cache_id
{
109 IRIS_CACHE_VS
= MESA_SHADER_VERTEX
,
110 IRIS_CACHE_TCS
= MESA_SHADER_TESS_CTRL
,
111 IRIS_CACHE_TES
= MESA_SHADER_TESS_EVAL
,
112 IRIS_CACHE_GS
= MESA_SHADER_GEOMETRY
,
113 IRIS_CACHE_FS
= MESA_SHADER_FRAGMENT
,
114 IRIS_CACHE_CS
= MESA_SHADER_COMPUTE
,
115 IRIS_CACHE_BLORP_BLIT
,
118 struct iris_compiled_shader
{
119 /** Buffer containing the uploaded assembly. */
120 struct pipe_resource
*buffer
;
122 /** Offset where the assembly lives in the BO. */
125 /** Pointer to the assembly in the BO's map. */
128 /** The program data (owned by the program cache hash table) */
129 struct brw_stage_prog_data
*prog_data
;
132 * Shader packets and other data derived from prog_data. These must be
133 * completely determined from prog_data.
135 uint8_t derived_data
[0];
138 struct iris_shader_state
{
139 struct pipe_constant_buffer constbuf
[PIPE_MAX_CONSTANT_BUFFERS
];
140 struct pipe_resource
*push_resource
;
141 unsigned const_offset
;
145 struct iris_context
{
146 struct pipe_context ctx
;
148 struct pipe_debug_callback dbg
;
151 struct iris_uncompiled_shader
*uncompiled
[MESA_SHADER_STAGES
];
152 struct iris_compiled_shader
*prog
[MESA_SHADER_STAGES
];
153 struct brw_vue_map
*last_vue_map
;
155 struct iris_shader_state state
[MESA_SHADER_STAGES
];
157 struct u_upload_mgr
*uploader
;
158 struct hash_table
*cache
;
163 /** The main batch for rendering */
164 struct iris_batch render_batch
;
168 unsigned num_viewports
; // XXX: can viewports + scissors be different?
169 unsigned num_scissors
;
170 unsigned sample_mask
;
171 struct iris_blend_state
*cso_blend
;
172 struct iris_rasterizer_state
*cso_rast
;
173 struct iris_depth_stencil_alpha_state
*cso_zsa
;
174 struct iris_vertex_element_state
*cso_vertex_elements
;
175 struct iris_vertex_buffer_state
*cso_vertex_buffers
;
176 struct iris_viewport_state
*cso_vp
;
177 struct iris_depth_state
*cso_depth
;
178 struct pipe_blend_color blend_color
;
179 struct pipe_poly_stipple poly_stipple
;
180 struct pipe_scissor_state scissors
[IRIS_MAX_VIEWPORTS
];
181 struct pipe_stencil_ref stencil_ref
;
182 struct pipe_framebuffer_state framebuffer
;
184 struct iris_sampler_state
*samplers
[MESA_SHADER_STAGES
][IRIS_MAX_TEXTURE_SAMPLERS
];
186 void (*destroy_state
)(struct iris_context
*ice
);
187 void (*init_render_context
)(struct iris_screen
*screen
,
188 struct iris_batch
*batch
,
189 struct pipe_debug_callback
*dbg
);
190 void (*upload_render_state
)(struct iris_context
*ice
,
191 struct iris_batch
*batch
,
192 const struct pipe_draw_info
*draw
);
193 unsigned (*derived_program_state_size
)(enum iris_program_cache_id id
);
194 void (*set_derived_program_state
)(const struct gen_device_info
*devinfo
,
195 enum iris_program_cache_id cache_id
,
196 struct iris_compiled_shader
*shader
);
197 void (*populate_vs_key
)(const struct iris_context
*ice
,
198 struct brw_vs_prog_key
*key
);
199 void (*populate_tcs_key
)(const struct iris_context
*ice
,
200 struct brw_tcs_prog_key
*key
);
201 void (*populate_tes_key
)(const struct iris_context
*ice
,
202 struct brw_tes_prog_key
*key
);
203 void (*populate_gs_key
)(const struct iris_context
*ice
,
204 struct brw_gs_prog_key
*key
);
205 void (*populate_fs_key
)(const struct iris_context
*ice
,
206 struct brw_wm_prog_key
*key
);
210 #define perf_debug(dbg, ...) do { \
211 if (INTEL_DEBUG & DEBUG_PERF) \
212 dbg_printf(__VA_ARGS__); \
214 pipe_debug_message(dbg, PERF_INFO, __VA_ARGS__); \
217 double get_time(void);
219 struct pipe_context
*
220 iris_create_context(struct pipe_screen
*screen
, void *priv
, unsigned flags
);
222 void iris_init_blit_functions(struct pipe_context
*ctx
);
223 void iris_init_clear_functions(struct pipe_context
*ctx
);
224 void iris_init_program_functions(struct pipe_context
*ctx
);
225 void iris_init_resource_functions(struct pipe_context
*ctx
);
226 void iris_init_query_functions(struct pipe_context
*ctx
);
227 void iris_update_compiled_shaders(struct iris_context
*ice
);
231 void iris_draw_vbo(struct pipe_context
*ctx
, const struct pipe_draw_info
*info
);
235 void gen9_init_state(struct iris_context
*ice
);
236 void gen10_init_state(struct iris_context
*ice
);
238 /* iris_program_cache.c */
240 void iris_init_program_cache(struct iris_context
*ice
);
241 void iris_destroy_program_cache(struct iris_context
*ice
);
242 void iris_print_program_cache(struct iris_context
*ice
);
243 bool iris_bind_cached_shader(struct iris_context
*ice
,
244 enum iris_program_cache_id cache_id
,
246 void iris_upload_and_bind_shader(struct iris_context
*ice
,
247 enum iris_program_cache_id cache_id
,
249 const void *assembly
,
250 struct brw_stage_prog_data
*prog_data
);
251 const void *iris_find_previous_compile(const struct iris_context
*ice
,
252 enum iris_program_cache_id cache_id
,
253 unsigned program_string_id
);