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220bd371ccb3f3bd1bd1cb58965bf8805b0fa7fc
[mesa.git] / src / gallium / drivers / iris / iris_formats.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 /**
24 * @file iris_formats.c
25 *
26 * Converts Gallium formats (PIPE_FORMAT_*) to hardware ones (ISL_FORMAT_*).
27 * Provides information about which formats support what features.
28 */
29
30 #include "util/bitscan.h"
31 #include "util/macros.h"
32 #include "util/u_format.h"
33
34 #include "iris_resource.h"
35 #include "iris_screen.h"
36
37 static enum isl_format
38 iris_isl_format_for_pipe_format(enum pipe_format pf)
39 {
40 static const enum isl_format table[PIPE_FORMAT_COUNT] = {
41 [0 ... PIPE_FORMAT_COUNT-1] = ISL_FORMAT_UNSUPPORTED,
42
43 [PIPE_FORMAT_B8G8R8A8_UNORM] = ISL_FORMAT_B8G8R8A8_UNORM,
44 [PIPE_FORMAT_B8G8R8X8_UNORM] = ISL_FORMAT_B8G8R8X8_UNORM,
45 //[PIPE_FORMAT_A8R8G8B8_UNORM] = ISL_FORMAT_A8R8G8B8_UNORM,
46 //[PIPE_FORMAT_X8R8G8B8_UNORM] = ISL_FORMAT_X8R8G8B8_UNORM,
47 [PIPE_FORMAT_B5G5R5A1_UNORM] = ISL_FORMAT_B5G5R5A1_UNORM,
48 [PIPE_FORMAT_B4G4R4A4_UNORM] = ISL_FORMAT_B4G4R4A4_UNORM,
49 [PIPE_FORMAT_B5G6R5_UNORM] = ISL_FORMAT_B5G6R5_UNORM,
50 [PIPE_FORMAT_R10G10B10A2_UNORM] = ISL_FORMAT_R10G10B10A2_UNORM,
51 //[PIPE_FORMAT_UYVY] = ISL_FORMAT_UYVY,
52 //[PIPE_FORMAT_YUYV] = ISL_FORMAT_YUYV,
53
54 [PIPE_FORMAT_Z16_UNORM] = ISL_FORMAT_R16_UNORM,
55 [PIPE_FORMAT_Z32_UNORM] = ISL_FORMAT_R32_UNORM,
56 [PIPE_FORMAT_Z32_FLOAT] = ISL_FORMAT_R32_FLOAT,
57
58 /* We translate the combined depth/stencil formats to depth only here */
59 [PIPE_FORMAT_Z24_UNORM_S8_UINT] = ISL_FORMAT_R24_UNORM_X8_TYPELESS,
60 [PIPE_FORMAT_Z24X8_UNORM] = ISL_FORMAT_R24_UNORM_X8_TYPELESS,
61 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT] = ISL_FORMAT_R32_FLOAT,
62
63 [PIPE_FORMAT_S8_UINT] = ISL_FORMAT_R8_UINT,
64 [PIPE_FORMAT_X24S8_UINT] = ISL_FORMAT_R8_UINT,
65 [PIPE_FORMAT_X32_S8X24_UINT] = ISL_FORMAT_R8_UINT,
66
67 [PIPE_FORMAT_R64_FLOAT] = ISL_FORMAT_R64_FLOAT,
68 [PIPE_FORMAT_R64G64_FLOAT] = ISL_FORMAT_R64G64_FLOAT,
69 [PIPE_FORMAT_R64G64B64_FLOAT] = ISL_FORMAT_R64G64B64_FLOAT,
70 [PIPE_FORMAT_R64G64B64A64_FLOAT] = ISL_FORMAT_R64G64B64A64_FLOAT,
71 [PIPE_FORMAT_R32_FLOAT] = ISL_FORMAT_R32_FLOAT,
72 [PIPE_FORMAT_R32G32_FLOAT] = ISL_FORMAT_R32G32_FLOAT,
73 [PIPE_FORMAT_R32G32B32_FLOAT] = ISL_FORMAT_R32G32B32_FLOAT,
74 [PIPE_FORMAT_R32G32B32A32_FLOAT] = ISL_FORMAT_R32G32B32A32_FLOAT,
75 [PIPE_FORMAT_R32_UNORM] = ISL_FORMAT_R32_UNORM,
76 [PIPE_FORMAT_R32G32_UNORM] = ISL_FORMAT_R32G32_UNORM,
77 [PIPE_FORMAT_R32G32B32_UNORM] = ISL_FORMAT_R32G32B32_UNORM,
78 [PIPE_FORMAT_R32G32B32A32_UNORM] = ISL_FORMAT_R32G32B32A32_UNORM,
79 [PIPE_FORMAT_R32_USCALED] = ISL_FORMAT_R32_USCALED,
80 [PIPE_FORMAT_R32G32_USCALED] = ISL_FORMAT_R32G32_USCALED,
81 [PIPE_FORMAT_R32G32B32_USCALED] = ISL_FORMAT_R32G32B32_USCALED,
82 [PIPE_FORMAT_R32G32B32A32_USCALED] = ISL_FORMAT_R32G32B32A32_USCALED,
83 [PIPE_FORMAT_R32_SNORM] = ISL_FORMAT_R32_SNORM,
84 [PIPE_FORMAT_R32G32_SNORM] = ISL_FORMAT_R32G32_SNORM,
85 [PIPE_FORMAT_R32G32B32_SNORM] = ISL_FORMAT_R32G32B32_SNORM,
86 [PIPE_FORMAT_R32G32B32A32_SNORM] = ISL_FORMAT_R32G32B32A32_SNORM,
87 [PIPE_FORMAT_R32_SSCALED] = ISL_FORMAT_R32_SSCALED,
88 [PIPE_FORMAT_R32G32_SSCALED] = ISL_FORMAT_R32G32_SSCALED,
89 [PIPE_FORMAT_R32G32B32_SSCALED] = ISL_FORMAT_R32G32B32_SSCALED,
90 [PIPE_FORMAT_R32G32B32A32_SSCALED] = ISL_FORMAT_R32G32B32A32_SSCALED,
91 [PIPE_FORMAT_R16_UNORM] = ISL_FORMAT_R16_UNORM,
92 [PIPE_FORMAT_R16G16_UNORM] = ISL_FORMAT_R16G16_UNORM,
93 [PIPE_FORMAT_R16G16B16_UNORM] = ISL_FORMAT_R16G16B16_UNORM,
94 [PIPE_FORMAT_R16G16B16A16_UNORM] = ISL_FORMAT_R16G16B16A16_UNORM,
95 [PIPE_FORMAT_R16_USCALED] = ISL_FORMAT_R16_USCALED,
96 [PIPE_FORMAT_R16G16_USCALED] = ISL_FORMAT_R16G16_USCALED,
97 [PIPE_FORMAT_R16G16B16_USCALED] = ISL_FORMAT_R16G16B16_USCALED,
98 [PIPE_FORMAT_R16G16B16A16_USCALED] = ISL_FORMAT_R16G16B16A16_USCALED,
99 [PIPE_FORMAT_R16_SNORM] = ISL_FORMAT_R16_SNORM,
100 [PIPE_FORMAT_R16G16_SNORM] = ISL_FORMAT_R16G16_SNORM,
101 [PIPE_FORMAT_R16G16B16_SNORM] = ISL_FORMAT_R16G16B16_SNORM,
102 [PIPE_FORMAT_R16G16B16A16_SNORM] = ISL_FORMAT_R16G16B16A16_SNORM,
103 [PIPE_FORMAT_R16_SSCALED] = ISL_FORMAT_R16_SSCALED,
104 [PIPE_FORMAT_R16G16_SSCALED] = ISL_FORMAT_R16G16_SSCALED,
105 [PIPE_FORMAT_R16G16B16_SSCALED] = ISL_FORMAT_R16G16B16_SSCALED,
106 [PIPE_FORMAT_R16G16B16A16_SSCALED] = ISL_FORMAT_R16G16B16A16_SSCALED,
107 [PIPE_FORMAT_R8_UNORM] = ISL_FORMAT_R8_UNORM,
108 [PIPE_FORMAT_R8G8_UNORM] = ISL_FORMAT_R8G8_UNORM,
109 [PIPE_FORMAT_R8G8B8_UNORM] = ISL_FORMAT_R8G8B8_UNORM,
110 [PIPE_FORMAT_R8G8B8A8_UNORM] = ISL_FORMAT_R8G8B8A8_UNORM,
111 //[PIPE_FORMAT_X8B8G8R8_UNORM] = ISL_FORMAT_X8B8G8R8_UNORM,
112 [PIPE_FORMAT_R8_USCALED] = ISL_FORMAT_R8_USCALED,
113 [PIPE_FORMAT_R8G8_USCALED] = ISL_FORMAT_R8G8_USCALED,
114 [PIPE_FORMAT_R8G8B8_USCALED] = ISL_FORMAT_R8G8B8_USCALED,
115 [PIPE_FORMAT_R8G8B8A8_USCALED] = ISL_FORMAT_R8G8B8A8_USCALED,
116 [PIPE_FORMAT_R8_SNORM] = ISL_FORMAT_R8_SNORM,
117 [PIPE_FORMAT_R8G8_SNORM] = ISL_FORMAT_R8G8_SNORM,
118 [PIPE_FORMAT_R8G8B8_SNORM] = ISL_FORMAT_R8G8B8_SNORM,
119 [PIPE_FORMAT_R8G8B8A8_SNORM] = ISL_FORMAT_R8G8B8A8_SNORM,
120 [PIPE_FORMAT_R8_SSCALED] = ISL_FORMAT_R8_SSCALED,
121 [PIPE_FORMAT_R8G8_SSCALED] = ISL_FORMAT_R8G8_SSCALED,
122 [PIPE_FORMAT_R8G8B8_SSCALED] = ISL_FORMAT_R8G8B8_SSCALED,
123 [PIPE_FORMAT_R8G8B8A8_SSCALED] = ISL_FORMAT_R8G8B8A8_SSCALED,
124 [PIPE_FORMAT_R32_FIXED] = ISL_FORMAT_R32_SFIXED,
125 [PIPE_FORMAT_R32G32_FIXED] = ISL_FORMAT_R32G32_SFIXED,
126 [PIPE_FORMAT_R32G32B32_FIXED] = ISL_FORMAT_R32G32B32_SFIXED,
127 [PIPE_FORMAT_R32G32B32A32_FIXED] = ISL_FORMAT_R32G32B32A32_SFIXED,
128 [PIPE_FORMAT_R16_FLOAT] = ISL_FORMAT_R16_FLOAT,
129 [PIPE_FORMAT_R16G16_FLOAT] = ISL_FORMAT_R16G16_FLOAT,
130 [PIPE_FORMAT_R16G16B16_FLOAT] = ISL_FORMAT_R16G16B16_FLOAT,
131 [PIPE_FORMAT_R16G16B16A16_FLOAT] = ISL_FORMAT_R16G16B16A16_FLOAT,
132
133 [PIPE_FORMAT_R8G8B8_SRGB] = ISL_FORMAT_R8G8B8_UNORM_SRGB,
134 //[PIPE_FORMAT_A8B8G8R8_SRGB] = ISL_FORMAT_A8B8G8R8_UNORM_SRGB,
135 //[PIPE_FORMAT_X8B8G8R8_SRGB] = ISL_FORMAT_X8B8G8R8_UNORM_SRGB,
136 [PIPE_FORMAT_B8G8R8A8_SRGB] = ISL_FORMAT_B8G8R8A8_UNORM_SRGB,
137 [PIPE_FORMAT_B8G8R8X8_SRGB] = ISL_FORMAT_B8G8R8X8_UNORM_SRGB,
138 //[PIPE_FORMAT_A8R8G8B8_SRGB] = ISL_FORMAT_A8R8G8B8_UNORM_SRGB,
139 //[PIPE_FORMAT_X8R8G8B8_SRGB] = ISL_FORMAT_X8R8G8B8_UNORM_SRGB,
140 [PIPE_FORMAT_R8G8B8A8_SRGB] = ISL_FORMAT_R8G8B8A8_UNORM_SRGB,
141
142 [PIPE_FORMAT_DXT1_RGB] = ISL_FORMAT_BC1_UNORM,
143 [PIPE_FORMAT_DXT1_RGBA] = ISL_FORMAT_BC1_UNORM,
144 [PIPE_FORMAT_DXT3_RGBA] = ISL_FORMAT_BC2_UNORM,
145 [PIPE_FORMAT_DXT5_RGBA] = ISL_FORMAT_BC3_UNORM,
146
147 [PIPE_FORMAT_DXT1_SRGB] = ISL_FORMAT_BC1_UNORM_SRGB,
148 [PIPE_FORMAT_DXT1_SRGBA] = ISL_FORMAT_BC1_UNORM_SRGB,
149 [PIPE_FORMAT_DXT3_SRGBA] = ISL_FORMAT_BC2_UNORM_SRGB,
150 [PIPE_FORMAT_DXT5_SRGBA] = ISL_FORMAT_BC3_UNORM_SRGB,
151
152 [PIPE_FORMAT_RGTC1_UNORM] = ISL_FORMAT_BC4_UNORM,
153 [PIPE_FORMAT_RGTC1_SNORM] = ISL_FORMAT_BC4_SNORM,
154 [PIPE_FORMAT_RGTC2_UNORM] = ISL_FORMAT_BC5_UNORM,
155 [PIPE_FORMAT_RGTC2_SNORM] = ISL_FORMAT_BC5_SNORM,
156
157 //[PIPE_FORMAT_R8G8_B8G8_UNORM] = ISL_FORMAT_R8G8_B8G8_UNORM,
158 //[PIPE_FORMAT_G8R8_G8B8_UNORM] = ISL_FORMAT_G8R8_G8B8_UNORM,
159
160 //[PIPE_FORMAT_R8SG8SB8UX8U_NORM] = ISL_FORMAT_R8SG8SB8UX8U_NORM,
161 //[PIPE_FORMAT_R5SG5SB6U_NORM] = ISL_FORMAT_R5SG5SB6U_NORM,
162
163 //[PIPE_FORMAT_A8B8G8R8_UNORM] = ISL_FORMAT_A8B8G8R8_UNORM,
164 [PIPE_FORMAT_B5G5R5X1_UNORM] = ISL_FORMAT_B5G5R5X1_UNORM,
165 [PIPE_FORMAT_R10G10B10A2_USCALED] = ISL_FORMAT_R10G10B10A2_USCALED,
166 [PIPE_FORMAT_R11G11B10_FLOAT] = ISL_FORMAT_R11G11B10_FLOAT,
167 [PIPE_FORMAT_R9G9B9E5_FLOAT] = ISL_FORMAT_R9G9B9E5_SHAREDEXP,
168 [PIPE_FORMAT_R1_UNORM] = ISL_FORMAT_R1_UNORM,
169 [PIPE_FORMAT_R10G10B10X2_USCALED] = ISL_FORMAT_R10G10B10X2_USCALED,
170 //[PIPE_FORMAT_R10G10B10X2_SNORM] = ISL_FORMAT_R10G10B10X2_SNORM,
171 [PIPE_FORMAT_B10G10R10A2_UNORM] = ISL_FORMAT_B10G10R10A2_UNORM,
172 //[PIPE_FORMAT_R10SG10SB10SA2U_NORM] = ISL_FORMAT_R10SG10SB10SA2U_NORM,
173 //[PIPE_FORMAT_R8G8Bx_SNORM] = ISL_FORMAT_R8G8Bx_SNORM,
174 [PIPE_FORMAT_R8G8B8X8_UNORM] = ISL_FORMAT_R8G8B8X8_UNORM,
175 //[PIPE_FORMAT_B4G4R4X4_UNORM] = ISL_FORMAT_B4G4R4X4_UNORM,
176
177 //[PIPE_FORMAT_B2G3R3_UNORM] = ISL_FORMAT_B2G3R3_UNORM,
178
179 //[PIPE_FORMAT_LATC1_UNORM] = ISL_FORMAT_LATC1_UNORM,
180 //[PIPE_FORMAT_LATC1_SNORM] = ISL_FORMAT_LATC1_SNORM,
181 //[PIPE_FORMAT_LATC2_UNORM] = ISL_FORMAT_LATC2_UNORM,
182 //[PIPE_FORMAT_LATC2_SNORM] = ISL_FORMAT_LATC2_SNORM,
183
184 #if 0
185 /* Leave these disabled for now, we'd need border color hacks and
186 * we don't currently have the surface format in that code...
187 */
188 //[PIPE_FORMAT_A8_UINT] = ISL_FORMAT_A8_UINT,
189 [PIPE_FORMAT_A8_UNORM] = ISL_FORMAT_A8_UNORM,
190 //[PIPE_FORMAT_A8_SINT] = ISL_FORMAT_A8_SINT,
191 //[PIPE_FORMAT_A8_SNORM] = ISL_FORMAT_A8_SNORM,
192 //[PIPE_FORMAT_A16_UINT] = ISL_FORMAT_A16_UINT,
193 [PIPE_FORMAT_A16_UNORM] = ISL_FORMAT_A16_UNORM,
194 //[PIPE_FORMAT_A16_SINT] = ISL_FORMAT_A16_SINT,
195 //[PIPE_FORMAT_A16_SNORM] = ISL_FORMAT_A16_SNORM,
196 [PIPE_FORMAT_A16_FLOAT] = ISL_FORMAT_A16_FLOAT,
197 //[PIPE_FORMAT_A32_UINT] = ISL_FORMAT_A32_UINT,
198 //[PIPE_FORMAT_A32_SINT] = ISL_FORMAT_A32_SINT,
199 [PIPE_FORMAT_A32_FLOAT] = ISL_FORMAT_A32_FLOAT,
200 #endif
201
202 /* Just use red formats for these - they're actually renderable,
203 * and faster to sample than the legacy L/I formats.
204 */
205 [PIPE_FORMAT_I8_UNORM] = ISL_FORMAT_R8_UNORM,
206 [PIPE_FORMAT_I8_UINT] = ISL_FORMAT_R8_UINT,
207 [PIPE_FORMAT_I8_SINT] = ISL_FORMAT_R8_SINT,
208 [PIPE_FORMAT_I8_SNORM] = ISL_FORMAT_R8_SNORM,
209 [PIPE_FORMAT_I16_UINT] = ISL_FORMAT_R16_UINT,
210 [PIPE_FORMAT_I16_UNORM] = ISL_FORMAT_R16_UNORM,
211 [PIPE_FORMAT_I16_SINT] = ISL_FORMAT_R16_SINT,
212 [PIPE_FORMAT_I16_SNORM] = ISL_FORMAT_R16_SNORM,
213 [PIPE_FORMAT_I16_FLOAT] = ISL_FORMAT_R16_FLOAT,
214 [PIPE_FORMAT_I32_UINT] = ISL_FORMAT_R32_UINT,
215 [PIPE_FORMAT_I32_SINT] = ISL_FORMAT_R32_SINT,
216 [PIPE_FORMAT_I32_FLOAT] = ISL_FORMAT_R32_FLOAT,
217
218 [PIPE_FORMAT_L8_UINT] = ISL_FORMAT_R8_UINT,
219 [PIPE_FORMAT_L8_UNORM] = ISL_FORMAT_R8_UNORM,
220 [PIPE_FORMAT_L8_SINT] = ISL_FORMAT_R8_SINT,
221 [PIPE_FORMAT_L8_SNORM] = ISL_FORMAT_R8_SNORM,
222 [PIPE_FORMAT_L16_UINT] = ISL_FORMAT_R16_UINT,
223 [PIPE_FORMAT_L16_UNORM] = ISL_FORMAT_R16_UNORM,
224 [PIPE_FORMAT_L16_SINT] = ISL_FORMAT_R16_SINT,
225 [PIPE_FORMAT_L16_SNORM] = ISL_FORMAT_R16_SNORM,
226 [PIPE_FORMAT_L16_FLOAT] = ISL_FORMAT_R16_FLOAT,
227 [PIPE_FORMAT_L32_UINT] = ISL_FORMAT_R32_UINT,
228 [PIPE_FORMAT_L32_SINT] = ISL_FORMAT_R32_SINT,
229 [PIPE_FORMAT_L32_FLOAT] = ISL_FORMAT_R32_FLOAT,
230
231 /* Sadly, there is no R8_SRGB format so we have to use luminance. */
232 [PIPE_FORMAT_L8_SRGB] = ISL_FORMAT_L8_UNORM_SRGB,
233
234 #if 0
235 /* Just fake these with RGBA at a higher level for now */
236 [PIPE_FORMAT_L8A8_UINT] = ISL_FORMAT_L8A8_UINT,
237 [PIPE_FORMAT_L8A8_UNORM] = ISL_FORMAT_L8A8_UNORM,
238 [PIPE_FORMAT_L8A8_SINT] = ISL_FORMAT_L8A8_SINT,
239 //[PIPE_FORMAT_L8A8_SNORM] = ISL_FORMAT_L8A8_SNORM,
240 //[PIPE_FORMAT_L16A16_UINT] = ISL_FORMAT_L16A16_UINT,
241 [PIPE_FORMAT_L16A16_UNORM] = ISL_FORMAT_L16A16_UNORM,
242 //[PIPE_FORMAT_L16A16_SINT] = ISL_FORMAT_L16A16_SINT,
243 //[PIPE_FORMAT_L16A16_SNORM] = ISL_FORMAT_L16A16_SNORM,
244 [PIPE_FORMAT_L16A16_FLOAT] = ISL_FORMAT_L16A16_FLOAT,
245 //[PIPE_FORMAT_L32A32_UINT] = ISL_FORMAT_L32A32_UINT,
246 //[PIPE_FORMAT_L32A32_SINT] = ISL_FORMAT_L32A32_SINT,
247 [PIPE_FORMAT_L32A32_FLOAT] = ISL_FORMAT_L32A32_FLOAT,
248
249 [PIPE_FORMAT_L8A8_SRGB] = ISL_FORMAT_L8A8_UNORM_SRGB,
250 #endif
251
252 //[PIPE_FORMAT_YV12] = ISL_FORMAT_YV12,
253 //[PIPE_FORMAT_YV16] = ISL_FORMAT_YV16,
254 //[PIPE_FORMAT_IYUV] = ISL_FORMAT_IYUV,
255 //[PIPE_FORMAT_NV12] = ISL_FORMAT_NV12,
256 //[PIPE_FORMAT_NV21] = ISL_FORMAT_NV21,
257
258 [PIPE_FORMAT_R10G10B10A2_SSCALED] = ISL_FORMAT_R10G10B10A2_SSCALED,
259 [PIPE_FORMAT_R10G10B10A2_SNORM] = ISL_FORMAT_R10G10B10A2_SNORM,
260
261 [PIPE_FORMAT_B10G10R10A2_USCALED] = ISL_FORMAT_B10G10R10A2_USCALED,
262 [PIPE_FORMAT_B10G10R10A2_SSCALED] = ISL_FORMAT_B10G10R10A2_SSCALED,
263 [PIPE_FORMAT_B10G10R10A2_SNORM] = ISL_FORMAT_B10G10R10A2_SNORM,
264
265 [PIPE_FORMAT_R8_UINT] = ISL_FORMAT_R8_UINT,
266 [PIPE_FORMAT_R8G8_UINT] = ISL_FORMAT_R8G8_UINT,
267 [PIPE_FORMAT_R8G8B8_UINT] = ISL_FORMAT_R8G8B8_UINT,
268 [PIPE_FORMAT_R8G8B8A8_UINT] = ISL_FORMAT_R8G8B8A8_UINT,
269
270 [PIPE_FORMAT_R8_SINT] = ISL_FORMAT_R8_SINT,
271 [PIPE_FORMAT_R8G8_SINT] = ISL_FORMAT_R8G8_SINT,
272 [PIPE_FORMAT_R8G8B8_SINT] = ISL_FORMAT_R8G8B8_SINT,
273 [PIPE_FORMAT_R8G8B8A8_SINT] = ISL_FORMAT_R8G8B8A8_SINT,
274
275 [PIPE_FORMAT_R16_UINT] = ISL_FORMAT_R16_UINT,
276 [PIPE_FORMAT_R16G16_UINT] = ISL_FORMAT_R16G16_UINT,
277 [PIPE_FORMAT_R16G16B16_UINT] = ISL_FORMAT_R16G16B16_UINT,
278 [PIPE_FORMAT_R16G16B16A16_UINT] = ISL_FORMAT_R16G16B16A16_UINT,
279
280 [PIPE_FORMAT_R16_SINT] = ISL_FORMAT_R16_SINT,
281 [PIPE_FORMAT_R16G16_SINT] = ISL_FORMAT_R16G16_SINT,
282 [PIPE_FORMAT_R16G16B16_SINT] = ISL_FORMAT_R16G16B16_SINT,
283 [PIPE_FORMAT_R16G16B16A16_SINT] = ISL_FORMAT_R16G16B16A16_SINT,
284
285 [PIPE_FORMAT_R32_UINT] = ISL_FORMAT_R32_UINT,
286 [PIPE_FORMAT_R32G32_UINT] = ISL_FORMAT_R32G32_UINT,
287 [PIPE_FORMAT_R32G32B32_UINT] = ISL_FORMAT_R32G32B32_UINT,
288 [PIPE_FORMAT_R32G32B32A32_UINT] = ISL_FORMAT_R32G32B32A32_UINT,
289
290 [PIPE_FORMAT_R32_SINT] = ISL_FORMAT_R32_SINT,
291 [PIPE_FORMAT_R32G32_SINT] = ISL_FORMAT_R32G32_SINT,
292 [PIPE_FORMAT_R32G32B32_SINT] = ISL_FORMAT_R32G32B32_SINT,
293 [PIPE_FORMAT_R32G32B32A32_SINT] = ISL_FORMAT_R32G32B32A32_SINT,
294
295 [PIPE_FORMAT_B10G10R10A2_UINT] = ISL_FORMAT_B10G10R10A2_UINT,
296
297 [PIPE_FORMAT_ETC1_RGB8] = ISL_FORMAT_ETC1_RGB8,
298
299 //[PIPE_FORMAT_R8G8_R8B8_UNORM] = ISL_FORMAT_R8G8_R8B8_UNORM,
300 //[PIPE_FORMAT_G8R8_B8R8_UNORM] = ISL_FORMAT_G8R8_B8R8_UNORM,
301
302 //[PIPE_FORMAT_R8G8B8X8_SNORM] = ISL_FORMAT_R8G8B8X8_SNORM,
303 [PIPE_FORMAT_R8G8B8X8_SRGB] = ISL_FORMAT_R8G8B8X8_UNORM_SRGB,
304 //[PIPE_FORMAT_R8G8B8X8_UINT] = ISL_FORMAT_R8G8B8X8_UINT,
305 //[PIPE_FORMAT_R8G8B8X8_SINT] = ISL_FORMAT_R8G8B8X8_SINT,
306 [PIPE_FORMAT_B10G10R10X2_UNORM] = ISL_FORMAT_B10G10R10X2_UNORM,
307 [PIPE_FORMAT_R16G16B16X16_UNORM] = ISL_FORMAT_R16G16B16X16_UNORM,
308 //[PIPE_FORMAT_R16G16B16X16_SNORM] = ISL_FORMAT_R16G16B16X16_SNORM,
309 [PIPE_FORMAT_R16G16B16X16_FLOAT] = ISL_FORMAT_R16G16B16X16_FLOAT,
310 //[PIPE_FORMAT_R16G16B16X16_UINT] = ISL_FORMAT_R16G16B16X16_UINT,
311 //[PIPE_FORMAT_R16G16B16X16_SINT] = ISL_FORMAT_R16G16B16X16_SINT,
312 [PIPE_FORMAT_R32G32B32X32_FLOAT] = ISL_FORMAT_R32G32B32X32_FLOAT,
313 //[PIPE_FORMAT_R32G32B32X32_UINT] = ISL_FORMAT_R32G32B32X32_UINT,
314 //[PIPE_FORMAT_R32G32B32X32_SINT] = ISL_FORMAT_R32G32B32X32_SINT,
315
316 [PIPE_FORMAT_R10G10B10A2_UINT] = ISL_FORMAT_R10G10B10A2_UINT,
317
318 [PIPE_FORMAT_B5G6R5_SRGB] = ISL_FORMAT_B5G6R5_UNORM_SRGB,
319
320 [PIPE_FORMAT_BPTC_RGBA_UNORM] = ISL_FORMAT_BC7_UNORM,
321 [PIPE_FORMAT_BPTC_SRGBA] = ISL_FORMAT_BC7_UNORM_SRGB,
322 [PIPE_FORMAT_BPTC_RGB_FLOAT] = ISL_FORMAT_BC6H_SF16,
323 [PIPE_FORMAT_BPTC_RGB_UFLOAT] = ISL_FORMAT_BC6H_UF16,
324
325 //[PIPE_FORMAT_G8R8_UNORM] = ISL_FORMAT_G8R8_UNORM,
326 //[PIPE_FORMAT_G8R8_SNORM] = ISL_FORMAT_G8R8_SNORM,
327 //[PIPE_FORMAT_G16R16_UNORM] = ISL_FORMAT_G16R16_UNORM,
328 //[PIPE_FORMAT_G16R16_SNORM] = ISL_FORMAT_G16R16_SNORM,
329
330 //[PIPE_FORMAT_A8B8G8R8_SNORM] = ISL_FORMAT_A8B8G8R8_SNORM,
331 //[PIPE_FORMAT_X8B8G8R8_SNORM] = ISL_FORMAT_X8B8G8R8_SNORM,
332
333 [PIPE_FORMAT_ETC2_RGB8] = ISL_FORMAT_ETC2_RGB8,
334 [PIPE_FORMAT_ETC2_SRGB8] = ISL_FORMAT_ETC2_SRGB8,
335 [PIPE_FORMAT_ETC2_RGB8A1] = ISL_FORMAT_ETC2_RGB8_PTA,
336 [PIPE_FORMAT_ETC2_SRGB8A1] = ISL_FORMAT_ETC2_SRGB8_PTA,
337 [PIPE_FORMAT_ETC2_RGBA8] = ISL_FORMAT_ETC2_EAC_RGBA8,
338 [PIPE_FORMAT_ETC2_SRGBA8] = ISL_FORMAT_ETC2_EAC_SRGB8_A8,
339 [PIPE_FORMAT_ETC2_R11_UNORM] = ISL_FORMAT_EAC_R11,
340 [PIPE_FORMAT_ETC2_R11_SNORM] = ISL_FORMAT_EAC_SIGNED_R11,
341 [PIPE_FORMAT_ETC2_RG11_UNORM] = ISL_FORMAT_EAC_RG11,
342 [PIPE_FORMAT_ETC2_RG11_SNORM] = ISL_FORMAT_EAC_SIGNED_RG11,
343
344
345 [PIPE_FORMAT_ASTC_4x4] = ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16,
346 [PIPE_FORMAT_ASTC_5x4] = ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16,
347 [PIPE_FORMAT_ASTC_5x5] = ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16,
348 [PIPE_FORMAT_ASTC_6x5] = ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16,
349 [PIPE_FORMAT_ASTC_6x6] = ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16,
350 [PIPE_FORMAT_ASTC_8x5] = ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16,
351 [PIPE_FORMAT_ASTC_8x6] = ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16,
352 [PIPE_FORMAT_ASTC_8x8] = ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16,
353 [PIPE_FORMAT_ASTC_10x5] = ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16,
354 [PIPE_FORMAT_ASTC_10x6] = ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16,
355 [PIPE_FORMAT_ASTC_10x8] = ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16,
356 [PIPE_FORMAT_ASTC_10x10] = ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16,
357 [PIPE_FORMAT_ASTC_12x10] = ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16,
358 [PIPE_FORMAT_ASTC_12x12] = ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16,
359
360 [PIPE_FORMAT_ASTC_4x4_SRGB] = ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB,
361 [PIPE_FORMAT_ASTC_5x4_SRGB] = ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB,
362 [PIPE_FORMAT_ASTC_5x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB,
363 [PIPE_FORMAT_ASTC_6x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB,
364 [PIPE_FORMAT_ASTC_6x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB,
365 [PIPE_FORMAT_ASTC_8x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB,
366 [PIPE_FORMAT_ASTC_8x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB,
367 [PIPE_FORMAT_ASTC_8x8_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB,
368 [PIPE_FORMAT_ASTC_10x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB,
369 [PIPE_FORMAT_ASTC_10x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB,
370 [PIPE_FORMAT_ASTC_10x8_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB,
371 [PIPE_FORMAT_ASTC_10x10_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB,
372 [PIPE_FORMAT_ASTC_12x10_SRGB] = ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB,
373 [PIPE_FORMAT_ASTC_12x12_SRGB] = ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB,
374
375 //[PIPE_FORMAT_P016] = ISL_FORMAT_P016,
376
377 //[PIPE_FORMAT_R10G10B10X2_UNORM] = ISL_FORMAT_R10G10B10X2_UNORM,
378 [PIPE_FORMAT_A1B5G5R5_UNORM] = ISL_FORMAT_A1B5G5R5_UNORM,
379 //[PIPE_FORMAT_X1B5G5R5_UNORM] = ISL_FORMAT_X1B5G5R5_UNORM,
380 };
381 assert(pf < PIPE_FORMAT_COUNT);
382 return table[pf];
383 }
384
385 static enum pipe_format
386 alpha_to_red(enum pipe_format pf)
387 {
388 switch (pf) {
389 case PIPE_FORMAT_A8_UNORM: return PIPE_FORMAT_R8_UNORM;
390 case PIPE_FORMAT_A16_UNORM: return PIPE_FORMAT_R16_UNORM;
391 case PIPE_FORMAT_A8_SNORM: return PIPE_FORMAT_R8_SNORM;
392 case PIPE_FORMAT_A16_SNORM: return PIPE_FORMAT_R16_SNORM;
393 case PIPE_FORMAT_A16_FLOAT: return PIPE_FORMAT_R16_FLOAT;
394 case PIPE_FORMAT_A32_FLOAT: return PIPE_FORMAT_R32_FLOAT;
395 case PIPE_FORMAT_A8_UINT: return PIPE_FORMAT_A8_UINT;
396 case PIPE_FORMAT_A8_SINT: return PIPE_FORMAT_A8_SINT;
397 case PIPE_FORMAT_A16_UINT: return PIPE_FORMAT_R16_UINT;
398 case PIPE_FORMAT_A16_SINT: return PIPE_FORMAT_R16_SINT;
399 case PIPE_FORMAT_A32_UINT: return PIPE_FORMAT_R32_UINT;
400 case PIPE_FORMAT_A32_SINT: return PIPE_FORMAT_R32_SINT;
401 default: return pf;
402 }
403 }
404
405 struct iris_format_info
406 iris_format_for_usage(const struct gen_device_info *devinfo,
407 enum pipe_format pformat,
408 isl_surf_usage_flags_t usage)
409 {
410 struct isl_swizzle swizzle = ISL_SWIZZLE_IDENTITY;
411
412 if ((usage & ISL_SURF_USAGE_TEXTURE_BIT) && !util_format_is_srgb(pformat)) {
413 if (util_format_is_intensity(pformat)) {
414 swizzle = ISL_SWIZZLE(RED, RED, RED, RED);
415 } else if (util_format_is_luminance(pformat)) {
416 swizzle = ISL_SWIZZLE(RED, RED, RED, ONE);
417 } else if (util_format_is_alpha(pformat)) {
418 pformat = alpha_to_red(pformat);
419 swizzle = ISL_SWIZZLE(ZERO, ZERO, ZERO, RED);
420 }
421 }
422
423 enum isl_format format = iris_isl_format_for_pipe_format(pformat);
424
425 /* Convert RGBX into RGBA for rendering or typed image access. */
426 if (isl_format_is_rgbx(format) &&
427 (((usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) &&
428 !isl_format_supports_rendering(devinfo, format)) ||
429 ((usage & ISL_SURF_USAGE_STORAGE_BIT) &&
430 !(isl_format_supports_typed_writes(devinfo, format) &&
431 isl_format_supports_typed_reads(devinfo, format))))) {
432 format = isl_format_rgbx_to_rgba(format);
433 }
434
435 return (struct iris_format_info) { .fmt = format, .swizzle = swizzle };
436 }
437
438 /**
439 * The pscreen->is_format_supported() driver hook.
440 *
441 * Returns true if the given format is supported for the given usage
442 * (PIPE_BIND_*) and sample count.
443 */
444 boolean
445 iris_is_format_supported(struct pipe_screen *pscreen,
446 enum pipe_format pformat,
447 enum pipe_texture_target target,
448 unsigned sample_count,
449 unsigned storage_sample_count,
450 unsigned usage)
451 {
452 struct iris_screen *screen = (struct iris_screen *) pscreen;
453 const struct gen_device_info *devinfo = &screen->devinfo;
454
455 // XXX: msaa max
456 if (sample_count > 16 || !util_is_power_of_two_or_zero(sample_count))
457 return false;
458
459 if (pformat == PIPE_FORMAT_NONE)
460 return true;
461
462 enum isl_format format = iris_isl_format_for_pipe_format(pformat);
463
464 if (format == ISL_FORMAT_UNSUPPORTED)
465 return false;
466
467 const struct isl_format_layout *fmtl = isl_format_get_layout(format);
468 const bool is_integer = isl_format_has_int_channel(format);
469 bool supported = true;
470
471 if (sample_count > 1)
472 supported &= isl_format_supports_multisampling(devinfo, format);
473
474 if (usage & PIPE_BIND_DEPTH_STENCIL) {
475 supported &= format == ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS ||
476 format == ISL_FORMAT_R32_FLOAT ||
477 format == ISL_FORMAT_R24_UNORM_X8_TYPELESS ||
478 format == ISL_FORMAT_R16_UNORM ||
479 format == ISL_FORMAT_R8_UINT;
480 }
481
482 if (usage & PIPE_BIND_RENDER_TARGET) {
483 supported &= isl_format_supports_rendering(devinfo, format);
484 if (!is_integer)
485 supported &= isl_format_supports_alpha_blending(devinfo, format);
486 }
487
488 if (usage & PIPE_BIND_SHADER_IMAGE) {
489 // XXX: allow untyped reads
490 supported &= isl_format_supports_typed_reads(devinfo, format) &&
491 isl_format_supports_typed_writes(devinfo, format);
492 }
493
494 if (usage & PIPE_BIND_SAMPLER_VIEW) {
495 supported &= isl_format_supports_sampling(devinfo, format);
496 if (!is_integer)
497 supported &= isl_format_supports_filtering(devinfo, format);
498
499 /* Don't advertise 3-component RGB formats. This ensures that they
500 * are renderable from an API perspective since the state tracker will
501 * fall back to RGBA or RGBX, which are renderable. We want to render
502 * internally for copies and blits, even if the application doesn't.
503 *
504 * We do need to advertise 32-bit RGB for texture buffers though.
505 */
506 supported &= fmtl->bpb != 24 && fmtl->bpb != 48 &&
507 (fmtl->bpb != 96 || target == PIPE_BUFFER);
508 }
509
510 if (usage & PIPE_BIND_VERTEX_BUFFER)
511 supported &= isl_format_supports_vertex_fetch(devinfo, format);
512
513 if (usage & PIPE_BIND_INDEX_BUFFER) {
514 supported &= format == ISL_FORMAT_R8_UINT ||
515 format == ISL_FORMAT_R16_UINT ||
516 format == ISL_FORMAT_R32_UINT;
517 }
518
519 if (usage & PIPE_BIND_CONSTANT_BUFFER) {
520 // XXX:
521 }
522
523 if (usage & PIPE_BIND_STREAM_OUTPUT) {
524 // XXX:
525 }
526
527 if (usage & PIPE_BIND_CURSOR) {
528 // XXX:
529 }
530
531 if (usage & PIPE_BIND_CUSTOM) {
532 // XXX:
533 }
534
535 if (usage & PIPE_BIND_SHADER_BUFFER) {
536 // XXX:
537 }
538
539 if (usage & PIPE_BIND_COMPUTE_RESOURCE) {
540 // XXX:
541 }
542
543 if (usage & PIPE_BIND_COMMAND_ARGS_BUFFER) {
544 // XXX:
545 }
546
547 if (usage & PIPE_BIND_QUERY_BUFFER) {
548 // XXX:
549 }
550
551 return supported;
552 }
553