2 * Copyright © 2017 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
24 * @file iris_formats.c
26 * Converts Gallium formats (PIPE_FORMAT_*) to hardware ones (ISL_FORMAT_*).
27 * Provides information about which formats support what features.
30 #include "util/bitscan.h"
31 #include "util/macros.h"
32 #include "util/format/u_format.h"
34 #include "iris_resource.h"
35 #include "iris_screen.h"
37 struct iris_format_info
38 iris_format_for_usage(const struct gen_device_info
*devinfo
,
39 enum pipe_format pformat
,
40 isl_surf_usage_flags_t usage
)
42 enum isl_format format
= isl_format_for_pipe_format(pformat
);
43 struct isl_swizzle swizzle
= ISL_SWIZZLE_IDENTITY
;
45 if (format
== ISL_FORMAT_UNSUPPORTED
)
46 return (struct iris_format_info
) { .fmt
= format
, .swizzle
= swizzle
};
48 const struct isl_format_layout
*fmtl
= isl_format_get_layout(format
);
50 if (!util_format_is_srgb(pformat
)) {
51 if (util_format_is_intensity(pformat
)) {
52 swizzle
= ISL_SWIZZLE(RED
, RED
, RED
, RED
);
53 } else if (util_format_is_luminance(pformat
)) {
54 swizzle
= ISL_SWIZZLE(RED
, RED
, RED
, ONE
);
55 } else if (util_format_is_luminance_alpha(pformat
)) {
56 swizzle
= ISL_SWIZZLE(RED
, RED
, RED
, GREEN
);
57 } else if (util_format_is_alpha(pformat
)) {
58 swizzle
= ISL_SWIZZLE(ZERO
, ZERO
, ZERO
, RED
);
62 /* When faking RGBX pipe formats with RGBA ISL formats, override alpha. */
63 if (!util_format_has_alpha(pformat
) && fmtl
->channels
.a
.type
!= ISL_VOID
) {
64 swizzle
= ISL_SWIZZLE(RED
, GREEN
, BLUE
, ONE
);
67 if ((usage
& ISL_SURF_USAGE_RENDER_TARGET_BIT
) &&
68 pformat
== PIPE_FORMAT_A8_UNORM
) {
69 /* Most of the hardware A/LA formats are not renderable, except
70 * for A8_UNORM. SURFACE_STATE's shader channel select fields
71 * cannot be used to swap RGB and A channels when rendering (as
72 * it could impact alpha blending), so we have to use the actual
73 * A8_UNORM format when rendering.
75 format
= ISL_FORMAT_A8_UNORM
;
76 swizzle
= ISL_SWIZZLE_IDENTITY
;
79 /* We choose RGBA over RGBX for rendering the hardware doesn't support
80 * rendering to RGBX. However, when this internal override is used on Gen9+,
81 * fast clears don't work correctly.
83 * i965 fixes this by pretending to not support RGBX formats, and the higher
84 * layers of Mesa pick the RGBA format instead. Gallium doesn't work that
85 * way, and might choose a different format, like BGRX instead of RGBX,
86 * which will also cause problems when sampling from a surface fast cleared
87 * as RGBX. So we always choose RGBA instead of RGBX explicitly
90 if (isl_format_is_rgbx(format
) &&
91 !isl_format_supports_rendering(devinfo
, format
)) {
92 format
= isl_format_rgbx_to_rgba(format
);
93 swizzle
= ISL_SWIZZLE(RED
, GREEN
, BLUE
, ONE
);
96 return (struct iris_format_info
) { .fmt
= format
, .swizzle
= swizzle
};
100 * The pscreen->is_format_supported() driver hook.
102 * Returns true if the given format is supported for the given usage
103 * (PIPE_BIND_*) and sample count.
106 iris_is_format_supported(struct pipe_screen
*pscreen
,
107 enum pipe_format pformat
,
108 enum pipe_texture_target target
,
109 unsigned sample_count
,
110 unsigned storage_sample_count
,
113 struct iris_screen
*screen
= (struct iris_screen
*) pscreen
;
114 const struct gen_device_info
*devinfo
= &screen
->devinfo
;
115 uint32_t max_samples
= devinfo
->gen
== 8 ? 8 : 16;
117 if (sample_count
> max_samples
||
118 !util_is_power_of_two_or_zero(sample_count
))
121 if (pformat
== PIPE_FORMAT_NONE
)
124 enum isl_format format
= isl_format_for_pipe_format(pformat
);
126 if (format
== ISL_FORMAT_UNSUPPORTED
)
129 const struct isl_format_layout
*fmtl
= isl_format_get_layout(format
);
130 const bool is_integer
= isl_format_has_int_channel(format
);
131 bool supported
= true;
133 if (sample_count
> 1)
134 supported
&= isl_format_supports_multisampling(devinfo
, format
);
136 if (usage
& PIPE_BIND_DEPTH_STENCIL
) {
137 supported
&= format
== ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS
||
138 format
== ISL_FORMAT_R32_FLOAT
||
139 format
== ISL_FORMAT_R24_UNORM_X8_TYPELESS
||
140 format
== ISL_FORMAT_R16_UNORM
||
141 format
== ISL_FORMAT_R8_UINT
;
144 if (usage
& PIPE_BIND_RENDER_TARGET
) {
145 /* Alpha and luminance-alpha formats other than A8_UNORM are not
146 * renderable. For texturing, we can use R or RG formats with
147 * shader channel selects (SCS) to swizzle the data into the correct
148 * channels. But for render targets, the hardware prohibits using
149 * SCS to move shader outputs between the RGB and A channels, as it
150 * would alter what data is used for alpha blending.
152 * For BLORP, we can apply the swizzle in the shader. But for
153 * general rendering, this would mean recompiling the shader, which
154 * we'd like to avoid doing. So we mark these formats non-renderable.
156 * We do support A8_UNORM as it's required and is renderable.
158 if (pformat
!= PIPE_FORMAT_A8_UNORM
&&
159 (util_format_is_alpha(pformat
) ||
160 util_format_is_luminance_alpha(pformat
)))
163 enum isl_format rt_format
= format
;
165 if (isl_format_is_rgbx(format
) &&
166 !isl_format_supports_rendering(devinfo
, format
))
167 rt_format
= isl_format_rgbx_to_rgba(format
);
169 supported
&= isl_format_supports_rendering(devinfo
, rt_format
);
172 supported
&= isl_format_supports_alpha_blending(devinfo
, rt_format
);
175 if (usage
& PIPE_BIND_SHADER_IMAGE
) {
176 /* Dataport doesn't support compression, and we can't resolve an MCS
177 * compressed surface. (Buffer images may have sample count of 0.)
179 supported
&= sample_count
== 0;
181 supported
&= isl_format_supports_typed_writes(devinfo
, format
);
182 supported
&= isl_has_matching_typed_storage_image_format(devinfo
, format
);
185 if (usage
& PIPE_BIND_SAMPLER_VIEW
) {
186 supported
&= isl_format_supports_sampling(devinfo
, format
);
188 supported
&= isl_format_supports_filtering(devinfo
, format
);
190 /* Don't advertise 3-component RGB formats for non-buffer textures.
191 * This ensures that they are renderable from an API perspective since
192 * the state tracker will fall back to RGBA or RGBX, which are
193 * renderable. We want to render internally for copies and blits,
194 * even if the application doesn't.
196 * Buffer textures don't need to be renderable, so we support real RGB.
197 * This is useful for PBO upload, and 32-bit RGB support is mandatory.
199 if (target
!= PIPE_BUFFER
)
200 supported
&= fmtl
->bpb
!= 24 && fmtl
->bpb
!= 48 && fmtl
->bpb
!= 96;
203 if (usage
& PIPE_BIND_VERTEX_BUFFER
)
204 supported
&= isl_format_supports_vertex_fetch(devinfo
, format
);
206 if (usage
& PIPE_BIND_INDEX_BUFFER
) {
207 supported
&= format
== ISL_FORMAT_R8_UINT
||
208 format
== ISL_FORMAT_R16_UINT
||
209 format
== ISL_FORMAT_R32_UINT
;
212 /* TODO: Support ASTC 5x5 on Gen9 properly. This means implementing
213 * a complex sampler workaround (see i965's gen9_apply_astc5x5_wa_flush).
214 * Without it, st/mesa will emulate ASTC 5x5 via uncompressed textures.
216 if (devinfo
->gen
== 9 && (format
== ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16
||
217 format
== ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB
))