2 * Copyright © 2017 Intel Corporation
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
24 * @file iris_formats.c
26 * Converts Gallium formats (PIPE_FORMAT_*) to hardware ones (ISL_FORMAT_*).
27 * Provides information about which formats support what features.
30 #include "util/bitscan.h"
31 #include "util/macros.h"
32 #include "util/u_format.h"
34 #include "iris_resource.h"
35 #include "iris_screen.h"
37 static enum isl_format
38 iris_isl_format_for_pipe_format(enum pipe_format pf
)
40 static const enum isl_format table
[PIPE_FORMAT_COUNT
] = {
41 [0 ... PIPE_FORMAT_COUNT
-1] = ISL_FORMAT_UNSUPPORTED
,
43 [PIPE_FORMAT_B8G8R8A8_UNORM
] = ISL_FORMAT_B8G8R8A8_UNORM
,
44 [PIPE_FORMAT_B8G8R8X8_UNORM
] = ISL_FORMAT_B8G8R8X8_UNORM
,
45 [PIPE_FORMAT_B5G5R5A1_UNORM
] = ISL_FORMAT_B5G5R5A1_UNORM
,
46 [PIPE_FORMAT_B4G4R4A4_UNORM
] = ISL_FORMAT_B4G4R4A4_UNORM
,
47 [PIPE_FORMAT_B5G6R5_UNORM
] = ISL_FORMAT_B5G6R5_UNORM
,
48 [PIPE_FORMAT_R10G10B10A2_UNORM
] = ISL_FORMAT_R10G10B10A2_UNORM
,
50 [PIPE_FORMAT_Z16_UNORM
] = ISL_FORMAT_R16_UNORM
,
51 [PIPE_FORMAT_Z32_UNORM
] = ISL_FORMAT_R32_UNORM
,
52 [PIPE_FORMAT_Z32_FLOAT
] = ISL_FORMAT_R32_FLOAT
,
54 /* We translate the combined depth/stencil formats to depth only here */
55 [PIPE_FORMAT_Z24_UNORM_S8_UINT
] = ISL_FORMAT_R24_UNORM_X8_TYPELESS
,
56 [PIPE_FORMAT_Z24X8_UNORM
] = ISL_FORMAT_R24_UNORM_X8_TYPELESS
,
57 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
] = ISL_FORMAT_R32_FLOAT
,
59 [PIPE_FORMAT_S8_UINT
] = ISL_FORMAT_R8_UINT
,
60 [PIPE_FORMAT_X24S8_UINT
] = ISL_FORMAT_R8_UINT
,
61 [PIPE_FORMAT_X32_S8X24_UINT
] = ISL_FORMAT_R8_UINT
,
63 [PIPE_FORMAT_R64_FLOAT
] = ISL_FORMAT_R64_FLOAT
,
64 [PIPE_FORMAT_R64G64_FLOAT
] = ISL_FORMAT_R64G64_FLOAT
,
65 [PIPE_FORMAT_R64G64B64_FLOAT
] = ISL_FORMAT_R64G64B64_FLOAT
,
66 [PIPE_FORMAT_R64G64B64A64_FLOAT
] = ISL_FORMAT_R64G64B64A64_FLOAT
,
67 [PIPE_FORMAT_R32_FLOAT
] = ISL_FORMAT_R32_FLOAT
,
68 [PIPE_FORMAT_R32G32_FLOAT
] = ISL_FORMAT_R32G32_FLOAT
,
69 [PIPE_FORMAT_R32G32B32_FLOAT
] = ISL_FORMAT_R32G32B32_FLOAT
,
70 [PIPE_FORMAT_R32G32B32A32_FLOAT
] = ISL_FORMAT_R32G32B32A32_FLOAT
,
71 [PIPE_FORMAT_R32_UNORM
] = ISL_FORMAT_R32_UNORM
,
72 [PIPE_FORMAT_R32G32_UNORM
] = ISL_FORMAT_R32G32_UNORM
,
73 [PIPE_FORMAT_R32G32B32_UNORM
] = ISL_FORMAT_R32G32B32_UNORM
,
74 [PIPE_FORMAT_R32G32B32A32_UNORM
] = ISL_FORMAT_R32G32B32A32_UNORM
,
75 [PIPE_FORMAT_R32_USCALED
] = ISL_FORMAT_R32_USCALED
,
76 [PIPE_FORMAT_R32G32_USCALED
] = ISL_FORMAT_R32G32_USCALED
,
77 [PIPE_FORMAT_R32G32B32_USCALED
] = ISL_FORMAT_R32G32B32_USCALED
,
78 [PIPE_FORMAT_R32G32B32A32_USCALED
] = ISL_FORMAT_R32G32B32A32_USCALED
,
79 [PIPE_FORMAT_R32_SNORM
] = ISL_FORMAT_R32_SNORM
,
80 [PIPE_FORMAT_R32G32_SNORM
] = ISL_FORMAT_R32G32_SNORM
,
81 [PIPE_FORMAT_R32G32B32_SNORM
] = ISL_FORMAT_R32G32B32_SNORM
,
82 [PIPE_FORMAT_R32G32B32A32_SNORM
] = ISL_FORMAT_R32G32B32A32_SNORM
,
83 [PIPE_FORMAT_R32_SSCALED
] = ISL_FORMAT_R32_SSCALED
,
84 [PIPE_FORMAT_R32G32_SSCALED
] = ISL_FORMAT_R32G32_SSCALED
,
85 [PIPE_FORMAT_R32G32B32_SSCALED
] = ISL_FORMAT_R32G32B32_SSCALED
,
86 [PIPE_FORMAT_R32G32B32A32_SSCALED
] = ISL_FORMAT_R32G32B32A32_SSCALED
,
87 [PIPE_FORMAT_R16_UNORM
] = ISL_FORMAT_R16_UNORM
,
88 [PIPE_FORMAT_R16G16_UNORM
] = ISL_FORMAT_R16G16_UNORM
,
89 [PIPE_FORMAT_R16G16B16_UNORM
] = ISL_FORMAT_R16G16B16_UNORM
,
90 [PIPE_FORMAT_R16G16B16A16_UNORM
] = ISL_FORMAT_R16G16B16A16_UNORM
,
91 [PIPE_FORMAT_R16_USCALED
] = ISL_FORMAT_R16_USCALED
,
92 [PIPE_FORMAT_R16G16_USCALED
] = ISL_FORMAT_R16G16_USCALED
,
93 [PIPE_FORMAT_R16G16B16_USCALED
] = ISL_FORMAT_R16G16B16_USCALED
,
94 [PIPE_FORMAT_R16G16B16A16_USCALED
] = ISL_FORMAT_R16G16B16A16_USCALED
,
95 [PIPE_FORMAT_R16_SNORM
] = ISL_FORMAT_R16_SNORM
,
96 [PIPE_FORMAT_R16G16_SNORM
] = ISL_FORMAT_R16G16_SNORM
,
97 [PIPE_FORMAT_R16G16B16_SNORM
] = ISL_FORMAT_R16G16B16_SNORM
,
98 [PIPE_FORMAT_R16G16B16A16_SNORM
] = ISL_FORMAT_R16G16B16A16_SNORM
,
99 [PIPE_FORMAT_R16_SSCALED
] = ISL_FORMAT_R16_SSCALED
,
100 [PIPE_FORMAT_R16G16_SSCALED
] = ISL_FORMAT_R16G16_SSCALED
,
101 [PIPE_FORMAT_R16G16B16_SSCALED
] = ISL_FORMAT_R16G16B16_SSCALED
,
102 [PIPE_FORMAT_R16G16B16A16_SSCALED
] = ISL_FORMAT_R16G16B16A16_SSCALED
,
103 [PIPE_FORMAT_R8_UNORM
] = ISL_FORMAT_R8_UNORM
,
104 [PIPE_FORMAT_R8G8_UNORM
] = ISL_FORMAT_R8G8_UNORM
,
105 [PIPE_FORMAT_R8G8B8_UNORM
] = ISL_FORMAT_R8G8B8_UNORM
,
106 [PIPE_FORMAT_R8G8B8A8_UNORM
] = ISL_FORMAT_R8G8B8A8_UNORM
,
107 [PIPE_FORMAT_R8_USCALED
] = ISL_FORMAT_R8_USCALED
,
108 [PIPE_FORMAT_R8G8_USCALED
] = ISL_FORMAT_R8G8_USCALED
,
109 [PIPE_FORMAT_R8G8B8_USCALED
] = ISL_FORMAT_R8G8B8_USCALED
,
110 [PIPE_FORMAT_R8G8B8A8_USCALED
] = ISL_FORMAT_R8G8B8A8_USCALED
,
111 [PIPE_FORMAT_R8_SNORM
] = ISL_FORMAT_R8_SNORM
,
112 [PIPE_FORMAT_R8G8_SNORM
] = ISL_FORMAT_R8G8_SNORM
,
113 [PIPE_FORMAT_R8G8B8_SNORM
] = ISL_FORMAT_R8G8B8_SNORM
,
114 [PIPE_FORMAT_R8G8B8A8_SNORM
] = ISL_FORMAT_R8G8B8A8_SNORM
,
115 [PIPE_FORMAT_R8_SSCALED
] = ISL_FORMAT_R8_SSCALED
,
116 [PIPE_FORMAT_R8G8_SSCALED
] = ISL_FORMAT_R8G8_SSCALED
,
117 [PIPE_FORMAT_R8G8B8_SSCALED
] = ISL_FORMAT_R8G8B8_SSCALED
,
118 [PIPE_FORMAT_R8G8B8A8_SSCALED
] = ISL_FORMAT_R8G8B8A8_SSCALED
,
119 [PIPE_FORMAT_R32_FIXED
] = ISL_FORMAT_R32_SFIXED
,
120 [PIPE_FORMAT_R32G32_FIXED
] = ISL_FORMAT_R32G32_SFIXED
,
121 [PIPE_FORMAT_R32G32B32_FIXED
] = ISL_FORMAT_R32G32B32_SFIXED
,
122 [PIPE_FORMAT_R32G32B32A32_FIXED
] = ISL_FORMAT_R32G32B32A32_SFIXED
,
123 [PIPE_FORMAT_R16_FLOAT
] = ISL_FORMAT_R16_FLOAT
,
124 [PIPE_FORMAT_R16G16_FLOAT
] = ISL_FORMAT_R16G16_FLOAT
,
125 [PIPE_FORMAT_R16G16B16_FLOAT
] = ISL_FORMAT_R16G16B16_FLOAT
,
126 [PIPE_FORMAT_R16G16B16A16_FLOAT
] = ISL_FORMAT_R16G16B16A16_FLOAT
,
128 [PIPE_FORMAT_R8G8B8_SRGB
] = ISL_FORMAT_R8G8B8_UNORM_SRGB
,
129 [PIPE_FORMAT_B8G8R8A8_SRGB
] = ISL_FORMAT_B8G8R8A8_UNORM_SRGB
,
130 [PIPE_FORMAT_B8G8R8X8_SRGB
] = ISL_FORMAT_B8G8R8X8_UNORM_SRGB
,
131 [PIPE_FORMAT_R8G8B8A8_SRGB
] = ISL_FORMAT_R8G8B8A8_UNORM_SRGB
,
133 [PIPE_FORMAT_DXT1_RGB
] = ISL_FORMAT_BC1_UNORM
,
134 [PIPE_FORMAT_DXT1_RGBA
] = ISL_FORMAT_BC1_UNORM
,
135 [PIPE_FORMAT_DXT3_RGBA
] = ISL_FORMAT_BC2_UNORM
,
136 [PIPE_FORMAT_DXT5_RGBA
] = ISL_FORMAT_BC3_UNORM
,
138 [PIPE_FORMAT_DXT1_SRGB
] = ISL_FORMAT_BC1_UNORM_SRGB
,
139 [PIPE_FORMAT_DXT1_SRGBA
] = ISL_FORMAT_BC1_UNORM_SRGB
,
140 [PIPE_FORMAT_DXT3_SRGBA
] = ISL_FORMAT_BC2_UNORM_SRGB
,
141 [PIPE_FORMAT_DXT5_SRGBA
] = ISL_FORMAT_BC3_UNORM_SRGB
,
143 [PIPE_FORMAT_RGTC1_UNORM
] = ISL_FORMAT_BC4_UNORM
,
144 [PIPE_FORMAT_RGTC1_SNORM
] = ISL_FORMAT_BC4_SNORM
,
145 [PIPE_FORMAT_RGTC2_UNORM
] = ISL_FORMAT_BC5_UNORM
,
146 [PIPE_FORMAT_RGTC2_SNORM
] = ISL_FORMAT_BC5_SNORM
,
148 [PIPE_FORMAT_R10G10B10A2_USCALED
] = ISL_FORMAT_R10G10B10A2_USCALED
,
149 [PIPE_FORMAT_R11G11B10_FLOAT
] = ISL_FORMAT_R11G11B10_FLOAT
,
150 [PIPE_FORMAT_R9G9B9E5_FLOAT
] = ISL_FORMAT_R9G9B9E5_SHAREDEXP
,
151 [PIPE_FORMAT_R1_UNORM
] = ISL_FORMAT_R1_UNORM
,
152 [PIPE_FORMAT_R10G10B10X2_USCALED
] = ISL_FORMAT_R10G10B10X2_USCALED
,
153 [PIPE_FORMAT_B10G10R10A2_UNORM
] = ISL_FORMAT_B10G10R10A2_UNORM
,
154 [PIPE_FORMAT_R8G8B8X8_UNORM
] = ISL_FORMAT_R8G8B8X8_UNORM
,
156 /* Just use red formats for these - they're actually renderable,
157 * and faster to sample than the legacy L/I/A/LA formats.
159 [PIPE_FORMAT_I8_UNORM
] = ISL_FORMAT_R8_UNORM
,
160 [PIPE_FORMAT_I8_UINT
] = ISL_FORMAT_R8_UINT
,
161 [PIPE_FORMAT_I8_SINT
] = ISL_FORMAT_R8_SINT
,
162 [PIPE_FORMAT_I8_SNORM
] = ISL_FORMAT_R8_SNORM
,
163 [PIPE_FORMAT_I16_UINT
] = ISL_FORMAT_R16_UINT
,
164 [PIPE_FORMAT_I16_UNORM
] = ISL_FORMAT_R16_UNORM
,
165 [PIPE_FORMAT_I16_SINT
] = ISL_FORMAT_R16_SINT
,
166 [PIPE_FORMAT_I16_SNORM
] = ISL_FORMAT_R16_SNORM
,
167 [PIPE_FORMAT_I16_FLOAT
] = ISL_FORMAT_R16_FLOAT
,
168 [PIPE_FORMAT_I32_UINT
] = ISL_FORMAT_R32_UINT
,
169 [PIPE_FORMAT_I32_SINT
] = ISL_FORMAT_R32_SINT
,
170 [PIPE_FORMAT_I32_FLOAT
] = ISL_FORMAT_R32_FLOAT
,
172 [PIPE_FORMAT_L8_UINT
] = ISL_FORMAT_R8_UINT
,
173 [PIPE_FORMAT_L8_UNORM
] = ISL_FORMAT_R8_UNORM
,
174 [PIPE_FORMAT_L8_SINT
] = ISL_FORMAT_R8_SINT
,
175 [PIPE_FORMAT_L8_SNORM
] = ISL_FORMAT_R8_SNORM
,
176 [PIPE_FORMAT_L16_UINT
] = ISL_FORMAT_R16_UINT
,
177 [PIPE_FORMAT_L16_UNORM
] = ISL_FORMAT_R16_UNORM
,
178 [PIPE_FORMAT_L16_SINT
] = ISL_FORMAT_R16_SINT
,
179 [PIPE_FORMAT_L16_SNORM
] = ISL_FORMAT_R16_SNORM
,
180 [PIPE_FORMAT_L16_FLOAT
] = ISL_FORMAT_R16_FLOAT
,
181 [PIPE_FORMAT_L32_UINT
] = ISL_FORMAT_R32_UINT
,
182 [PIPE_FORMAT_L32_SINT
] = ISL_FORMAT_R32_SINT
,
183 [PIPE_FORMAT_L32_FLOAT
] = ISL_FORMAT_R32_FLOAT
,
185 /* We also map alpha and luminance-alpha formats to red as well,
186 * though most of these (other than A8_UNORM) will be non-renderable.
188 [PIPE_FORMAT_A8_UINT
] = ISL_FORMAT_R8_UINT
,
189 [PIPE_FORMAT_A8_UNORM
] = ISL_FORMAT_R8_UNORM
,
190 [PIPE_FORMAT_A8_SINT
] = ISL_FORMAT_R8_SINT
,
191 [PIPE_FORMAT_A8_SNORM
] = ISL_FORMAT_R8_SNORM
,
192 [PIPE_FORMAT_A16_UINT
] = ISL_FORMAT_R16_UINT
,
193 [PIPE_FORMAT_A16_UNORM
] = ISL_FORMAT_R16_UNORM
,
194 [PIPE_FORMAT_A16_SINT
] = ISL_FORMAT_R16_SINT
,
195 [PIPE_FORMAT_A16_SNORM
] = ISL_FORMAT_R16_SNORM
,
196 [PIPE_FORMAT_A16_FLOAT
] = ISL_FORMAT_R16_FLOAT
,
197 [PIPE_FORMAT_A32_UINT
] = ISL_FORMAT_R32_UINT
,
198 [PIPE_FORMAT_A32_SINT
] = ISL_FORMAT_R32_SINT
,
199 [PIPE_FORMAT_A32_FLOAT
] = ISL_FORMAT_R32_FLOAT
,
201 [PIPE_FORMAT_L8A8_UINT
] = ISL_FORMAT_R8G8_UINT
,
202 [PIPE_FORMAT_L8A8_UNORM
] = ISL_FORMAT_R8G8_UNORM
,
203 [PIPE_FORMAT_L8A8_SINT
] = ISL_FORMAT_R8G8_SINT
,
204 [PIPE_FORMAT_L8A8_SNORM
] = ISL_FORMAT_R8G8_SNORM
,
205 [PIPE_FORMAT_L16A16_UINT
] = ISL_FORMAT_R16G16_UINT
,
206 [PIPE_FORMAT_L16A16_UNORM
] = ISL_FORMAT_R16G16_UNORM
,
207 [PIPE_FORMAT_L16A16_SINT
] = ISL_FORMAT_R16G16_SINT
,
208 [PIPE_FORMAT_L16A16_SNORM
] = ISL_FORMAT_R16G16_SNORM
,
209 [PIPE_FORMAT_L16A16_FLOAT
] = ISL_FORMAT_R16G16_FLOAT
,
210 [PIPE_FORMAT_L32A32_UINT
] = ISL_FORMAT_R32G32_UINT
,
211 [PIPE_FORMAT_L32A32_SINT
] = ISL_FORMAT_R32G32_SINT
,
212 [PIPE_FORMAT_L32A32_FLOAT
] = ISL_FORMAT_R32G32_FLOAT
,
214 /* Sadly, we have to use luminance[-alpha] formats for sRGB decoding. */
215 [PIPE_FORMAT_L8_SRGB
] = ISL_FORMAT_L8_UNORM_SRGB
,
216 [PIPE_FORMAT_L8A8_SRGB
] = ISL_FORMAT_L8A8_UNORM_SRGB
,
218 [PIPE_FORMAT_R10G10B10A2_SSCALED
] = ISL_FORMAT_R10G10B10A2_SSCALED
,
219 [PIPE_FORMAT_R10G10B10A2_SNORM
] = ISL_FORMAT_R10G10B10A2_SNORM
,
221 [PIPE_FORMAT_B10G10R10A2_USCALED
] = ISL_FORMAT_B10G10R10A2_USCALED
,
222 [PIPE_FORMAT_B10G10R10A2_SSCALED
] = ISL_FORMAT_B10G10R10A2_SSCALED
,
223 [PIPE_FORMAT_B10G10R10A2_SNORM
] = ISL_FORMAT_B10G10R10A2_SNORM
,
225 [PIPE_FORMAT_R8_UINT
] = ISL_FORMAT_R8_UINT
,
226 [PIPE_FORMAT_R8G8_UINT
] = ISL_FORMAT_R8G8_UINT
,
227 [PIPE_FORMAT_R8G8B8_UINT
] = ISL_FORMAT_R8G8B8_UINT
,
228 [PIPE_FORMAT_R8G8B8A8_UINT
] = ISL_FORMAT_R8G8B8A8_UINT
,
230 [PIPE_FORMAT_R8_SINT
] = ISL_FORMAT_R8_SINT
,
231 [PIPE_FORMAT_R8G8_SINT
] = ISL_FORMAT_R8G8_SINT
,
232 [PIPE_FORMAT_R8G8B8_SINT
] = ISL_FORMAT_R8G8B8_SINT
,
233 [PIPE_FORMAT_R8G8B8A8_SINT
] = ISL_FORMAT_R8G8B8A8_SINT
,
235 [PIPE_FORMAT_R16_UINT
] = ISL_FORMAT_R16_UINT
,
236 [PIPE_FORMAT_R16G16_UINT
] = ISL_FORMAT_R16G16_UINT
,
237 [PIPE_FORMAT_R16G16B16_UINT
] = ISL_FORMAT_R16G16B16_UINT
,
238 [PIPE_FORMAT_R16G16B16A16_UINT
] = ISL_FORMAT_R16G16B16A16_UINT
,
240 [PIPE_FORMAT_R16_SINT
] = ISL_FORMAT_R16_SINT
,
241 [PIPE_FORMAT_R16G16_SINT
] = ISL_FORMAT_R16G16_SINT
,
242 [PIPE_FORMAT_R16G16B16_SINT
] = ISL_FORMAT_R16G16B16_SINT
,
243 [PIPE_FORMAT_R16G16B16A16_SINT
] = ISL_FORMAT_R16G16B16A16_SINT
,
245 [PIPE_FORMAT_R32_UINT
] = ISL_FORMAT_R32_UINT
,
246 [PIPE_FORMAT_R32G32_UINT
] = ISL_FORMAT_R32G32_UINT
,
247 [PIPE_FORMAT_R32G32B32_UINT
] = ISL_FORMAT_R32G32B32_UINT
,
248 [PIPE_FORMAT_R32G32B32A32_UINT
] = ISL_FORMAT_R32G32B32A32_UINT
,
250 [PIPE_FORMAT_R32_SINT
] = ISL_FORMAT_R32_SINT
,
251 [PIPE_FORMAT_R32G32_SINT
] = ISL_FORMAT_R32G32_SINT
,
252 [PIPE_FORMAT_R32G32B32_SINT
] = ISL_FORMAT_R32G32B32_SINT
,
253 [PIPE_FORMAT_R32G32B32A32_SINT
] = ISL_FORMAT_R32G32B32A32_SINT
,
255 [PIPE_FORMAT_B10G10R10A2_UINT
] = ISL_FORMAT_B10G10R10A2_UINT
,
257 [PIPE_FORMAT_ETC1_RGB8
] = ISL_FORMAT_ETC1_RGB8
,
259 [PIPE_FORMAT_R8G8B8X8_SRGB
] = ISL_FORMAT_R8G8B8X8_UNORM_SRGB
,
260 [PIPE_FORMAT_B10G10R10X2_UNORM
] = ISL_FORMAT_B10G10R10X2_UNORM
,
261 [PIPE_FORMAT_R16G16B16X16_UNORM
] = ISL_FORMAT_R16G16B16X16_UNORM
,
262 [PIPE_FORMAT_R16G16B16X16_FLOAT
] = ISL_FORMAT_R16G16B16X16_FLOAT
,
263 [PIPE_FORMAT_R32G32B32X32_FLOAT
] = ISL_FORMAT_R32G32B32X32_FLOAT
,
265 [PIPE_FORMAT_R10G10B10A2_UINT
] = ISL_FORMAT_R10G10B10A2_UINT
,
267 [PIPE_FORMAT_B5G6R5_SRGB
] = ISL_FORMAT_B5G6R5_UNORM_SRGB
,
269 [PIPE_FORMAT_BPTC_RGBA_UNORM
] = ISL_FORMAT_BC7_UNORM
,
270 [PIPE_FORMAT_BPTC_SRGBA
] = ISL_FORMAT_BC7_UNORM_SRGB
,
271 [PIPE_FORMAT_BPTC_RGB_FLOAT
] = ISL_FORMAT_BC6H_SF16
,
272 [PIPE_FORMAT_BPTC_RGB_UFLOAT
] = ISL_FORMAT_BC6H_UF16
,
274 [PIPE_FORMAT_ETC2_RGB8
] = ISL_FORMAT_ETC2_RGB8
,
275 [PIPE_FORMAT_ETC2_SRGB8
] = ISL_FORMAT_ETC2_SRGB8
,
276 [PIPE_FORMAT_ETC2_RGB8A1
] = ISL_FORMAT_ETC2_RGB8_PTA
,
277 [PIPE_FORMAT_ETC2_SRGB8A1
] = ISL_FORMAT_ETC2_SRGB8_PTA
,
278 [PIPE_FORMAT_ETC2_RGBA8
] = ISL_FORMAT_ETC2_EAC_RGBA8
,
279 [PIPE_FORMAT_ETC2_SRGBA8
] = ISL_FORMAT_ETC2_EAC_SRGB8_A8
,
280 [PIPE_FORMAT_ETC2_R11_UNORM
] = ISL_FORMAT_EAC_R11
,
281 [PIPE_FORMAT_ETC2_R11_SNORM
] = ISL_FORMAT_EAC_SIGNED_R11
,
282 [PIPE_FORMAT_ETC2_RG11_UNORM
] = ISL_FORMAT_EAC_RG11
,
283 [PIPE_FORMAT_ETC2_RG11_SNORM
] = ISL_FORMAT_EAC_SIGNED_RG11
,
286 [PIPE_FORMAT_ASTC_4x4
] = ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16
,
287 [PIPE_FORMAT_ASTC_5x4
] = ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16
,
288 [PIPE_FORMAT_ASTC_5x5
] = ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16
,
289 [PIPE_FORMAT_ASTC_6x5
] = ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16
,
290 [PIPE_FORMAT_ASTC_6x6
] = ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16
,
291 [PIPE_FORMAT_ASTC_8x5
] = ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16
,
292 [PIPE_FORMAT_ASTC_8x6
] = ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16
,
293 [PIPE_FORMAT_ASTC_8x8
] = ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16
,
294 [PIPE_FORMAT_ASTC_10x5
] = ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16
,
295 [PIPE_FORMAT_ASTC_10x6
] = ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16
,
296 [PIPE_FORMAT_ASTC_10x8
] = ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16
,
297 [PIPE_FORMAT_ASTC_10x10
] = ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16
,
298 [PIPE_FORMAT_ASTC_12x10
] = ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16
,
299 [PIPE_FORMAT_ASTC_12x12
] = ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16
,
301 [PIPE_FORMAT_ASTC_4x4_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB
,
302 [PIPE_FORMAT_ASTC_5x4_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB
,
303 [PIPE_FORMAT_ASTC_5x5_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB
,
304 [PIPE_FORMAT_ASTC_6x5_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB
,
305 [PIPE_FORMAT_ASTC_6x6_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB
,
306 [PIPE_FORMAT_ASTC_8x5_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB
,
307 [PIPE_FORMAT_ASTC_8x6_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB
,
308 [PIPE_FORMAT_ASTC_8x8_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB
,
309 [PIPE_FORMAT_ASTC_10x5_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB
,
310 [PIPE_FORMAT_ASTC_10x6_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB
,
311 [PIPE_FORMAT_ASTC_10x8_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB
,
312 [PIPE_FORMAT_ASTC_10x10_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB
,
313 [PIPE_FORMAT_ASTC_12x10_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB
,
314 [PIPE_FORMAT_ASTC_12x12_SRGB
] = ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB
,
316 [PIPE_FORMAT_A1B5G5R5_UNORM
] = ISL_FORMAT_A1B5G5R5_UNORM
,
318 assert(pf
< PIPE_FORMAT_COUNT
);
322 struct iris_format_info
323 iris_format_for_usage(const struct gen_device_info
*devinfo
,
324 enum pipe_format pformat
,
325 isl_surf_usage_flags_t usage
)
327 enum isl_format format
= iris_isl_format_for_pipe_format(pformat
);
328 struct isl_swizzle swizzle
= ISL_SWIZZLE_IDENTITY
;
330 if (!util_format_is_srgb(pformat
)) {
331 if (util_format_is_intensity(pformat
)) {
332 swizzle
= ISL_SWIZZLE(RED
, RED
, RED
, RED
);
333 } else if (util_format_is_luminance(pformat
)) {
334 swizzle
= ISL_SWIZZLE(RED
, RED
, RED
, ONE
);
335 } else if (util_format_is_luminance_alpha(pformat
)) {
336 swizzle
= ISL_SWIZZLE(RED
, RED
, RED
, GREEN
);
337 } else if (util_format_is_alpha(pformat
)) {
338 swizzle
= ISL_SWIZZLE(ZERO
, ZERO
, ZERO
, RED
);
342 if (pformat
== PIPE_FORMAT_DXT1_RGB
||
343 pformat
== PIPE_FORMAT_DXT1_SRGB
) {
344 swizzle
= ISL_SWIZZLE(RED
, GREEN
, BLUE
, ONE
);
347 if ((usage
& ISL_SURF_USAGE_RENDER_TARGET_BIT
) &&
348 pformat
== PIPE_FORMAT_A8_UNORM
) {
349 /* Most of the hardware A/LA formats are not renderable, except
350 * for A8_UNORM. SURFACE_STATE's shader channel select fields
351 * cannot be used to swap RGB and A channels when rendering (as
352 * it could impact alpha blending), so we have to use the actual
353 * A8_UNORM format when rendering.
355 format
= ISL_FORMAT_A8_UNORM
;
356 swizzle
= ISL_SWIZZLE_IDENTITY
;
359 /* We choose RGBA over RGBX for rendering the hardware doesn't support
360 * rendering to RGBX. However, when this internal override is used on Gen9+,
361 * fast clears don't work correctly.
363 * i965 fixes this by pretending to not support RGBX formats, and the higher
364 * layers of Mesa pick the RGBA format instead. Gallium doesn't work that
365 * way, and might choose a different format, like BGRX instead of RGBX,
366 * which will also cause problems when sampling from a surface fast cleared
367 * as RGBX. So we always choose RGBA instead of RGBX explicitly
370 if (isl_format_is_rgbx(format
) &&
371 !isl_format_supports_rendering(devinfo
, format
)) {
372 format
= isl_format_rgbx_to_rgba(format
);
373 swizzle
= ISL_SWIZZLE(RED
, GREEN
, BLUE
, ONE
);
376 return (struct iris_format_info
) { .fmt
= format
, .swizzle
= swizzle
};
380 * The pscreen->is_format_supported() driver hook.
382 * Returns true if the given format is supported for the given usage
383 * (PIPE_BIND_*) and sample count.
386 iris_is_format_supported(struct pipe_screen
*pscreen
,
387 enum pipe_format pformat
,
388 enum pipe_texture_target target
,
389 unsigned sample_count
,
390 unsigned storage_sample_count
,
393 struct iris_screen
*screen
= (struct iris_screen
*) pscreen
;
394 const struct gen_device_info
*devinfo
= &screen
->devinfo
;
395 uint32_t max_samples
= devinfo
->gen
== 8 ? 8 : 16;
398 if (sample_count
> max_samples
|| !util_is_power_of_two_or_zero(sample_count
))
401 if (pformat
== PIPE_FORMAT_NONE
)
404 enum isl_format format
= iris_isl_format_for_pipe_format(pformat
);
406 if (format
== ISL_FORMAT_UNSUPPORTED
)
409 const struct isl_format_layout
*fmtl
= isl_format_get_layout(format
);
410 const bool is_integer
= isl_format_has_int_channel(format
);
411 bool supported
= true;
413 if (sample_count
> 1)
414 supported
&= isl_format_supports_multisampling(devinfo
, format
);
416 if (usage
& PIPE_BIND_DEPTH_STENCIL
) {
417 supported
&= format
== ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS
||
418 format
== ISL_FORMAT_R32_FLOAT
||
419 format
== ISL_FORMAT_R24_UNORM_X8_TYPELESS
||
420 format
== ISL_FORMAT_R16_UNORM
||
421 format
== ISL_FORMAT_R8_UINT
;
424 if (usage
& PIPE_BIND_RENDER_TARGET
) {
425 /* Alpha and luminance-alpha formats other than A8_UNORM are not
426 * renderable. For texturing, we can use R or RG formats with
427 * shader channel selects (SCS) to swizzle the data into the correct
428 * channels. But for render targets, the hardware prohibits using
429 * SCS to move shader outputs between the RGB and A channels, as it
430 * would alter what data is used for alpha blending.
432 * For BLORP, we can apply the swizzle in the shader. But for
433 * general rendering, this would mean recompiling the shader, which
434 * we'd like to avoid doing. So we mark these formats non-renderable.
436 * We do support A8_UNORM as it's required and is renderable.
438 if (pformat
!= PIPE_FORMAT_A8_UNORM
&&
439 (util_format_is_alpha(pformat
) ||
440 util_format_is_luminance_alpha(pformat
)))
443 enum isl_format rt_format
= format
;
445 if (isl_format_is_rgbx(format
) &&
446 !isl_format_supports_rendering(devinfo
, format
))
447 rt_format
= isl_format_rgbx_to_rgba(format
);
449 supported
&= isl_format_supports_rendering(devinfo
, rt_format
);
452 supported
&= isl_format_supports_alpha_blending(devinfo
, rt_format
);
455 if (usage
& PIPE_BIND_SHADER_IMAGE
) {
456 // XXX: allow untyped reads
457 supported
&= isl_format_supports_typed_reads(devinfo
, format
) &&
458 isl_format_supports_typed_writes(devinfo
, format
);
461 if (usage
& PIPE_BIND_SAMPLER_VIEW
) {
462 supported
&= isl_format_supports_sampling(devinfo
, format
);
464 supported
&= isl_format_supports_filtering(devinfo
, format
);
466 /* Don't advertise 3-component RGB formats. This ensures that they
467 * are renderable from an API perspective since the state tracker will
468 * fall back to RGBA or RGBX, which are renderable. We want to render
469 * internally for copies and blits, even if the application doesn't.
471 * We do need to advertise 32-bit RGB for texture buffers though.
473 supported
&= fmtl
->bpb
!= 24 && fmtl
->bpb
!= 48 &&
474 (fmtl
->bpb
!= 96 || target
== PIPE_BUFFER
);
477 if (usage
& PIPE_BIND_VERTEX_BUFFER
)
478 supported
&= isl_format_supports_vertex_fetch(devinfo
, format
);
480 if (usage
& PIPE_BIND_INDEX_BUFFER
) {
481 supported
&= format
== ISL_FORMAT_R8_UINT
||
482 format
== ISL_FORMAT_R16_UINT
||
483 format
== ISL_FORMAT_R32_UINT
;
486 if (usage
& PIPE_BIND_CONSTANT_BUFFER
) {
490 if (usage
& PIPE_BIND_STREAM_OUTPUT
) {
494 if (usage
& PIPE_BIND_CURSOR
) {
498 if (usage
& PIPE_BIND_CUSTOM
) {
502 if (usage
& PIPE_BIND_SHADER_BUFFER
) {
506 if (usage
& PIPE_BIND_COMPUTE_RESOURCE
) {
510 if (usage
& PIPE_BIND_COMMAND_ARGS_BUFFER
) {
514 if (usage
& PIPE_BIND_QUERY_BUFFER
) {