meson: add missing idep_nir_headers in iris_gen_libs
[mesa.git] / src / gallium / drivers / iris / iris_genx_macros.h
1 /*
2 * Copyright © 2019 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 /**
24 * Macro and function definitions needed in order to use genxml.
25 *
26 * This should only be included in sources compiled per-generation.
27 */
28
29 #include "iris_batch.h"
30
31 #define __gen_address_type struct iris_address
32 #define __gen_user_data struct iris_batch
33 #define __gen_combine_address iris_combine_address
34
35 static inline void *
36 __gen_get_batch_dwords(struct iris_batch *batch, unsigned dwords)
37 {
38 return iris_get_command_space(batch, dwords * sizeof(uint32_t));
39 }
40
41 static inline struct iris_address
42 __gen_address_offset(struct iris_address addr, uint64_t offset)
43 {
44 addr.offset += offset;
45 return addr;
46 }
47
48 static uint64_t
49 __gen_combine_address(struct iris_batch *batch, void *location,
50 struct iris_address addr, uint32_t delta)
51 {
52 uint64_t result = addr.offset + delta;
53
54 if (addr.bo) {
55 iris_use_pinned_bo(batch, addr.bo, addr.write);
56 /* Assume this is a general address, not relative to a base. */
57 result += addr.bo->gtt_offset;
58 }
59
60 return result;
61 }
62
63 #define __gen_address_type struct iris_address
64 #define __gen_user_data struct iris_batch
65
66 #define __genxml_cmd_length(cmd) cmd ## _length
67 #define __genxml_cmd_length_bias(cmd) cmd ## _length_bias
68 #define __genxml_cmd_header(cmd) cmd ## _header
69 #define __genxml_cmd_pack(cmd) cmd ## _pack
70
71 #include "genxml/genX_pack.h"
72 #include "genxml/gen_macros.h"
73 #include "genxml/genX_bits.h"
74
75 /* CS_GPR(15) is reserved for combining conditional rendering predicates
76 * with GL_ARB_indirect_parameters draw number predicates.
77 */
78 #define GEN_MI_BUILDER_NUM_ALLOC_GPRS 15
79 #include "common/gen_mi_builder.h"
80
81 #define _iris_pack_command(batch, cmd, dst, name) \
82 for (struct cmd name = { __genxml_cmd_header(cmd) }, \
83 *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
84 ({ __genxml_cmd_pack(cmd)(batch, (void *)_dst, &name); \
85 _dst = NULL; \
86 }))
87
88 #define iris_pack_command(cmd, dst, name) \
89 _iris_pack_command(NULL, cmd, dst, name)
90
91 #define iris_pack_state(cmd, dst, name) \
92 for (struct cmd name = {}, \
93 *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
94 __genxml_cmd_pack(cmd)(NULL, (void *)_dst, &name), \
95 _dst = NULL)
96
97 #define iris_emit_cmd(batch, cmd, name) \
98 _iris_pack_command(batch, cmd, __gen_get_batch_dwords(batch, __genxml_cmd_length(cmd)), name)
99
100 #define iris_emit_merge(batch, dwords0, dwords1, num_dwords) \
101 do { \
102 uint32_t *dw = __gen_get_batch_dwords(batch, num_dwords); \
103 for (uint32_t i = 0; i < num_dwords; i++) \
104 dw[i] = (dwords0)[i] | (dwords1)[i]; \
105 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, num_dwords)); \
106 } while (0)
107
108
109 /**
110 * iris_address constructor helpers:
111 *
112 * When using these to construct a CSO, pass NULL for \p bo, and manually
113 * pin the BO later. Otherwise, genxml's address handling will add the
114 * BO to the current batch's validation list at CSO creation time, rather
115 * than at draw time as desired.
116 */
117
118 UNUSED static struct iris_address
119 ro_bo(struct iris_bo *bo, uint64_t offset)
120 {
121 return (struct iris_address) { .bo = bo, .offset = offset };
122 }
123
124 UNUSED static struct iris_address
125 rw_bo(struct iris_bo *bo, uint64_t offset)
126 {
127 return (struct iris_address) { .bo = bo, .offset = offset, .write = true };
128 }