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24 * @file iris_resolve.c
26 * This file handles resolve tracking for main and auxiliary surfaces.
28 * It also handles our cache tracking. We have sets for the render cache,
29 * depth cache, and so on. If a BO is in a cache's set, then it may have
30 * data in that cache. The helpers take care of emitting flushes for
31 * render-to-texture, format reinterpretation issues, and other situations.
34 #include "util/hash_table.h"
36 #include "iris_context.h"
39 resolve_sampler_views(struct iris_batch
*batch
,
40 struct iris_shader_state
*shs
)
42 uint32_t views
= shs
->bound_sampler_views
;
45 const int i
= u_bit_scan(&views
);
46 struct iris_sampler_view
*isv
= shs
->textures
[i
];
47 struct iris_resource
*res
= (void *) isv
->base
.texture
;
50 iris_cache_flush_for_read(batch
, res
->bo
);
55 resolve_image_views(struct iris_batch
*batch
,
56 struct iris_shader_state
*shs
)
58 uint32_t views
= shs
->bound_image_views
;
61 const int i
= u_bit_scan(&views
);
62 struct pipe_resource
*res
= shs
->image
[i
].res
;
65 iris_cache_flush_for_read(batch
, iris_resource_bo(res
));
71 * \brief Resolve buffers before drawing.
73 * Resolve the depth buffer's HiZ buffer, resolve the depth buffer of each
74 * enabled depth texture, and flush the render cache for any dirty textures.
77 iris_predraw_resolve_inputs(struct iris_batch
*batch
,
78 struct iris_shader_state
*shs
)
80 resolve_sampler_views(batch
, shs
);
81 resolve_image_views(batch
, shs
);
85 iris_predraw_resolve_framebuffer(struct iris_context
*ice
,
86 struct iris_batch
*batch
)
88 struct pipe_framebuffer_state
*cso_fb
= &ice
->state
.framebuffer
;
89 struct pipe_surface
*zs_surf
= cso_fb
->zsbuf
;
95 for (unsigned i
= 0; i
< cso_fb
->nr_cbufs
; i
++) {
96 struct iris_surface
*surf
= (void *) cso_fb
->cbufs
[i
];
100 struct iris_resource
*res
= (void *) surf
->base
.texture
;
104 iris_cache_flush_for_render(batch
, res
->bo
, surf
->view
.format
,
110 * \brief Call this after drawing to mark which buffers need resolving
112 * If the depth buffer was written to and if it has an accompanying HiZ
113 * buffer, then mark that it needs a depth resolve.
115 * If the color buffer is a multisample window system buffer, then
116 * mark that it needs a downsample.
118 * Also mark any render targets which will be textured as needing a render
122 iris_postdraw_update_resolve_tracking(struct iris_context
*ice
,
123 struct iris_batch
*batch
)
125 struct pipe_framebuffer_state
*cso_fb
= &ice
->state
.framebuffer
;
126 struct pipe_surface
*zs_surf
= cso_fb
->zsbuf
;
128 // XXX: front buffer drawing?
131 struct iris_resource
*z_res
, *s_res
;
132 iris_get_depth_stencil_resources(zs_surf
->texture
, &z_res
, &s_res
);
137 if (ice
->state
.depth_writes_enabled
)
138 iris_depth_cache_add_bo(batch
, z_res
->bo
);
144 if (ice
->state
.stencil_writes_enabled
)
145 iris_depth_cache_add_bo(batch
, s_res
->bo
);
149 for (unsigned i
= 0; i
< cso_fb
->nr_cbufs
; i
++) {
150 struct iris_surface
*surf
= (void *) cso_fb
->cbufs
[i
];
154 struct iris_resource
*res
= (void *) surf
->base
.texture
;
157 iris_render_cache_add_bo(batch
, res
->bo
, surf
->view
.format
,
163 * Clear the cache-tracking sets.
166 iris_cache_sets_clear(struct iris_batch
*batch
)
168 hash_table_foreach(batch
->cache
.render
, render_entry
)
169 _mesa_hash_table_remove(batch
->cache
.render
, render_entry
);
171 set_foreach(batch
->cache
.depth
, depth_entry
)
172 _mesa_set_remove(batch
->cache
.depth
, depth_entry
);
176 * Emits an appropriate flush for a BO if it has been rendered to within the
177 * same batchbuffer as a read that's about to be emitted.
179 * The GPU has separate, incoherent caches for the render cache and the
180 * sampler cache, along with other caches. Usually data in the different
181 * caches don't interact (e.g. we don't render to our driver-generated
182 * immediate constant data), but for render-to-texture in FBOs we definitely
183 * do. When a batchbuffer is flushed, the kernel will ensure that everything
184 * necessary is flushed before another use of that BO, but for reuse from
185 * different caches within a batchbuffer, it's all our responsibility.
188 iris_flush_depth_and_render_caches(struct iris_batch
*batch
)
190 iris_emit_pipe_control_flush(batch
,
191 PIPE_CONTROL_DEPTH_CACHE_FLUSH
|
192 PIPE_CONTROL_RENDER_TARGET_FLUSH
|
193 PIPE_CONTROL_CS_STALL
);
195 iris_emit_pipe_control_flush(batch
,
196 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
|
197 PIPE_CONTROL_CONST_CACHE_INVALIDATE
);
199 iris_cache_sets_clear(batch
);
203 iris_cache_flush_for_read(struct iris_batch
*batch
,
206 if (_mesa_hash_table_search_pre_hashed(batch
->cache
.render
, bo
->hash
, bo
) ||
207 _mesa_set_search_pre_hashed(batch
->cache
.depth
, bo
->hash
, bo
))
208 iris_flush_depth_and_render_caches(batch
);
212 format_aux_tuple(enum isl_format format
, enum isl_aux_usage aux_usage
)
214 return (void *)(uintptr_t)((uint32_t)format
<< 8 | aux_usage
);
218 iris_cache_flush_for_render(struct iris_batch
*batch
,
220 enum isl_format format
,
221 enum isl_aux_usage aux_usage
)
223 if (_mesa_set_search_pre_hashed(batch
->cache
.depth
, bo
->hash
, bo
))
224 iris_flush_depth_and_render_caches(batch
);
226 /* Check to see if this bo has been used by a previous rendering operation
227 * but with a different format or aux usage. If it has, flush the render
228 * cache so we ensure that it's only in there with one format or aux usage
231 * Even though it's not obvious, this can easily happen in practice.
232 * Suppose a client is blending on a surface with sRGB encode enabled on
233 * gen9. This implies that you get AUX_USAGE_CCS_D at best. If the client
234 * then disables sRGB decode and continues blending we will flip on
235 * AUX_USAGE_CCS_E without doing any sort of resolve in-between (this is
236 * perfectly valid since CCS_E is a subset of CCS_D). However, this means
237 * that we have fragments in-flight which are rendering with UNORM+CCS_E
238 * and other fragments in-flight with SRGB+CCS_D on the same surface at the
239 * same time and the pixel scoreboard and color blender are trying to sort
240 * it all out. This ends badly (i.e. GPU hangs).
242 * To date, we have never observed GPU hangs or even corruption to be
243 * associated with switching the format, only the aux usage. However,
244 * there are comments in various docs which indicate that the render cache
245 * isn't 100% resilient to format changes. We may as well be conservative
246 * and flush on format changes too. We can always relax this later if we
247 * find it to be a performance problem.
249 struct hash_entry
*entry
=
250 _mesa_hash_table_search_pre_hashed(batch
->cache
.render
, bo
->hash
, bo
);
251 if (entry
&& entry
->data
!= format_aux_tuple(format
, aux_usage
))
252 iris_flush_depth_and_render_caches(batch
);
256 iris_render_cache_add_bo(struct iris_batch
*batch
,
258 enum isl_format format
,
259 enum isl_aux_usage aux_usage
)
262 struct hash_entry
*entry
=
263 _mesa_hash_table_search_pre_hashed(batch
->cache
.render
, bo
->hash
, bo
);
265 /* Otherwise, someone didn't do a flush_for_render and that would be
268 assert(entry
->data
== format_aux_tuple(format
, aux_usage
));
272 _mesa_hash_table_insert_pre_hashed(batch
->cache
.render
, bo
->hash
, bo
,
273 format_aux_tuple(format
, aux_usage
));
277 iris_cache_flush_for_depth(struct iris_batch
*batch
,
280 if (_mesa_hash_table_search_pre_hashed(batch
->cache
.render
, bo
->hash
, bo
))
281 iris_flush_depth_and_render_caches(batch
);
285 iris_depth_cache_add_bo(struct iris_batch
*batch
, struct iris_bo
*bo
)
287 _mesa_set_add_pre_hashed(batch
->cache
.depth
, bo
->hash
, bo
);