2 * Copyright 2017 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
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9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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23 #ifndef IRIS_RESOURCE_H
24 #define IRIS_RESOURCE_H
26 #include "pipe/p_state.h"
27 #include "util/u_inlines.h"
28 #include "intel/isl/isl.h"
33 struct iris_format_info
{
35 struct isl_swizzle swizzle
;
38 #define IRIS_RESOURCE_FLAG_SHADER_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
39 #define IRIS_RESOURCE_FLAG_SURFACE_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
40 #define IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
43 * Resources represent a GPU buffer object or image (mipmap tree).
45 * They contain the storage (BO) and layout information (ISL surface).
47 struct iris_resource
{
48 struct pipe_resource base
;
49 enum pipe_format internal_format
;
52 * The ISL surface layout information for this resource.
54 * This is not filled out for PIPE_BUFFER resources, but is guaranteed
55 * to be zeroed. Note that this also guarantees that res->surf.tiling
56 * will be ISL_TILING_LINEAR, so it's safe to check that.
60 /** Backing storage for the resource */
64 * A bitfield of PIPE_BIND_* indicating how this resource was bound
65 * in the past. Only meaningful for PIPE_BUFFER; used for flushing.
67 unsigned bind_history
;
71 * A simple <resource, offset> tuple for storing a reference to a
72 * piece of state stored in a GPU buffer object.
74 struct iris_state_ref
{
75 struct pipe_resource
*res
;
80 * Gallium CSO for sampler views (texture views).
82 * In addition to the normal pipe_resource, this adds an ISL view
83 * which may reinterpret the format or restrict levels/layers.
85 * These can also be linear texture buffers.
87 struct iris_sampler_view
{
88 struct pipe_sampler_view base
;
91 /* A short-cut (not a reference) to the actual resource being viewed.
92 * Multi-planar (or depth+stencil) images may have multiple resources
93 * chained together; this skips having to traverse base->texture->*.
95 struct iris_resource
*res
;
97 /** The resource (BO) holding our SURFACE_STATE. */
98 struct iris_state_ref surface_state
;
102 * Gallium CSO for surfaces (framebuffer attachments).
104 * A view of a surface that can be bound to a color render target or
105 * depth/stencil attachment.
107 struct iris_surface
{
108 struct pipe_surface base
;
109 struct isl_view view
;
111 /** The resource (BO) holding our SURFACE_STATE. */
112 struct iris_state_ref surface_state
;
116 * Transfer object - information about a buffer mapping.
118 struct iris_transfer
{
119 struct pipe_transfer base
;
120 struct pipe_debug_callback
*dbg
;
124 void (*unmap
)(struct iris_transfer
*);
128 * Unwrap a pipe_resource to get the underlying iris_bo (for convenience).
130 static inline struct iris_bo
*
131 iris_resource_bo(struct pipe_resource
*p_res
)
133 struct iris_resource
*res
= (void *) p_res
;
137 struct iris_format_info
iris_format_for_usage(const struct gen_device_info
*,
139 isl_surf_usage_flags_t usage
);
141 struct pipe_resource
*iris_resource_get_separate_stencil(struct pipe_resource
*);
143 void iris_get_depth_stencil_resources(struct pipe_resource
*res
,
144 struct iris_resource
**out_z
,
145 struct iris_resource
**out_s
);
147 void iris_init_screen_resource_functions(struct pipe_screen
*pscreen
);
149 void iris_flush_and_dirty_for_history(struct iris_context
*ice
,
150 struct iris_batch
*batch
,
151 struct iris_resource
*res
);