src/gallium/drivers/iris/iris_screen.h

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #ifndef IRIS_SCREEN_H
  24 #define IRIS_SCREEN_H
  25
  26 #include "pipe/p_screen.h"
  27 #include "state_tracker/drm_driver.h"
  28 #include "util/slab.h"
  29 #include "util/u_screen.h"
  30 #include "intel/dev/gen_device_info.h"
  31 #include "intel/isl/isl.h"
  32 #include "iris_bufmgr.h"
  33
  34 struct iris_bo;
  35
  36 #define READ_ONCE(x) (*(volatile __typeof__(x) *)&(x))
  37 #define WRITE_ONCE(x, v) *(volatile __typeof__(x) *)&(x) = (v)
  38
  39 #define IRIS_MAX_TEXTURE_SAMPLERS 32
  40 #define IRIS_MAX_SOL_BUFFERS 4
  41 #define IRIS_MAP_BUFFER_ALIGNMENT 64
  42
  43 struct iris_screen {
  44    struct pipe_screen base;
  45
  46    /** Global slab allocator for iris_transfer_map objects */
  47    struct slab_parent_pool transfer_pool;
  48
  49    /** drm device file descriptor */
  50    int fd;
  51
  52    /** PCI ID for our GPU device */
  53    int pci_id;
  54
  55    /** Global program_string_id counter (see get_program_string_id()) */
  56    unsigned program_id;
  57
  58    /** Precompile shaders at link time?  (Can be disabled for debugging.) */
  59    bool precompile;
  60
  61    unsigned subslice_total;
  62
  63    struct gen_device_info devinfo;
  64    struct isl_device isl_dev;
  65    struct iris_bufmgr *bufmgr;
  66    struct brw_compiler *compiler;
  67
  68    /**
  69     * A buffer containing nothing useful, for hardware workarounds that
  70     * require scratch writes or reads from some unimportant memory.
  71     */
  72    struct iris_bo *workaround_bo;
  73 };
  74
  75 struct pipe_screen *iris_screen_create(int fd);
  76
  77 boolean
  78 iris_is_format_supported(struct pipe_screen *pscreen,
  79                          enum pipe_format format,
  80                          enum pipe_texture_target target,
  81                          unsigned sample_count,
  82                          unsigned storage_sample_count,
  83                          unsigned usage);
  84
  85 #endif