lima/ppir: clone uniforms and load_coords into each successor
[mesa.git] / src / gallium / drivers / lima / ir / pp / lower.c
1 /*
2 * Copyright (c) 2017 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include "util/bitscan.h"
26 #include "util/ralloc.h"
27
28 #include "ppir.h"
29
30 static bool ppir_lower_const(ppir_block *block, ppir_node *node)
31 {
32 if (ppir_node_is_root(node)) {
33 ppir_node_delete(node);
34 return true;
35 }
36
37 assert(ppir_node_has_single_succ(node));
38
39 ppir_node *succ = ppir_node_first_succ(node);
40 ppir_src *src = ppir_node_get_src_for_pred(succ, node);
41 ppir_dest *dest = ppir_node_get_dest(node);
42 assert(src != NULL);
43
44 switch (succ->type) {
45 case ppir_node_type_alu:
46 case ppir_node_type_branch:
47 /* ALU and branch can consume consts directly */
48 dest->type = src->type = ppir_target_pipeline;
49 /* Reg will be updated in node_to_instr later */
50 dest->pipeline = src->pipeline = ppir_pipeline_reg_const0;
51 return true;
52 default:
53 /* Create a move for everyone else */
54 break;
55 }
56
57 ppir_node *move = ppir_node_insert_mov(node);
58 if (unlikely(!move))
59 return false;
60
61 ppir_debug("lower const create move %d for %d\n",
62 move->index, node->index);
63
64 /* Need to be careful with changing src/dst type here:
65 * it has to be done *after* successors have their children
66 * replaced, otherwise ppir_node_replace_child() won't find
67 * matching src/dst and as result won't work
68 */
69 ppir_src *mov_src = ppir_node_get_src(move, 0);
70 mov_src->type = dest->type = ppir_target_pipeline;
71 mov_src->pipeline = dest->pipeline = ppir_pipeline_reg_const0;
72
73 return true;
74 }
75
76 static bool ppir_lower_swap_args(ppir_block *block, ppir_node *node)
77 {
78 /* swapped op must be the next op */
79 node->op++;
80
81 assert(node->type == ppir_node_type_alu);
82 ppir_alu_node *alu = ppir_node_to_alu(node);
83 assert(alu->num_src == 2);
84
85 ppir_src tmp = alu->src[0];
86 alu->src[0] = alu->src[1];
87 alu->src[1] = tmp;
88 return true;
89 }
90
91 static bool ppir_lower_load(ppir_block *block, ppir_node *node)
92 {
93 ppir_dest *dest = ppir_node_get_dest(node);
94 if (ppir_node_is_root(node) && dest->type == ppir_target_ssa) {
95 ppir_node_delete(node);
96 return true;
97 }
98
99 assert(ppir_node_has_single_succ(node) || ppir_node_is_root(node));
100 ppir_node *succ = ppir_node_first_succ(node);
101 if (dest->type != ppir_target_register) {
102 switch (succ->type) {
103 case ppir_node_type_alu:
104 case ppir_node_type_branch: {
105 ppir_src *src = ppir_node_get_src_for_pred(succ, node);
106 /* Can consume uniforms directly */
107 src->type = dest->type = ppir_target_pipeline;
108 src->pipeline = dest->pipeline = ppir_pipeline_reg_uniform;
109 return true;
110 }
111 default:
112 /* Create mov for everyone else */
113 break;
114 }
115 }
116
117 ppir_node *move = ppir_node_insert_mov(node);
118 if (unlikely(!move))
119 return false;
120
121 ppir_src *mov_src = ppir_node_get_src(move, 0);
122 mov_src->type = dest->type = ppir_target_pipeline;
123 mov_src->pipeline = dest->pipeline = ppir_pipeline_reg_uniform;
124
125 return true;
126 }
127
128 static bool ppir_lower_ddxy(ppir_block *block, ppir_node *node)
129 {
130 assert(node->type == ppir_node_type_alu);
131 ppir_alu_node *alu = ppir_node_to_alu(node);
132
133 alu->src[1] = alu->src[0];
134 if (node->op == ppir_op_ddx)
135 alu->src[1].negate = !alu->src[1].negate;
136 else if (node->op == ppir_op_ddy)
137 alu->src[0].negate = !alu->src[0].negate;
138 else
139 assert(0);
140
141 alu->num_src = 2;
142
143 return true;
144 }
145
146 static bool ppir_lower_texture(ppir_block *block, ppir_node *node)
147 {
148 ppir_load_texture_node *load_tex = ppir_node_to_load_texture(node);
149 ppir_dest *dest = ppir_node_get_dest(node);
150
151 if (ppir_node_is_root(node) && dest->type == ppir_target_ssa) {
152 ppir_node_delete(node);
153 return true;
154 }
155
156 ppir_node *src_coords = ppir_node_get_src(node, 0)->node;
157 ppir_load_node *load = NULL;
158 if (src_coords && ppir_node_has_single_succ(src_coords) &&
159 (src_coords->op == ppir_op_load_coords))
160 load = ppir_node_to_load(src_coords);
161 else {
162 /* Create load_coords node */
163 load = ppir_node_create(block, ppir_op_load_coords, -1, 0);
164 if (!load)
165 return false;
166 list_addtail(&load->node.list, &node->list);
167
168 load->src = load_tex->src_coords;
169 load->num_src = 1;
170
171 ppir_debug("%s create load_coords node %d for %d\n",
172 __FUNCTION__, load->node.index, node->index);
173
174 ppir_node_foreach_pred_safe(node, dep) {
175 ppir_node *pred = dep->pred;
176 ppir_node_remove_dep(dep);
177 ppir_node_add_dep(&load->node, pred);
178 }
179 ppir_node_add_dep(node, &load->node);
180 }
181
182 assert(load);
183 load_tex->src_coords.type = load->dest.type = ppir_target_pipeline;
184 load_tex->src_coords.pipeline = load->dest.pipeline = ppir_pipeline_reg_discard;
185
186 if (ppir_node_has_single_succ(node)) {
187 ppir_node *succ = ppir_node_first_succ(node);
188 switch (succ->type) {
189 case ppir_node_type_alu:
190 case ppir_node_type_branch: {
191 for (int i = 0; i < ppir_node_get_src_num(succ); i++) {
192 ppir_src *src = ppir_node_get_src(succ, i);
193 if (src->node == node) {
194 /* Can consume samplers directly */
195 src->type = dest->type = ppir_target_pipeline;
196 src->pipeline = dest->pipeline = ppir_pipeline_reg_sampler;
197 }
198 }
199 return true;
200 }
201 default:
202 /* Create mov for everyone else */
203 break;
204 }
205 }
206
207 /* Create move node */
208 ppir_node *move = ppir_node_insert_mov(node);
209 if (unlikely(!move))
210 return false;
211
212 ppir_debug("lower texture create move %d for %d\n",
213 move->index, node->index);
214
215 ppir_src *mov_src= ppir_node_get_src(move, 0);
216 mov_src->type = dest->type = ppir_target_pipeline;
217 mov_src->pipeline = dest->pipeline = ppir_pipeline_reg_sampler;
218
219 return true;
220 }
221
222 /* insert a move as the select condition to make sure it can
223 * be inserted to select instr float mul slot
224 */
225 static bool ppir_lower_select(ppir_block *block, ppir_node *node)
226 {
227 ppir_alu_node *alu = ppir_node_to_alu(node);
228
229 ppir_node *move = ppir_node_create(block, ppir_op_sel_cond, -1, 0);
230 if (!move)
231 return false;
232 list_addtail(&move->list, &node->list);
233
234 ppir_alu_node *move_alu = ppir_node_to_alu(move);
235 ppir_src *move_src = move_alu->src, *src = alu->src;
236 move_src->type = src->type;
237 move_src->ssa = src->ssa;
238 move_src->swizzle[0] = src->swizzle[0];
239 move_alu->num_src = 1;
240
241 ppir_dest *move_dest = &move_alu->dest;
242 move_dest->type = ppir_target_pipeline;
243 move_dest->pipeline = ppir_pipeline_reg_fmul;
244 move_dest->write_mask = 1;
245
246 ppir_node *pred = alu->src[0].node;
247 ppir_dep *dep = ppir_dep_for_pred(node, pred);
248 if (dep)
249 ppir_node_replace_pred(dep, move);
250 else
251 ppir_node_add_dep(node, move);
252
253 /* pred can be a register */
254 if (pred)
255 ppir_node_add_dep(move, pred);
256
257 src->swizzle[0] = 0;
258 ppir_node_target_assign(alu->src, move);
259
260 return true;
261 }
262
263 static bool ppir_lower_trunc(ppir_block *block, ppir_node *node)
264 {
265 /* Turn it into a mov with a round to integer output modifier */
266 ppir_alu_node *alu = ppir_node_to_alu(node);
267 ppir_dest *move_dest = &alu->dest;
268 move_dest->modifier = ppir_outmod_round;
269 node->op = ppir_op_mov;
270
271 return true;
272 }
273
274 static bool ppir_lower_abs(ppir_block *block, ppir_node *node)
275 {
276 /* Turn it into a mov and set the absolute modifier */
277 ppir_alu_node *alu = ppir_node_to_alu(node);
278
279 assert(alu->num_src == 1);
280
281 alu->src[0].absolute = true;
282 alu->src[0].negate = false;
283 node->op = ppir_op_mov;
284
285 return true;
286 }
287
288 static bool ppir_lower_neg(ppir_block *block, ppir_node *node)
289 {
290 /* Turn it into a mov and set the negate modifier */
291 ppir_alu_node *alu = ppir_node_to_alu(node);
292
293 assert(alu->num_src == 1);
294
295 alu->src[0].negate = !alu->src[0].negate;
296 node->op = ppir_op_mov;
297
298 return true;
299 }
300
301 static bool ppir_lower_sat(ppir_block *block, ppir_node *node)
302 {
303 /* Turn it into a mov with the saturate output modifier */
304 ppir_alu_node *alu = ppir_node_to_alu(node);
305
306 assert(alu->num_src == 1);
307
308 ppir_dest *move_dest = &alu->dest;
309 move_dest->modifier = ppir_outmod_clamp_fraction;
310 node->op = ppir_op_mov;
311
312 return true;
313 }
314
315 static bool ppir_lower_branch(ppir_block *block, ppir_node *node)
316 {
317 ppir_branch_node *branch = ppir_node_to_branch(node);
318
319 /* Unconditional branch */
320 if (branch->num_src == 0)
321 return true;
322
323 ppir_const_node *zero = ppir_node_create(block, ppir_op_const, -1, 0);
324
325 if (!zero)
326 return false;
327
328 zero->constant.value[0].f = 0;
329 zero->constant.num = 1;
330 zero->dest.type = ppir_target_pipeline;
331 zero->dest.pipeline = ppir_pipeline_reg_const0;
332 zero->dest.ssa.num_components = 1;
333 zero->dest.ssa.live_in = INT_MAX;
334 zero->dest.ssa.live_out = 0;
335 zero->dest.write_mask = 0x01;
336
337 /* For now we're just comparing branch condition with 0,
338 * in future we should look whether it's possible to move
339 * comparision node into branch itself and use current
340 * way as a fallback for complex conditions.
341 */
342 ppir_node_target_assign(&branch->src[1], &zero->node);
343
344 if (branch->negate)
345 branch->cond_eq = true;
346 else {
347 branch->cond_gt = true;
348 branch->cond_lt = true;
349 }
350
351 branch->num_src = 2;
352
353 ppir_node_add_dep(&branch->node, &zero->node);
354 list_addtail(&zero->node.list, &node->list);
355
356 return true;
357 }
358
359 static bool (*ppir_lower_funcs[ppir_op_num])(ppir_block *, ppir_node *) = {
360 [ppir_op_abs] = ppir_lower_abs,
361 [ppir_op_neg] = ppir_lower_neg,
362 [ppir_op_const] = ppir_lower_const,
363 [ppir_op_ddx] = ppir_lower_ddxy,
364 [ppir_op_ddy] = ppir_lower_ddxy,
365 [ppir_op_lt] = ppir_lower_swap_args,
366 [ppir_op_le] = ppir_lower_swap_args,
367 [ppir_op_load_texture] = ppir_lower_texture,
368 [ppir_op_select] = ppir_lower_select,
369 [ppir_op_trunc] = ppir_lower_trunc,
370 [ppir_op_sat] = ppir_lower_sat,
371 [ppir_op_branch] = ppir_lower_branch,
372 [ppir_op_load_uniform] = ppir_lower_load,
373 [ppir_op_load_temp] = ppir_lower_load,
374 };
375
376 bool ppir_lower_prog(ppir_compiler *comp)
377 {
378 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
379 list_for_each_entry_safe(ppir_node, node, &block->node_list, list) {
380 if (ppir_lower_funcs[node->op] &&
381 !ppir_lower_funcs[node->op](block, node))
382 return false;
383 }
384 }
385
386 return true;
387 }