src/gallium/drivers/lima/ir/pp/lower.c

   1 /*
   2  * Copyright (c) 2017 Lima Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include "util/bitscan.h"
  26 #include "util/ralloc.h"
  27
  28 #include "ppir.h"
  29
  30 static bool ppir_lower_const(ppir_block *block, ppir_node *node)
  31 {
  32    if (ppir_node_is_root(node)) {
  33       ppir_node_delete(node);
  34       return true;
  35    }
  36
  37    assert(ppir_node_has_single_succ(node));
  38
  39    ppir_node *succ = ppir_node_first_succ(node);
  40    ppir_src *src = ppir_node_get_src_for_pred(succ, node);
  41    ppir_dest *dest = ppir_node_get_dest(node);
  42    assert(src != NULL);
  43
  44    switch (succ->type) {
  45    case ppir_node_type_alu:
  46    case ppir_node_type_branch:
  47       /* ALU and branch can consume consts directly */
  48       dest->type = src->type = ppir_target_pipeline;
  49       /* Reg will be updated in node_to_instr later */
  50       dest->pipeline = src->pipeline = ppir_pipeline_reg_const0;
  51       return true;
  52    default:
  53       /* Create a move for everyone else */
  54       break;
  55    }
  56
  57    ppir_node *move = ppir_node_insert_mov(node);
  58    if (unlikely(!move))
  59       return false;
  60
  61    ppir_debug("lower const create move %d for %d\n",
  62               move->index, node->index);
  63
  64    /* Need to be careful with changing src/dst type here:
  65     * it has to be done *after* successors have their children
  66     * replaced, otherwise ppir_node_replace_child() won't find
  67     * matching src/dst and as result won't work
  68     */
  69    ppir_src *mov_src = ppir_node_get_src(move, 0);
  70    mov_src->type = dest->type = ppir_target_pipeline;
  71    mov_src->pipeline = dest->pipeline = ppir_pipeline_reg_const0;
  72
  73    return true;
  74 }
  75
  76 static bool ppir_lower_swap_args(ppir_block *block, ppir_node *node)
  77 {
  78    /* swapped op must be the next op */
  79    node->op++;
  80
  81    assert(node->type == ppir_node_type_alu);
  82    ppir_alu_node *alu = ppir_node_to_alu(node);
  83    assert(alu->num_src == 2);
  84
  85    ppir_src tmp = alu->src[0];
  86    alu->src[0] = alu->src[1];
  87    alu->src[1] = tmp;
  88    return true;
  89 }
  90
  91 static bool ppir_lower_load(ppir_block *block, ppir_node *node)
  92 {
  93    ppir_dest *dest = ppir_node_get_dest(node);
  94    if (ppir_node_is_root(node) && dest->type == ppir_target_ssa) {
  95       ppir_node_delete(node);
  96       return true;
  97    }
  98
  99    /* load can have multiple successors in case if we duplicated load node
 100     * that has load node in source
 101     */
 102    if ((ppir_node_has_single_src_succ(node) || ppir_node_is_root(node)) &&
 103       dest->type != ppir_target_register) {
 104       ppir_node *succ = ppir_node_first_succ(node);
 105       switch (succ->type) {
 106       case ppir_node_type_alu:
 107       case ppir_node_type_branch: {
 108          ppir_src *src = ppir_node_get_src_for_pred(succ, node);
 109          /* Can consume uniforms directly */
 110          src->type = dest->type = ppir_target_pipeline;
 111          src->pipeline = dest->pipeline = ppir_pipeline_reg_uniform;
 112          return true;
 113       }
 114       default:
 115          /* Create mov for everyone else */
 116          break;
 117       }
 118    }
 119
 120    ppir_node *move = ppir_node_insert_mov(node);
 121    if (unlikely(!move))
 122       return false;
 123
 124    ppir_src *mov_src = ppir_node_get_src(move, 0);
 125    mov_src->type = dest->type = ppir_target_pipeline;
 126    mov_src->pipeline = dest->pipeline = ppir_pipeline_reg_uniform;
 127
 128    return true;
 129 }
 130
 131 static bool ppir_lower_ddxy(ppir_block *block, ppir_node *node)
 132 {
 133    assert(node->type == ppir_node_type_alu);
 134    ppir_alu_node *alu = ppir_node_to_alu(node);
 135
 136    alu->src[1] = alu->src[0];
 137    if (node->op == ppir_op_ddx)
 138       alu->src[1].negate = !alu->src[1].negate;
 139    else if (node->op == ppir_op_ddy)
 140       alu->src[0].negate = !alu->src[0].negate;
 141    else
 142       assert(0);
 143
 144    alu->num_src = 2;
 145
 146    return true;
 147 }
 148
 149 static bool ppir_lower_texture(ppir_block *block, ppir_node *node)
 150 {
 151    ppir_load_texture_node *load_tex = ppir_node_to_load_texture(node);
 152    ppir_dest *dest = ppir_node_get_dest(node);
 153    ppir_node *src_coords = ppir_node_get_src(node, 0)->node;
 154    ppir_load_node *load = NULL;
 155
 156    if (src_coords && ppir_node_has_single_src_succ(src_coords) &&
 157        (src_coords->op == ppir_op_load_coords))
 158       load = ppir_node_to_load(src_coords);
 159    else {
 160       /* Create load_coords node */
 161       load = ppir_node_create(block, ppir_op_load_coords_reg, -1, 0);
 162       if (!load)
 163          return false;
 164       list_addtail(&load->node.list, &node->list);
 165
 166       load->src = load_tex->src[0];
 167       load->num_src = 1;
 168       if (load_tex->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
 169          load->num_components = 3;
 170       else
 171          load->num_components = 2;
 172
 173       ppir_debug("%s create load_coords node %d for %d\n",
 174                  __FUNCTION__, load->node.index, node->index);
 175
 176       ppir_node_foreach_pred_safe(node, dep) {
 177          ppir_node *pred = dep->pred;
 178          ppir_node_remove_dep(dep);
 179          ppir_node_add_dep(&load->node, pred, ppir_dep_src);
 180       }
 181       ppir_node_add_dep(node, &load->node, ppir_dep_src);
 182    }
 183
 184    assert(load);
 185    load_tex->src[0].type = load->dest.type = ppir_target_pipeline;
 186    load_tex->src[0].pipeline = load->dest.pipeline = ppir_pipeline_reg_discard;
 187
 188    if (ppir_node_has_single_src_succ(node)) {
 189       ppir_node *succ = ppir_node_first_succ(node);
 190       switch (succ->type) {
 191       case ppir_node_type_alu:
 192       case ppir_node_type_branch: {
 193          for (int i = 0; i < ppir_node_get_src_num(succ); i++) {
 194             ppir_src *src = ppir_node_get_src(succ, i);
 195             if (src->node == node) {
 196                /* Can consume samplers directly */
 197                src->type = dest->type = ppir_target_pipeline;
 198                src->pipeline = dest->pipeline = ppir_pipeline_reg_sampler;
 199             }
 200          }
 201          return true;
 202       }
 203       default:
 204          /* Create mov for everyone else */
 205          break;
 206       }
 207    }
 208
 209    /* Create move node */
 210    ppir_node *move = ppir_node_insert_mov(node);
 211    if (unlikely(!move))
 212       return false;
 213
 214    ppir_debug("lower texture create move %d for %d\n",
 215               move->index, node->index);
 216
 217    ppir_src *mov_src=  ppir_node_get_src(move, 0);
 218    mov_src->type = dest->type = ppir_target_pipeline;
 219    mov_src->pipeline = dest->pipeline = ppir_pipeline_reg_sampler;
 220
 221    return true;
 222 }
 223
 224 /* insert a move as the select condition to make sure it can
 225  * be inserted to select instr float mul slot
 226  */
 227 static bool ppir_lower_select(ppir_block *block, ppir_node *node)
 228 {
 229    ppir_alu_node *alu = ppir_node_to_alu(node);
 230
 231    ppir_node *move = ppir_node_create(block, ppir_op_sel_cond, -1, 0);
 232    if (!move)
 233       return false;
 234    list_addtail(&move->list, &node->list);
 235
 236    ppir_alu_node *move_alu = ppir_node_to_alu(move);
 237    ppir_src *move_src = move_alu->src, *src = alu->src;
 238    move_src->type = src->type;
 239    move_src->ssa = src->ssa;
 240    move_src->swizzle[0] = src->swizzle[0];
 241    move_alu->num_src = 1;
 242
 243    ppir_dest *move_dest = &move_alu->dest;
 244    move_dest->type = ppir_target_pipeline;
 245    move_dest->pipeline = ppir_pipeline_reg_fmul;
 246    move_dest->write_mask = 1;
 247
 248    ppir_node *pred = alu->src[0].node;
 249    ppir_dep *dep = ppir_dep_for_pred(node, pred);
 250    if (dep)
 251       ppir_node_replace_pred(dep, move);
 252    else
 253       ppir_node_add_dep(node, move, ppir_dep_src);
 254
 255    /* pred can be a register */
 256    if (pred)
 257       ppir_node_add_dep(move, pred, ppir_dep_src);
 258
 259    src->swizzle[0] = 0;
 260    ppir_node_target_assign(alu->src, move);
 261
 262    return true;
 263 }
 264
 265 static bool ppir_lower_trunc(ppir_block *block, ppir_node *node)
 266 {
 267    /* Turn it into a mov with a round to integer output modifier */
 268    ppir_alu_node *alu = ppir_node_to_alu(node);
 269    ppir_dest *move_dest = &alu->dest;
 270    move_dest->modifier = ppir_outmod_round;
 271    node->op = ppir_op_mov;
 272
 273    return true;
 274 }
 275
 276 static bool ppir_lower_abs(ppir_block *block, ppir_node *node)
 277 {
 278    /* Turn it into a mov and set the absolute modifier */
 279    ppir_alu_node *alu = ppir_node_to_alu(node);
 280
 281    assert(alu->num_src == 1);
 282
 283    alu->src[0].absolute = true;
 284    alu->src[0].negate = false;
 285    node->op = ppir_op_mov;
 286
 287    return true;
 288 }
 289
 290 static bool ppir_lower_neg(ppir_block *block, ppir_node *node)
 291 {
 292    /* Turn it into a mov and set the negate modifier */
 293    ppir_alu_node *alu = ppir_node_to_alu(node);
 294
 295    assert(alu->num_src == 1);
 296
 297    alu->src[0].negate = !alu->src[0].negate;
 298    node->op = ppir_op_mov;
 299
 300    return true;
 301 }
 302
 303 static bool ppir_lower_sat(ppir_block *block, ppir_node *node)
 304 {
 305    /* Turn it into a mov with the saturate output modifier */
 306    ppir_alu_node *alu = ppir_node_to_alu(node);
 307
 308    assert(alu->num_src == 1);
 309
 310    ppir_dest *move_dest = &alu->dest;
 311    move_dest->modifier = ppir_outmod_clamp_fraction;
 312    node->op = ppir_op_mov;
 313
 314    return true;
 315 }
 316
 317 static bool ppir_lower_branch(ppir_block *block, ppir_node *node)
 318 {
 319    ppir_branch_node *branch = ppir_node_to_branch(node);
 320
 321    /* Unconditional branch */
 322    if (branch->num_src == 0)
 323       return true;
 324
 325    ppir_const_node *zero = ppir_node_create(block, ppir_op_const, -1, 0);
 326
 327    if (!zero)
 328       return false;
 329
 330    zero->constant.value[0].f = 0;
 331    zero->constant.num = 1;
 332    zero->dest.type = ppir_target_pipeline;
 333    zero->dest.pipeline = ppir_pipeline_reg_const0;
 334    zero->dest.ssa.num_components = 1;
 335    zero->dest.write_mask = 0x01;
 336
 337    /* For now we're just comparing branch condition with 0,
 338     * in future we should look whether it's possible to move
 339     * comparision node into branch itself and use current
 340     * way as a fallback for complex conditions.
 341     */
 342    ppir_node_target_assign(&branch->src[1], &zero->node);
 343
 344    if (branch->negate)
 345       branch->cond_eq = true;
 346    else {
 347       branch->cond_gt = true;
 348       branch->cond_lt = true;
 349    }
 350
 351    branch->num_src = 2;
 352
 353    ppir_node_add_dep(&branch->node, &zero->node, ppir_dep_src);
 354    list_addtail(&zero->node.list, &node->list);
 355
 356    return true;
 357 }
 358
 359 static bool (*ppir_lower_funcs[ppir_op_num])(ppir_block *, ppir_node *) = {
 360    [ppir_op_abs] = ppir_lower_abs,
 361    [ppir_op_neg] = ppir_lower_neg,
 362    [ppir_op_const] = ppir_lower_const,
 363    [ppir_op_ddx] = ppir_lower_ddxy,
 364    [ppir_op_ddy] = ppir_lower_ddxy,
 365    [ppir_op_lt] = ppir_lower_swap_args,
 366    [ppir_op_le] = ppir_lower_swap_args,
 367    [ppir_op_load_texture] = ppir_lower_texture,
 368    [ppir_op_select] = ppir_lower_select,
 369    [ppir_op_trunc] = ppir_lower_trunc,
 370    [ppir_op_sat] = ppir_lower_sat,
 371    [ppir_op_branch] = ppir_lower_branch,
 372    [ppir_op_load_uniform] = ppir_lower_load,
 373    [ppir_op_load_temp] = ppir_lower_load,
 374 };
 375
 376 bool ppir_lower_prog(ppir_compiler *comp)
 377 {
 378    list_for_each_entry(ppir_block, block, &comp->block_list, list) {
 379       list_for_each_entry_safe(ppir_node, node, &block->node_list, list) {
 380          if (ppir_lower_funcs[node->op] &&
 381              !ppir_lower_funcs[node->op](block, node))
 382             return false;
 383       }
 384    }
 385
 386    return true;
 387 }