2 * Copyright (c) 2017 Lima Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
27 #include "util/ralloc.h"
28 #include "util/bitscan.h"
29 #include "compiler/nir/nir.h"
33 static void *ppir_node_create_ssa(ppir_block
*block
, ppir_op op
, nir_ssa_def
*ssa
)
35 ppir_node
*node
= ppir_node_create(block
, op
, ssa
->index
, 0);
39 ppir_dest
*dest
= ppir_node_get_dest(node
);
40 dest
->type
= ppir_target_ssa
;
41 dest
->ssa
.num_components
= ssa
->num_components
;
42 dest
->ssa
.live_in
= INT_MAX
;
43 dest
->ssa
.live_out
= 0;
44 dest
->write_mask
= u_bit_consecutive(0, ssa
->num_components
);
46 if (node
->type
== ppir_node_type_load
||
47 node
->type
== ppir_node_type_store
)
48 dest
->ssa
.is_head
= true;
53 static void *ppir_node_create_reg(ppir_block
*block
, ppir_op op
,
54 nir_reg_dest
*reg
, unsigned mask
)
56 ppir_node
*node
= ppir_node_create(block
, op
, reg
->reg
->index
, mask
);
60 ppir_dest
*dest
= ppir_node_get_dest(node
);
62 list_for_each_entry(ppir_reg
, r
, &block
->comp
->reg_list
, list
) {
63 if (r
->index
== reg
->reg
->index
) {
69 dest
->type
= ppir_target_register
;
70 dest
->write_mask
= mask
;
72 if (node
->type
== ppir_node_type_load
||
73 node
->type
== ppir_node_type_store
)
74 dest
->reg
->is_head
= true;
79 static void *ppir_node_create_dest(ppir_block
*block
, ppir_op op
,
80 nir_dest
*dest
, unsigned mask
)
86 return ppir_node_create_ssa(block
, op
, &dest
->ssa
);
88 return ppir_node_create_reg(block
, op
, &dest
->reg
, mask
);
91 return ppir_node_create(block
, op
, index
, 0);
94 static void ppir_node_add_src(ppir_compiler
*comp
, ppir_node
*node
,
95 ppir_src
*ps
, nir_src
*ns
, unsigned mask
)
97 ppir_node
*child
= NULL
;
100 child
= comp
->var_nodes
[ns
->ssa
->index
];
101 ppir_node_add_dep(node
, child
);
104 nir_register
*reg
= ns
->reg
.reg
;
106 int swizzle
= ps
->swizzle
[u_bit_scan(&mask
)];
107 child
= comp
->var_nodes
[(reg
->index
<< 2) + comp
->reg_base
+ swizzle
];
108 ppir_node_add_dep(node
, child
);
112 ppir_dest
*dest
= ppir_node_get_dest(child
);
113 ppir_node_target_assign(ps
, dest
);
116 static int nir_to_ppir_opcodes
[nir_num_opcodes
] = {
118 [0 ... nir_last_opcode
] = -1,
120 [nir_op_fmov
] = ppir_op_mov
,
121 [nir_op_imov
] = ppir_op_mov
,
122 [nir_op_fmul
] = ppir_op_mul
,
123 [nir_op_fadd
] = ppir_op_add
,
124 [nir_op_fdot2
] = ppir_op_dot2
,
125 [nir_op_fdot3
] = ppir_op_dot3
,
126 [nir_op_fdot4
] = ppir_op_dot4
,
127 [nir_op_frsq
] = ppir_op_rsqrt
,
128 [nir_op_flog2
] = ppir_op_log2
,
129 [nir_op_fexp2
] = ppir_op_exp2
,
130 [nir_op_fsqrt
] = ppir_op_sqrt
,
131 [nir_op_fsin
] = ppir_op_sin
,
132 [nir_op_fcos
] = ppir_op_cos
,
133 [nir_op_fmax
] = ppir_op_max
,
134 [nir_op_fmin
] = ppir_op_min
,
135 [nir_op_frcp
] = ppir_op_rcp
,
136 [nir_op_ffloor
] = ppir_op_floor
,
137 [nir_op_fceil
] = ppir_op_ceil
,
138 [nir_op_ffract
] = ppir_op_fract
,
139 [nir_op_fand
] = ppir_op_and
,
140 [nir_op_for
] = ppir_op_or
,
141 [nir_op_fxor
] = ppir_op_xor
,
142 [nir_op_sge
] = ppir_op_ge
,
143 [nir_op_fge
] = ppir_op_ge
,
144 [nir_op_slt
] = ppir_op_lt
,
145 [nir_op_flt
] = ppir_op_lt
,
146 [nir_op_seq
] = ppir_op_eq
,
147 [nir_op_feq
] = ppir_op_eq
,
148 [nir_op_sne
] = ppir_op_ne
,
149 [nir_op_fne
] = ppir_op_ne
,
150 [nir_op_fnot
] = ppir_op_not
,
151 [nir_op_fcsel
] = ppir_op_select
,
152 [nir_op_inot
] = ppir_op_not
,
155 static ppir_node
*ppir_emit_alu(ppir_block
*block
, nir_instr
*ni
)
157 nir_alu_instr
*instr
= nir_instr_as_alu(ni
);
158 int op
= nir_to_ppir_opcodes
[instr
->op
];
161 ppir_error("unsupported nir_op: %s\n", nir_op_infos
[instr
->op
].name
);
165 ppir_alu_node
*node
= ppir_node_create_dest(block
, op
, &instr
->dest
.dest
,
166 instr
->dest
.write_mask
);
170 ppir_dest
*pd
= &node
->dest
;
171 nir_alu_dest
*nd
= &instr
->dest
;
173 pd
->modifier
= ppir_outmod_clamp_fraction
;
187 src_mask
= pd
->write_mask
;
191 unsigned num_child
= nir_op_infos
[instr
->op
].num_inputs
;
192 node
->num_src
= num_child
;
194 for (int i
= 0; i
< num_child
; i
++) {
195 nir_alu_src
*ns
= instr
->src
+ i
;
196 ppir_src
*ps
= node
->src
+ i
;
197 memcpy(ps
->swizzle
, ns
->swizzle
, sizeof(ps
->swizzle
));
198 ppir_node_add_src(block
->comp
, &node
->node
, ps
, &ns
->src
, src_mask
);
200 ps
->absolute
= ns
->abs
;
201 ps
->negate
= ns
->negate
;
207 static ppir_node
*ppir_emit_intrinsic(ppir_block
*block
, nir_instr
*ni
)
209 nir_intrinsic_instr
*instr
= nir_instr_as_intrinsic(ni
);
211 ppir_load_node
*lnode
;
212 ppir_store_node
*snode
;
214 switch (instr
->intrinsic
) {
215 case nir_intrinsic_load_input
:
216 if (!instr
->dest
.is_ssa
)
217 mask
= u_bit_consecutive(0, instr
->num_components
);
219 lnode
= ppir_node_create_dest(block
, ppir_op_load_varying
, &instr
->dest
, mask
);
223 lnode
->num_components
= instr
->num_components
;
224 lnode
->index
= nir_intrinsic_base(instr
) * 4 + nir_intrinsic_component(instr
);
227 case nir_intrinsic_load_frag_coord
:
228 if (!instr
->dest
.is_ssa
)
229 mask
= u_bit_consecutive(0, instr
->num_components
);
231 lnode
= ppir_node_create_dest(block
, ppir_op_load_fragcoord
, &instr
->dest
, mask
);
235 lnode
->num_components
= instr
->num_components
;
238 case nir_intrinsic_load_uniform
:
239 if (!instr
->dest
.is_ssa
)
240 mask
= u_bit_consecutive(0, instr
->num_components
);
242 lnode
= ppir_node_create_dest(block
, ppir_op_load_uniform
, &instr
->dest
, mask
);
246 lnode
->num_components
= instr
->num_components
;
247 lnode
->index
= nir_intrinsic_base(instr
);
248 lnode
->index
+= (uint32_t)nir_src_as_float(instr
->src
[0]);
252 case nir_intrinsic_store_output
:
253 snode
= ppir_node_create_dest(block
, ppir_op_store_color
, NULL
, 0);
257 snode
->index
= nir_intrinsic_base(instr
);
259 for (int i
= 0; i
< instr
->num_components
; i
++)
260 snode
->src
.swizzle
[i
] = i
;
262 ppir_node_add_src(block
->comp
, &snode
->node
, &snode
->src
, instr
->src
,
263 u_bit_consecutive(0, instr
->num_components
));
268 ppir_error("unsupported nir_intrinsic_instr %d\n", instr
->intrinsic
);
273 static ppir_node
*ppir_emit_load_const(ppir_block
*block
, nir_instr
*ni
)
275 nir_load_const_instr
*instr
= nir_instr_as_load_const(ni
);
276 ppir_const_node
*node
= ppir_node_create_ssa(block
, ppir_op_const
, &instr
->def
);
280 assert(instr
->def
.bit_size
== 32);
282 for (int i
= 0; i
< instr
->def
.num_components
; i
++)
283 node
->constant
.value
[i
].i
= instr
->value
[i
].i32
;
284 node
->constant
.num
= instr
->def
.num_components
;
289 static ppir_node
*ppir_emit_ssa_undef(ppir_block
*block
, nir_instr
*ni
)
291 ppir_error("nir_ssa_undef_instr not support\n");
295 static ppir_node
*ppir_emit_tex(ppir_block
*block
, nir_instr
*ni
)
297 nir_tex_instr
*instr
= nir_instr_as_tex(ni
);
298 ppir_load_texture_node
*node
;
300 if (instr
->op
!= nir_texop_tex
) {
301 ppir_error("unsupported texop %d\n", instr
->op
);
305 node
= ppir_node_create_dest(block
, ppir_op_load_texture
, &instr
->dest
, 0);
309 node
->sampler
= instr
->texture_index
;
311 switch (instr
->sampler_dim
) {
312 case GLSL_SAMPLER_DIM_2D
:
313 case GLSL_SAMPLER_DIM_RECT
:
314 case GLSL_SAMPLER_DIM_EXTERNAL
:
317 ppir_debug("unsupported sampler dim: %d\n", instr
->sampler_dim
);
321 node
->sampler_dim
= instr
->sampler_dim
;
323 for (int i
= 0; i
< instr
->coord_components
; i
++)
324 node
->src_coords
.swizzle
[i
] = i
;
326 assert(instr
->num_srcs
== 1);
327 for (int i
= 0; i
< instr
->num_srcs
; i
++) {
328 switch (instr
->src
[i
].src_type
) {
329 case nir_tex_src_coord
:
330 ppir_node_add_src(block
->comp
, &node
->node
, &node
->src_coords
, &instr
->src
[i
].src
,
331 u_bit_consecutive(0, instr
->coord_components
));
334 ppir_debug("unknown texture source");
342 static ppir_node
*ppir_emit_jump(ppir_block
*block
, nir_instr
*ni
)
344 ppir_error("nir_jump_instr not support\n");
348 static ppir_node
*(*ppir_emit_instr
[nir_instr_type_phi
])(ppir_block
*, nir_instr
*) = {
349 [nir_instr_type_alu
] = ppir_emit_alu
,
350 [nir_instr_type_intrinsic
] = ppir_emit_intrinsic
,
351 [nir_instr_type_load_const
] = ppir_emit_load_const
,
352 [nir_instr_type_ssa_undef
] = ppir_emit_ssa_undef
,
353 [nir_instr_type_tex
] = ppir_emit_tex
,
354 [nir_instr_type_jump
] = ppir_emit_jump
,
357 static ppir_block
*ppir_block_create(ppir_compiler
*comp
)
359 ppir_block
*block
= rzalloc(comp
, ppir_block
);
363 list_inithead(&block
->node_list
);
364 list_inithead(&block
->instr_list
);
369 static bool ppir_emit_block(ppir_compiler
*comp
, nir_block
*nblock
)
371 ppir_block
*block
= ppir_block_create(comp
);
375 list_addtail(&block
->list
, &comp
->block_list
);
378 nir_foreach_instr(instr
, nblock
) {
379 assert(instr
->type
< nir_instr_type_phi
);
380 ppir_node
*node
= ppir_emit_instr
[instr
->type
](block
, instr
);
382 list_addtail(&node
->list
, &block
->node_list
);
388 static bool ppir_emit_if(ppir_compiler
*comp
, nir_if
*nif
)
390 ppir_error("if nir_cf_node not support\n");
394 static bool ppir_emit_loop(ppir_compiler
*comp
, nir_loop
*nloop
)
396 ppir_error("loop nir_cf_node not support\n");
400 static bool ppir_emit_function(ppir_compiler
*comp
, nir_function_impl
*nfunc
)
402 ppir_error("function nir_cf_node not support\n");
406 static bool ppir_emit_cf_list(ppir_compiler
*comp
, struct exec_list
*list
)
408 foreach_list_typed(nir_cf_node
, node
, node
, list
) {
411 switch (node
->type
) {
412 case nir_cf_node_block
:
413 ret
= ppir_emit_block(comp
, nir_cf_node_as_block(node
));
416 ret
= ppir_emit_if(comp
, nir_cf_node_as_if(node
));
418 case nir_cf_node_loop
:
419 ret
= ppir_emit_loop(comp
, nir_cf_node_as_loop(node
));
421 case nir_cf_node_function
:
422 ret
= ppir_emit_function(comp
, nir_cf_node_as_function(node
));
425 ppir_error("unknown NIR node type %d\n", node
->type
);
436 static ppir_compiler
*ppir_compiler_create(void *prog
, unsigned num_reg
, unsigned num_ssa
)
438 ppir_compiler
*comp
= rzalloc_size(
439 prog
, sizeof(*comp
) + ((num_reg
<< 2) + num_ssa
) * sizeof(ppir_node
*));
443 list_inithead(&comp
->block_list
);
444 list_inithead(&comp
->reg_list
);
446 comp
->var_nodes
= (ppir_node
**)(comp
+ 1);
447 comp
->reg_base
= num_ssa
;
452 bool ppir_compile_nir(struct lima_fs_shader_state
*prog
, struct nir_shader
*nir
,
455 nir_function_impl
*func
= nir_shader_get_entrypoint(nir
);
456 ppir_compiler
*comp
= ppir_compiler_create(prog
, func
->reg_alloc
, func
->ssa_alloc
);
462 foreach_list_typed(nir_register
, reg
, node
, &func
->registers
) {
463 ppir_reg
*r
= rzalloc(comp
, ppir_reg
);
467 r
->index
= reg
->index
;
468 r
->num_components
= reg
->num_components
;
469 r
->live_in
= INT_MAX
;
472 list_addtail(&r
->list
, &comp
->reg_list
);
475 if (!ppir_emit_cf_list(comp
, &func
->body
))
477 ppir_node_print_prog(comp
);
479 if (!ppir_lower_prog(comp
))
482 if (!ppir_node_to_instr(comp
))
485 if (!ppir_schedule_prog(comp
))
488 if (!ppir_regalloc_prog(comp
))
491 if (!ppir_codegen_prog(comp
))