src/gallium/drivers/lima/ir/pp/nir.c

   1 /*
   2  * Copyright (c) 2017 Lima Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include <string.h>
  26
  27 #include "util/hash_table.h"
  28 #include "util/ralloc.h"
  29 #include "util/bitscan.h"
  30 #include "compiler/nir/nir.h"
  31 #include "pipe/p_state.h"
  32
  33
  34 #include "ppir.h"
  35
  36 static void *ppir_node_create_ssa(ppir_block *block, ppir_op op, nir_ssa_def *ssa)
  37 {
  38    ppir_node *node = ppir_node_create(block, op, ssa->index, 0);
  39    if (!node)
  40       return NULL;
  41
  42    ppir_dest *dest = ppir_node_get_dest(node);
  43    dest->type = ppir_target_ssa;
  44    dest->ssa.num_components = ssa->num_components;
  45    dest->ssa.live_in = INT_MAX;
  46    dest->ssa.live_out = 0;
  47    dest->write_mask = u_bit_consecutive(0, ssa->num_components);
  48
  49    if (node->type == ppir_node_type_load ||
  50        node->type == ppir_node_type_store)
  51       dest->ssa.is_head = true;
  52
  53    return node;
  54 }
  55
  56 static void *ppir_node_create_reg(ppir_block *block, ppir_op op,
  57                                   nir_register *reg, unsigned mask)
  58 {
  59    ppir_node *node = ppir_node_create(block, op, reg->index, mask);
  60    if (!node)
  61       return NULL;
  62
  63    ppir_dest *dest = ppir_node_get_dest(node);
  64
  65    list_for_each_entry(ppir_reg, r, &block->comp->reg_list, list) {
  66       if (r->index == reg->index) {
  67          dest->reg = r;
  68          break;
  69       }
  70    }
  71
  72    dest->type = ppir_target_register;
  73    dest->write_mask = mask;
  74
  75    if (node->type == ppir_node_type_load ||
  76        node->type == ppir_node_type_store)
  77       dest->reg->is_head = true;
  78
  79    return node;
  80 }
  81
  82 static void *ppir_node_create_dest(ppir_block *block, ppir_op op,
  83                                    nir_dest *dest, unsigned mask)
  84 {
  85    unsigned index = -1;
  86
  87    if (dest) {
  88       if (dest->is_ssa)
  89          return ppir_node_create_ssa(block, op, &dest->ssa);
  90       else
  91          return ppir_node_create_reg(block, op, dest->reg.reg, mask);
  92    }
  93
  94    return ppir_node_create(block, op, index, 0);
  95 }
  96
  97 static void ppir_node_add_src(ppir_compiler *comp, ppir_node *node,
  98                               ppir_src *ps, nir_src *ns, unsigned mask)
  99 {
 100    ppir_node *child = NULL;
 101
 102    if (ns->is_ssa) {
 103       child = comp->var_nodes[ns->ssa->index];
 104       /* Clone consts for each successor */
 105       switch (child->op) {
 106       case ppir_op_const:
 107          child = ppir_node_clone(node->block, child);
 108          break;
 109       /* Clone uniforms and load textures for each block */
 110       case ppir_op_load_texture:
 111       case ppir_op_load_uniform:
 112       case ppir_op_load_varying:
 113          if (child->block != node->block) {
 114             child = ppir_node_clone(node->block, child);
 115             comp->var_nodes[ns->ssa->index] = child;
 116          }
 117          break;
 118       default:
 119          break;
 120       }
 121
 122       ppir_node_add_dep(node, child);
 123    }
 124    else {
 125       nir_register *reg = ns->reg.reg;
 126       while (mask) {
 127          int swizzle = ps->swizzle[u_bit_scan(&mask)];
 128          child = comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle];
 129          /* Reg is read before it was written, create a dummy node for it */
 130          if (!child) {
 131             child = ppir_node_create_reg(node->block, ppir_op_dummy, reg,
 132                u_bit_consecutive(0, 4));
 133             comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle] = child;
 134          }
 135          /* Don't add dummies or recursive deps for ops like r1 = r1 + ssa1 */
 136          if (child && node != child && child->op != ppir_op_dummy)
 137             ppir_node_add_dep(node, child);
 138       }
 139    }
 140
 141    ppir_node_target_assign(ps, child);
 142 }
 143
 144 static int nir_to_ppir_opcodes[nir_num_opcodes] = {
 145    /* not supported */
 146    [0 ... nir_last_opcode] = -1,
 147
 148    [nir_op_mov] = ppir_op_mov,
 149    [nir_op_fmul] = ppir_op_mul,
 150    [nir_op_fabs] = ppir_op_abs,
 151    [nir_op_fneg] = ppir_op_neg,
 152    [nir_op_fadd] = ppir_op_add,
 153    [nir_op_fsum3] = ppir_op_sum3,
 154    [nir_op_fsum4] = ppir_op_sum4,
 155    [nir_op_frsq] = ppir_op_rsqrt,
 156    [nir_op_flog2] = ppir_op_log2,
 157    [nir_op_fexp2] = ppir_op_exp2,
 158    [nir_op_fsqrt] = ppir_op_sqrt,
 159    [nir_op_fsin] = ppir_op_sin,
 160    [nir_op_fcos] = ppir_op_cos,
 161    [nir_op_fmax] = ppir_op_max,
 162    [nir_op_fmin] = ppir_op_min,
 163    [nir_op_frcp] = ppir_op_rcp,
 164    [nir_op_ffloor] = ppir_op_floor,
 165    [nir_op_fceil] = ppir_op_ceil,
 166    [nir_op_ffract] = ppir_op_fract,
 167    [nir_op_sge] = ppir_op_ge,
 168    [nir_op_fge] = ppir_op_ge,
 169    [nir_op_slt] = ppir_op_lt,
 170    [nir_op_flt] = ppir_op_lt,
 171    [nir_op_seq] = ppir_op_eq,
 172    [nir_op_feq] = ppir_op_eq,
 173    [nir_op_sne] = ppir_op_ne,
 174    [nir_op_fne] = ppir_op_ne,
 175    [nir_op_fcsel] = ppir_op_select,
 176    [nir_op_inot] = ppir_op_not,
 177    [nir_op_ftrunc] = ppir_op_trunc,
 178    [nir_op_fsat] = ppir_op_sat,
 179    [nir_op_fddx] = ppir_op_ddx,
 180    [nir_op_fddy] = ppir_op_ddy,
 181 };
 182
 183 static ppir_node *ppir_emit_alu(ppir_block *block, nir_instr *ni)
 184 {
 185    nir_alu_instr *instr = nir_instr_as_alu(ni);
 186    int op = nir_to_ppir_opcodes[instr->op];
 187
 188    if (op < 0) {
 189       ppir_error("unsupported nir_op: %s\n", nir_op_infos[instr->op].name);
 190       return NULL;
 191    }
 192
 193    ppir_alu_node *node = ppir_node_create_dest(block, op, &instr->dest.dest,
 194                                                instr->dest.write_mask);
 195    if (!node)
 196       return NULL;
 197
 198    ppir_dest *pd = &node->dest;
 199    nir_alu_dest *nd = &instr->dest;
 200    if (nd->saturate)
 201       pd->modifier = ppir_outmod_clamp_fraction;
 202
 203    unsigned src_mask;
 204    switch (op) {
 205    case ppir_op_sum3:
 206       src_mask = 0b0111;
 207       break;
 208    case ppir_op_sum4:
 209       src_mask = 0b1111;
 210       break;
 211    default:
 212       src_mask = pd->write_mask;
 213       break;
 214    }
 215
 216    unsigned num_child = nir_op_infos[instr->op].num_inputs;
 217    node->num_src = num_child;
 218
 219    for (int i = 0; i < num_child; i++) {
 220       nir_alu_src *ns = instr->src + i;
 221       ppir_src *ps = node->src + i;
 222       memcpy(ps->swizzle, ns->swizzle, sizeof(ps->swizzle));
 223       ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask);
 224
 225       ps->absolute = ns->abs;
 226       ps->negate = ns->negate;
 227    }
 228
 229    return &node->node;
 230 }
 231
 232 static ppir_block *ppir_block_create(ppir_compiler *comp);
 233
 234 static bool ppir_emit_discard_block(ppir_compiler *comp)
 235 {
 236    ppir_block *block = ppir_block_create(comp);
 237    ppir_discard_node *discard;
 238    if (!block)
 239       return false;
 240
 241    comp->discard_block = block;
 242    block->comp  = comp;
 243
 244    discard = ppir_node_create(block, ppir_op_discard, -1, 0);
 245    if (discard)
 246       list_addtail(&discard->node.list, &block->node_list);
 247    else
 248       return false;
 249
 250    return true;
 251 }
 252
 253 static ppir_node *ppir_emit_discard_if(ppir_block *block, nir_instr *ni)
 254 {
 255    nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
 256    ppir_node *node;
 257    ppir_compiler *comp = block->comp;
 258    ppir_branch_node *branch;
 259
 260    if (!comp->discard_block && !ppir_emit_discard_block(comp))
 261       return NULL;
 262
 263    node = ppir_node_create(block, ppir_op_branch, -1, 0);
 264    if (!node)
 265       return NULL;
 266    branch = ppir_node_to_branch(node);
 267
 268    /* second src and condition will be updated during lowering */
 269    ppir_node_add_src(block->comp, node, &branch->src[0],
 270                      &instr->src[0], u_bit_consecutive(0, instr->num_components));
 271    branch->num_src = 1;
 272    branch->target = comp->discard_block;
 273
 274    return node;
 275 }
 276
 277 static ppir_node *ppir_emit_discard(ppir_block *block, nir_instr *ni)
 278 {
 279    ppir_node *node = ppir_node_create(block, ppir_op_discard, -1, 0);
 280
 281    return node;
 282 }
 283
 284 static ppir_node *ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
 285 {
 286    nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
 287    unsigned mask = 0;
 288    ppir_load_node *lnode;
 289    ppir_alu_node *alu_node;
 290
 291    switch (instr->intrinsic) {
 292    case nir_intrinsic_load_input:
 293       if (!instr->dest.is_ssa)
 294          mask = u_bit_consecutive(0, instr->num_components);
 295
 296       lnode = ppir_node_create_dest(block, ppir_op_load_varying, &instr->dest, mask);
 297       if (!lnode)
 298          return NULL;
 299
 300       lnode->num_components = instr->num_components;
 301       lnode->index = nir_intrinsic_base(instr) * 4 + nir_intrinsic_component(instr);
 302       return &lnode->node;
 303
 304    case nir_intrinsic_load_frag_coord:
 305    case nir_intrinsic_load_point_coord:
 306    case nir_intrinsic_load_front_face:
 307       if (!instr->dest.is_ssa)
 308          mask = u_bit_consecutive(0, instr->num_components);
 309
 310       ppir_op op;
 311       switch (instr->intrinsic) {
 312       case nir_intrinsic_load_frag_coord:
 313          op = ppir_op_load_fragcoord;
 314          break;
 315       case nir_intrinsic_load_point_coord:
 316          op = ppir_op_load_pointcoord;
 317          break;
 318       case nir_intrinsic_load_front_face:
 319          op = ppir_op_load_frontface;
 320          break;
 321       default:
 322          assert(0);
 323          break;
 324       }
 325
 326       lnode = ppir_node_create_dest(block, op, &instr->dest, mask);
 327       if (!lnode)
 328          return NULL;
 329
 330       lnode->num_components = instr->num_components;
 331       return &lnode->node;
 332
 333    case nir_intrinsic_load_uniform:
 334       if (!instr->dest.is_ssa)
 335          mask = u_bit_consecutive(0, instr->num_components);
 336
 337       lnode = ppir_node_create_dest(block, ppir_op_load_uniform, &instr->dest, mask);
 338       if (!lnode)
 339          return NULL;
 340
 341       lnode->num_components = instr->num_components;
 342       lnode->index = nir_intrinsic_base(instr);
 343       lnode->index += (uint32_t)nir_src_as_float(instr->src[0]);
 344
 345       return &lnode->node;
 346
 347    case nir_intrinsic_store_output: {
 348       alu_node = ppir_node_create_dest(block, ppir_op_store_color, NULL, 0);
 349       if (!alu_node)
 350          return NULL;
 351
 352       ppir_dest *dest = ppir_node_get_dest(&alu_node->node);
 353       dest->type = ppir_target_ssa;
 354       dest->ssa.num_components = instr->num_components;
 355       dest->ssa.live_in = INT_MAX;
 356       dest->ssa.live_out = 0;
 357       dest->ssa.index = 0;
 358       dest->write_mask = u_bit_consecutive(0, instr->num_components);
 359
 360       alu_node->num_src = 1;
 361
 362       for (int i = 0; i < instr->num_components; i++)
 363          alu_node->src[0].swizzle[i] = i;
 364
 365       ppir_node_add_src(block->comp, &alu_node->node, alu_node->src, instr->src,
 366                         u_bit_consecutive(0, instr->num_components));
 367
 368       return &alu_node->node;
 369    }
 370
 371    case nir_intrinsic_discard:
 372       return ppir_emit_discard(block, ni);
 373
 374    case nir_intrinsic_discard_if:
 375       return ppir_emit_discard_if(block, ni);
 376
 377    default:
 378       ppir_error("unsupported nir_intrinsic_instr %s\n",
 379                  nir_intrinsic_infos[instr->intrinsic].name);
 380       return NULL;
 381    }
 382 }
 383
 384 static ppir_node *ppir_emit_load_const(ppir_block *block, nir_instr *ni)
 385 {
 386    nir_load_const_instr *instr = nir_instr_as_load_const(ni);
 387    ppir_const_node *node = ppir_node_create_ssa(block, ppir_op_const, &instr->def);
 388    if (!node)
 389       return NULL;
 390
 391    assert(instr->def.bit_size == 32);
 392
 393    for (int i = 0; i < instr->def.num_components; i++)
 394       node->constant.value[i].i = instr->value[i].i32;
 395    node->constant.num = instr->def.num_components;
 396
 397    return &node->node;
 398 }
 399
 400 static ppir_node *ppir_emit_ssa_undef(ppir_block *block, nir_instr *ni)
 401 {
 402    ppir_error("nir_ssa_undef_instr not support\n");
 403    return NULL;
 404 }
 405
 406 static ppir_node *ppir_emit_tex(ppir_block *block, nir_instr *ni)
 407 {
 408    nir_tex_instr *instr = nir_instr_as_tex(ni);
 409    ppir_load_texture_node *node;
 410
 411    if (instr->op != nir_texop_tex) {
 412       ppir_error("unsupported texop %d\n", instr->op);
 413       return NULL;
 414    }
 415
 416    unsigned mask = 0;
 417    if (!instr->dest.is_ssa)
 418       mask = u_bit_consecutive(0, nir_tex_instr_dest_size(instr));
 419
 420    node = ppir_node_create_dest(block, ppir_op_load_texture, &instr->dest, mask);
 421    if (!node)
 422       return NULL;
 423
 424    node->sampler = instr->texture_index;
 425
 426    switch (instr->sampler_dim) {
 427    case GLSL_SAMPLER_DIM_2D:
 428    case GLSL_SAMPLER_DIM_RECT:
 429    case GLSL_SAMPLER_DIM_EXTERNAL:
 430       break;
 431    default:
 432       ppir_error("unsupported sampler dim: %d\n", instr->sampler_dim);
 433       return NULL;
 434    }
 435
 436    node->sampler_dim = instr->sampler_dim;
 437
 438    for (int i = 0; i < instr->coord_components; i++)
 439          node->src_coords.swizzle[i] = i;
 440
 441    for (int i = 0; i < instr->num_srcs; i++) {
 442       switch (instr->src[i].src_type) {
 443       case nir_tex_src_coord:
 444          ppir_node_add_src(block->comp, &node->node, &node->src_coords, &instr->src[i].src,
 445                            u_bit_consecutive(0, instr->coord_components));
 446          break;
 447       default:
 448          ppir_error("unsupported texture source type\n");
 449          assert(0);
 450          return NULL;
 451       }
 452    }
 453
 454    return &node->node;
 455 }
 456
 457 static ppir_block *ppir_get_block(ppir_compiler *comp, nir_block *nblock)
 458 {
 459    ppir_block *block = _mesa_hash_table_u64_search(comp->blocks, (uint64_t)nblock);
 460
 461    return block;
 462 }
 463
 464 static ppir_node *ppir_emit_jump(ppir_block *block, nir_instr *ni)
 465 {
 466    ppir_error("nir_jump_instr not support\n");
 467    return NULL;
 468 }
 469
 470 static ppir_node *(*ppir_emit_instr[nir_instr_type_phi])(ppir_block *, nir_instr *) = {
 471    [nir_instr_type_alu]        = ppir_emit_alu,
 472    [nir_instr_type_intrinsic]  = ppir_emit_intrinsic,
 473    [nir_instr_type_load_const] = ppir_emit_load_const,
 474    [nir_instr_type_ssa_undef]  = ppir_emit_ssa_undef,
 475    [nir_instr_type_tex]        = ppir_emit_tex,
 476    [nir_instr_type_jump]       = ppir_emit_jump,
 477 };
 478
 479 static ppir_block *ppir_block_create(ppir_compiler *comp)
 480 {
 481    ppir_block *block = rzalloc(comp, ppir_block);
 482    if (!block)
 483       return NULL;
 484
 485    list_inithead(&block->node_list);
 486    list_inithead(&block->instr_list);
 487
 488    block->comp = comp;
 489
 490    return block;
 491 }
 492
 493 static bool ppir_emit_block(ppir_compiler *comp, nir_block *nblock)
 494 {
 495    ppir_block *block = ppir_get_block(comp, nblock);
 496
 497    list_addtail(&block->list, &comp->block_list);
 498
 499    nir_foreach_instr(instr, nblock) {
 500       assert(instr->type < nir_instr_type_phi);
 501       ppir_node *node = ppir_emit_instr[instr->type](block, instr);
 502       if (!node)
 503          return false;
 504
 505       list_addtail(&node->list, &block->node_list);
 506    }
 507
 508    return true;
 509 }
 510
 511 static bool ppir_emit_if(ppir_compiler *comp, nir_if *nif)
 512 {
 513    ppir_error("if nir_cf_node not support\n");
 514    return false;
 515 }
 516
 517 static bool ppir_emit_loop(ppir_compiler *comp, nir_loop *nloop)
 518 {
 519    ppir_error("loop nir_cf_node not support\n");
 520    return false;
 521 }
 522
 523 static bool ppir_emit_function(ppir_compiler *comp, nir_function_impl *nfunc)
 524 {
 525    ppir_error("function nir_cf_node not support\n");
 526    return false;
 527 }
 528
 529 static bool ppir_emit_cf_list(ppir_compiler *comp, struct exec_list *list)
 530 {
 531    foreach_list_typed(nir_cf_node, node, node, list) {
 532       bool ret;
 533
 534       switch (node->type) {
 535       case nir_cf_node_block:
 536          ret = ppir_emit_block(comp, nir_cf_node_as_block(node));
 537          break;
 538       case nir_cf_node_if:
 539          ret = ppir_emit_if(comp, nir_cf_node_as_if(node));
 540          break;
 541       case nir_cf_node_loop:
 542          ret = ppir_emit_loop(comp, nir_cf_node_as_loop(node));
 543          break;
 544       case nir_cf_node_function:
 545          ret = ppir_emit_function(comp, nir_cf_node_as_function(node));
 546          break;
 547       default:
 548          ppir_error("unknown NIR node type %d\n", node->type);
 549          return false;
 550       }
 551
 552       if (!ret)
 553          return false;
 554    }
 555
 556    return true;
 557 }
 558
 559 static ppir_compiler *ppir_compiler_create(void *prog, unsigned num_reg, unsigned num_ssa)
 560 {
 561    ppir_compiler *comp = rzalloc_size(
 562       prog, sizeof(*comp) + ((num_reg << 2) + num_ssa) * sizeof(ppir_node *));
 563    if (!comp)
 564       return NULL;
 565
 566    list_inithead(&comp->block_list);
 567    list_inithead(&comp->reg_list);
 568    comp->blocks = _mesa_hash_table_u64_create(prog);
 569
 570    comp->var_nodes = (ppir_node **)(comp + 1);
 571    comp->reg_base = num_ssa;
 572    comp->prog = prog;
 573    return comp;
 574 }
 575
 576 static void ppir_add_ordering_deps(ppir_compiler *comp)
 577 {
 578    /* Some intrinsics do not have explicit dependencies and thus depend
 579     * on instructions order. Consider discard_if and store_ouput as
 580     * example. If we don't add fake dependency of discard_if to store_output
 581     * scheduler may put store_output first and since store_output terminates
 582     * shader on Utgard PP, rest of it will never be executed.
 583     * Add fake dependencies for discard/branch/store to preserve
 584     * instruction order.
 585     *
 586     * TODO: scheduler should schedule discard_if as early as possible otherwise
 587     * we may end up with suboptimal code for cases like this:
 588     *
 589     * s3 = s1 < s2
 590     * discard_if s3
 591     * s4 = s1 + s2
 592     * store s4
 593     *
 594     * In this case store depends on discard_if and s4, but since dependencies can
 595     * be scheduled in any order it can result in code like this:
 596     *
 597     * instr1: s3 = s1 < s3
 598     * instr2: s4 = s1 + s2
 599     * instr3: discard_if s3
 600     * instr4: store s4
 601     */
 602    list_for_each_entry(ppir_block, block, &comp->block_list, list) {
 603       ppir_node *prev_node = NULL;
 604       list_for_each_entry_rev(ppir_node, node, &block->node_list, list) {
 605          if (prev_node && ppir_node_is_root(node) && node->op != ppir_op_const) {
 606             ppir_node_add_dep(prev_node, node);
 607          }
 608          if (node->op == ppir_op_discard ||
 609              node->op == ppir_op_store_color ||
 610              node->op == ppir_op_store_temp ||
 611              node->op == ppir_op_branch) {
 612             prev_node = node;
 613          }
 614       }
 615    }
 616 }
 617
 618 static void ppir_print_shader_db(struct nir_shader *nir, ppir_compiler *comp,
 619                                  struct pipe_debug_callback *debug)
 620 {
 621    const struct shader_info *info = &nir->info;
 622    char *shaderdb;
 623    int ret = asprintf(&shaderdb,
 624                       "%s shader: %d inst, %d loops, %d:%d spills:fills\n",
 625                       gl_shader_stage_name(info->stage),
 626                       comp->cur_instr_index,
 627                       comp->num_loops,
 628                       comp->num_spills,
 629                       comp->num_fills);
 630    assert(ret >= 0);
 631
 632    if (lima_debug & LIMA_DEBUG_SHADERDB)
 633       fprintf(stderr, "SHADER-DB: %s\n", shaderdb);
 634
 635    pipe_debug_message(debug, SHADER_INFO, "%s", shaderdb);
 636    free(shaderdb);
 637 }
 638
 639 static void ppir_add_write_after_read_deps(ppir_compiler *comp)
 640 {
 641    list_for_each_entry(ppir_block, block, &comp->block_list, list) {
 642       list_for_each_entry(ppir_reg, reg, &comp->reg_list, list) {
 643          ppir_node *write = NULL;
 644          list_for_each_entry_rev(ppir_node, node, &block->node_list, list) {
 645             for (int i = 0; i < ppir_node_get_src_num(node); i++) {
 646                ppir_src *src = ppir_node_get_src(node, i);
 647                if (src && src->type == ppir_target_register &&
 648                    src->reg == reg &&
 649                    write)
 650                   ppir_node_add_dep(write, node);
 651             }
 652             ppir_dest *dest = ppir_node_get_dest(node);
 653             if (dest && dest->type == ppir_target_register &&
 654                 dest->reg == reg)
 655                write = node;
 656          }
 657       }
 658    }
 659 }
 660
 661 bool ppir_compile_nir(struct lima_fs_shader_state *prog, struct nir_shader *nir,
 662                       struct ra_regs *ra,
 663                       struct pipe_debug_callback *debug)
 664 {
 665    nir_function_impl *func = nir_shader_get_entrypoint(nir);
 666    ppir_compiler *comp = ppir_compiler_create(prog, func->reg_alloc, func->ssa_alloc);
 667    if (!comp)
 668       return false;
 669
 670    comp->ra = ra;
 671
 672    /* 1st pass: create ppir blocks */
 673    nir_foreach_function(function, nir) {
 674       if (!function->impl)
 675          continue;
 676
 677       nir_foreach_block(nblock, function->impl) {
 678          ppir_block *block = ppir_block_create(comp);
 679          if (!block)
 680             return false;
 681          block->index = nblock->index;
 682          _mesa_hash_table_u64_insert(comp->blocks, (uint64_t)nblock, block);
 683       }
 684    }
 685
 686    /* 2nd pass: populate successors */
 687    nir_foreach_function(function, nir) {
 688       if (!function->impl)
 689          continue;
 690
 691       nir_foreach_block(nblock, function->impl) {
 692          ppir_block *block = ppir_get_block(comp, nblock);
 693          assert(block);
 694
 695          for (int i = 0; i < 2; i++) {
 696             if (nblock->successors[i])
 697                block->successors[i] = ppir_get_block(comp, nblock->successors[i]);
 698          }
 699       }
 700    }
 701
 702    foreach_list_typed(nir_register, reg, node, &func->registers) {
 703       ppir_reg *r = rzalloc(comp, ppir_reg);
 704       if (!r)
 705          return false;
 706
 707       r->index = reg->index;
 708       r->num_components = reg->num_components;
 709       r->live_in = INT_MAX;
 710       r->live_out = 0;
 711       r->is_head = false;
 712       list_addtail(&r->list, &comp->reg_list);
 713    }
 714
 715    if (!ppir_emit_cf_list(comp, &func->body))
 716       goto err_out0;
 717
 718    /* If we have discard block add it to the very end */
 719    if (comp->discard_block)
 720       list_addtail(&comp->discard_block->list, &comp->block_list);
 721
 722    ppir_node_print_prog(comp);
 723
 724    if (!ppir_lower_prog(comp))
 725       goto err_out0;
 726
 727    ppir_add_ordering_deps(comp);
 728    ppir_add_write_after_read_deps(comp);
 729
 730    ppir_node_print_prog(comp);
 731
 732    if (!ppir_node_to_instr(comp))
 733       goto err_out0;
 734
 735    if (!ppir_schedule_prog(comp))
 736       goto err_out0;
 737
 738    if (!ppir_regalloc_prog(comp))
 739       goto err_out0;
 740
 741    if (!ppir_codegen_prog(comp))
 742       goto err_out0;
 743
 744    ppir_print_shader_db(nir, comp, debug);
 745
 746    _mesa_hash_table_u64_destroy(comp->blocks, NULL);
 747    ralloc_free(comp);
 748    return true;
 749
 750 err_out0:
 751    _mesa_hash_table_u64_destroy(comp->blocks, NULL);
 752    ralloc_free(comp);
 753    return false;
 754 }
 755