lima: add summary report for shader-db
[mesa.git] / src / gallium / drivers / lima / ir / pp / nir.c
1 /*
2 * Copyright (c) 2017 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/bitscan.h"
29 #include "compiler/nir/nir.h"
30 #include "pipe/p_state.h"
31
32
33 #include "ppir.h"
34
35 static void *ppir_node_create_ssa(ppir_block *block, ppir_op op, nir_ssa_def *ssa)
36 {
37 ppir_node *node = ppir_node_create(block, op, ssa->index, 0);
38 if (!node)
39 return NULL;
40
41 ppir_dest *dest = ppir_node_get_dest(node);
42 dest->type = ppir_target_ssa;
43 dest->ssa.num_components = ssa->num_components;
44 dest->ssa.live_in = INT_MAX;
45 dest->ssa.live_out = 0;
46 dest->write_mask = u_bit_consecutive(0, ssa->num_components);
47
48 if (node->type == ppir_node_type_load ||
49 node->type == ppir_node_type_store)
50 dest->ssa.is_head = true;
51
52 return node;
53 }
54
55 static void *ppir_node_create_reg(ppir_block *block, ppir_op op,
56 nir_reg_dest *reg, unsigned mask)
57 {
58 ppir_node *node = ppir_node_create(block, op, reg->reg->index, mask);
59 if (!node)
60 return NULL;
61
62 ppir_dest *dest = ppir_node_get_dest(node);
63
64 list_for_each_entry(ppir_reg, r, &block->comp->reg_list, list) {
65 if (r->index == reg->reg->index) {
66 dest->reg = r;
67 break;
68 }
69 }
70
71 dest->type = ppir_target_register;
72 dest->write_mask = mask;
73
74 if (node->type == ppir_node_type_load ||
75 node->type == ppir_node_type_store)
76 dest->reg->is_head = true;
77
78 return node;
79 }
80
81 static void *ppir_node_create_dest(ppir_block *block, ppir_op op,
82 nir_dest *dest, unsigned mask)
83 {
84 unsigned index = -1;
85
86 if (dest) {
87 if (dest->is_ssa)
88 return ppir_node_create_ssa(block, op, &dest->ssa);
89 else
90 return ppir_node_create_reg(block, op, &dest->reg, mask);
91 }
92
93 return ppir_node_create(block, op, index, 0);
94 }
95
96 static void ppir_node_add_src(ppir_compiler *comp, ppir_node *node,
97 ppir_src *ps, nir_src *ns, unsigned mask)
98 {
99 ppir_node *child = NULL;
100
101 if (ns->is_ssa) {
102 child = comp->var_nodes[ns->ssa->index];
103 ppir_node_add_dep(node, child);
104 }
105 else {
106 nir_register *reg = ns->reg.reg;
107 while (mask) {
108 int swizzle = ps->swizzle[u_bit_scan(&mask)];
109 child = comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle];
110 ppir_node_add_dep(node, child);
111 }
112 }
113
114 ppir_dest *dest = ppir_node_get_dest(child);
115 ppir_node_target_assign(ps, dest);
116 }
117
118 static int nir_to_ppir_opcodes[nir_num_opcodes] = {
119 /* not supported */
120 [0 ... nir_last_opcode] = -1,
121
122 [nir_op_mov] = ppir_op_mov,
123 [nir_op_fmul] = ppir_op_mul,
124 [nir_op_fabs] = ppir_op_abs,
125 [nir_op_fneg] = ppir_op_neg,
126 [nir_op_fadd] = ppir_op_add,
127 [nir_op_fsum3] = ppir_op_sum3,
128 [nir_op_fsum4] = ppir_op_sum4,
129 [nir_op_frsq] = ppir_op_rsqrt,
130 [nir_op_flog2] = ppir_op_log2,
131 [nir_op_fexp2] = ppir_op_exp2,
132 [nir_op_fsqrt] = ppir_op_sqrt,
133 [nir_op_fsin] = ppir_op_sin,
134 [nir_op_fcos] = ppir_op_cos,
135 [nir_op_fmax] = ppir_op_max,
136 [nir_op_fmin] = ppir_op_min,
137 [nir_op_frcp] = ppir_op_rcp,
138 [nir_op_ffloor] = ppir_op_floor,
139 [nir_op_fceil] = ppir_op_ceil,
140 [nir_op_ffract] = ppir_op_fract,
141 [nir_op_sge] = ppir_op_ge,
142 [nir_op_fge] = ppir_op_ge,
143 [nir_op_slt] = ppir_op_lt,
144 [nir_op_flt] = ppir_op_lt,
145 [nir_op_seq] = ppir_op_eq,
146 [nir_op_feq] = ppir_op_eq,
147 [nir_op_sne] = ppir_op_ne,
148 [nir_op_fne] = ppir_op_ne,
149 [nir_op_fcsel] = ppir_op_select,
150 [nir_op_inot] = ppir_op_not,
151 [nir_op_ftrunc] = ppir_op_trunc,
152 [nir_op_fsat] = ppir_op_sat,
153 };
154
155 static ppir_node *ppir_emit_alu(ppir_block *block, nir_instr *ni)
156 {
157 nir_alu_instr *instr = nir_instr_as_alu(ni);
158 int op = nir_to_ppir_opcodes[instr->op];
159
160 if (op < 0) {
161 ppir_error("unsupported nir_op: %s\n", nir_op_infos[instr->op].name);
162 return NULL;
163 }
164
165 ppir_alu_node *node = ppir_node_create_dest(block, op, &instr->dest.dest,
166 instr->dest.write_mask);
167 if (!node)
168 return NULL;
169
170 ppir_dest *pd = &node->dest;
171 nir_alu_dest *nd = &instr->dest;
172 if (nd->saturate)
173 pd->modifier = ppir_outmod_clamp_fraction;
174
175 unsigned src_mask;
176 switch (op) {
177 case ppir_op_sum3:
178 src_mask = 0b0111;
179 break;
180 case ppir_op_sum4:
181 src_mask = 0b1111;
182 break;
183 default:
184 src_mask = pd->write_mask;
185 break;
186 }
187
188 unsigned num_child = nir_op_infos[instr->op].num_inputs;
189 node->num_src = num_child;
190
191 for (int i = 0; i < num_child; i++) {
192 nir_alu_src *ns = instr->src + i;
193 ppir_src *ps = node->src + i;
194 memcpy(ps->swizzle, ns->swizzle, sizeof(ps->swizzle));
195 ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask);
196
197 ps->absolute = ns->abs;
198 ps->negate = ns->negate;
199 }
200
201 return &node->node;
202 }
203
204 static ppir_block *ppir_block_create(ppir_compiler *comp);
205
206 static bool ppir_emit_discard_block(ppir_compiler *comp)
207 {
208 ppir_block *block = ppir_block_create(comp);
209 ppir_discard_node *discard;
210 if (!block)
211 return false;
212
213 comp->discard_block = block;
214 block->comp = comp;
215
216 discard = ppir_node_create(block, ppir_op_discard, -1, 0);
217 if (discard)
218 list_addtail(&discard->node.list, &block->node_list);
219 else
220 return false;
221
222 return true;
223 }
224
225 static ppir_node *ppir_emit_discard_if(ppir_block *block, nir_instr *ni)
226 {
227 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
228 ppir_node *node;
229 ppir_compiler *comp = block->comp;
230 ppir_branch_node *branch;
231
232 if (!comp->discard_block && !ppir_emit_discard_block(comp))
233 return NULL;
234
235 node = ppir_node_create(block, ppir_op_branch, -1, 0);
236 if (!node)
237 return NULL;
238 branch = ppir_node_to_branch(node);
239
240 /* second src and condition will be updated during lowering */
241 ppir_node_add_src(block->comp, node, &branch->src[0],
242 &instr->src[0], u_bit_consecutive(0, instr->num_components));
243 branch->target = comp->discard_block;
244
245 return node;
246 }
247
248 static ppir_node *ppir_emit_discard(ppir_block *block, nir_instr *ni)
249 {
250 ppir_node *node = ppir_node_create(block, ppir_op_discard, -1, 0);
251
252 return node;
253 }
254
255 static ppir_node *ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
256 {
257 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
258 unsigned mask = 0;
259 ppir_load_node *lnode;
260 ppir_store_node *snode;
261
262 switch (instr->intrinsic) {
263 case nir_intrinsic_load_input:
264 if (!instr->dest.is_ssa)
265 mask = u_bit_consecutive(0, instr->num_components);
266
267 lnode = ppir_node_create_dest(block, ppir_op_load_varying, &instr->dest, mask);
268 if (!lnode)
269 return NULL;
270
271 lnode->num_components = instr->num_components;
272 lnode->index = nir_intrinsic_base(instr) * 4 + nir_intrinsic_component(instr);
273 return &lnode->node;
274
275 case nir_intrinsic_load_frag_coord:
276 case nir_intrinsic_load_point_coord:
277 case nir_intrinsic_load_front_face:
278 if (!instr->dest.is_ssa)
279 mask = u_bit_consecutive(0, instr->num_components);
280
281 ppir_op op;
282 switch (instr->intrinsic) {
283 case nir_intrinsic_load_frag_coord:
284 op = ppir_op_load_fragcoord;
285 break;
286 case nir_intrinsic_load_point_coord:
287 op = ppir_op_load_pointcoord;
288 break;
289 case nir_intrinsic_load_front_face:
290 op = ppir_op_load_frontface;
291 break;
292 default:
293 assert(0);
294 break;
295 }
296
297 lnode = ppir_node_create_dest(block, op, &instr->dest, mask);
298 if (!lnode)
299 return NULL;
300
301 lnode->num_components = instr->num_components;
302 return &lnode->node;
303
304 case nir_intrinsic_load_uniform:
305 if (!instr->dest.is_ssa)
306 mask = u_bit_consecutive(0, instr->num_components);
307
308 lnode = ppir_node_create_dest(block, ppir_op_load_uniform, &instr->dest, mask);
309 if (!lnode)
310 return NULL;
311
312 lnode->num_components = instr->num_components;
313 lnode->index = nir_intrinsic_base(instr);
314 lnode->index += (uint32_t)nir_src_as_float(instr->src[0]);
315
316 return &lnode->node;
317
318 case nir_intrinsic_store_output:
319 snode = ppir_node_create_dest(block, ppir_op_store_color, NULL, 0);
320 if (!snode)
321 return NULL;
322
323 snode->index = nir_intrinsic_base(instr);
324
325 for (int i = 0; i < instr->num_components; i++)
326 snode->src.swizzle[i] = i;
327
328 ppir_node_add_src(block->comp, &snode->node, &snode->src, instr->src,
329 u_bit_consecutive(0, instr->num_components));
330
331 return &snode->node;
332
333 case nir_intrinsic_discard:
334 return ppir_emit_discard(block, ni);
335
336 case nir_intrinsic_discard_if:
337 return ppir_emit_discard_if(block, ni);
338
339 default:
340 ppir_error("unsupported nir_intrinsic_instr %s\n",
341 nir_intrinsic_infos[instr->intrinsic].name);
342 return NULL;
343 }
344 }
345
346 static ppir_node *ppir_emit_load_const(ppir_block *block, nir_instr *ni)
347 {
348 nir_load_const_instr *instr = nir_instr_as_load_const(ni);
349 ppir_const_node *node = ppir_node_create_ssa(block, ppir_op_const, &instr->def);
350 if (!node)
351 return NULL;
352
353 assert(instr->def.bit_size == 32);
354
355 for (int i = 0; i < instr->def.num_components; i++)
356 node->constant.value[i].i = instr->value[i].i32;
357 node->constant.num = instr->def.num_components;
358
359 return &node->node;
360 }
361
362 static ppir_node *ppir_emit_ssa_undef(ppir_block *block, nir_instr *ni)
363 {
364 ppir_error("nir_ssa_undef_instr not support\n");
365 return NULL;
366 }
367
368 static ppir_node *ppir_emit_tex(ppir_block *block, nir_instr *ni)
369 {
370 nir_tex_instr *instr = nir_instr_as_tex(ni);
371 ppir_load_texture_node *node;
372
373 if (instr->op != nir_texop_tex) {
374 ppir_error("unsupported texop %d\n", instr->op);
375 return NULL;
376 }
377
378 node = ppir_node_create_dest(block, ppir_op_load_texture, &instr->dest, 0);
379 if (!node)
380 return NULL;
381
382 node->sampler = instr->texture_index;
383
384 switch (instr->sampler_dim) {
385 case GLSL_SAMPLER_DIM_2D:
386 case GLSL_SAMPLER_DIM_RECT:
387 case GLSL_SAMPLER_DIM_EXTERNAL:
388 break;
389 default:
390 ppir_error("unsupported sampler dim: %d\n", instr->sampler_dim);
391 return NULL;
392 }
393
394 node->sampler_dim = instr->sampler_dim;
395
396 for (int i = 0; i < instr->coord_components; i++)
397 node->src_coords.swizzle[i] = i;
398
399 for (int i = 0; i < instr->num_srcs; i++) {
400 switch (instr->src[i].src_type) {
401 case nir_tex_src_coord:
402 ppir_node_add_src(block->comp, &node->node, &node->src_coords, &instr->src[i].src,
403 u_bit_consecutive(0, instr->coord_components));
404 break;
405 default:
406 ppir_error("unsupported texture source type\n");
407 assert(0);
408 return NULL;
409 }
410 }
411
412 return &node->node;
413 }
414
415 static ppir_node *ppir_emit_jump(ppir_block *block, nir_instr *ni)
416 {
417 ppir_error("nir_jump_instr not support\n");
418 return NULL;
419 }
420
421 static ppir_node *(*ppir_emit_instr[nir_instr_type_phi])(ppir_block *, nir_instr *) = {
422 [nir_instr_type_alu] = ppir_emit_alu,
423 [nir_instr_type_intrinsic] = ppir_emit_intrinsic,
424 [nir_instr_type_load_const] = ppir_emit_load_const,
425 [nir_instr_type_ssa_undef] = ppir_emit_ssa_undef,
426 [nir_instr_type_tex] = ppir_emit_tex,
427 [nir_instr_type_jump] = ppir_emit_jump,
428 };
429
430 static ppir_block *ppir_block_create(ppir_compiler *comp)
431 {
432 ppir_block *block = rzalloc(comp, ppir_block);
433 if (!block)
434 return NULL;
435
436 list_inithead(&block->node_list);
437 list_inithead(&block->instr_list);
438
439 return block;
440 }
441
442 static bool ppir_emit_block(ppir_compiler *comp, nir_block *nblock)
443 {
444 ppir_block *block = ppir_block_create(comp);
445 if (!block)
446 return false;
447
448 list_addtail(&block->list, &comp->block_list);
449 block->comp = comp;
450
451 nir_foreach_instr(instr, nblock) {
452 assert(instr->type < nir_instr_type_phi);
453 ppir_node *node = ppir_emit_instr[instr->type](block, instr);
454 if (!node)
455 return false;
456
457 list_addtail(&node->list, &block->node_list);
458 }
459
460 return true;
461 }
462
463 static bool ppir_emit_if(ppir_compiler *comp, nir_if *nif)
464 {
465 ppir_error("if nir_cf_node not support\n");
466 return false;
467 }
468
469 static bool ppir_emit_loop(ppir_compiler *comp, nir_loop *nloop)
470 {
471 ppir_error("loop nir_cf_node not support\n");
472 return false;
473 }
474
475 static bool ppir_emit_function(ppir_compiler *comp, nir_function_impl *nfunc)
476 {
477 ppir_error("function nir_cf_node not support\n");
478 return false;
479 }
480
481 static bool ppir_emit_cf_list(ppir_compiler *comp, struct exec_list *list)
482 {
483 foreach_list_typed(nir_cf_node, node, node, list) {
484 bool ret;
485
486 switch (node->type) {
487 case nir_cf_node_block:
488 ret = ppir_emit_block(comp, nir_cf_node_as_block(node));
489 break;
490 case nir_cf_node_if:
491 ret = ppir_emit_if(comp, nir_cf_node_as_if(node));
492 break;
493 case nir_cf_node_loop:
494 ret = ppir_emit_loop(comp, nir_cf_node_as_loop(node));
495 break;
496 case nir_cf_node_function:
497 ret = ppir_emit_function(comp, nir_cf_node_as_function(node));
498 break;
499 default:
500 ppir_error("unknown NIR node type %d\n", node->type);
501 return false;
502 }
503
504 if (!ret)
505 return false;
506 }
507
508 return true;
509 }
510
511 static ppir_compiler *ppir_compiler_create(void *prog, unsigned num_reg, unsigned num_ssa)
512 {
513 ppir_compiler *comp = rzalloc_size(
514 prog, sizeof(*comp) + ((num_reg << 2) + num_ssa) * sizeof(ppir_node *));
515 if (!comp)
516 return NULL;
517
518 list_inithead(&comp->block_list);
519 list_inithead(&comp->reg_list);
520
521 comp->var_nodes = (ppir_node **)(comp + 1);
522 comp->reg_base = num_ssa;
523 comp->prog = prog;
524 return comp;
525 }
526
527 static void ppir_add_ordering_deps(ppir_compiler *comp)
528 {
529 /* Some intrinsics do not have explicit dependencies and thus depend
530 * on instructions order. Consider discard_if and store_ouput as
531 * example. If we don't add fake dependency of discard_if to store_output
532 * scheduler may put store_output first and since store_output terminates
533 * shader on Utgard PP, rest of it will never be executed.
534 * Add fake dependencies for discard/branch/store to preserve
535 * instruction order.
536 *
537 * TODO: scheduler should schedule discard_if as early as possible otherwise
538 * we may end up with suboptimal code for cases like this:
539 *
540 * s3 = s1 < s2
541 * discard_if s3
542 * s4 = s1 + s2
543 * store s4
544 *
545 * In this case store depends on discard_if and s4, but since dependencies can
546 * be scheduled in any order it can result in code like this:
547 *
548 * instr1: s3 = s1 < s3
549 * instr2: s4 = s1 + s2
550 * instr3: discard_if s3
551 * instr4: store s4
552 */
553 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
554 ppir_node *prev_node = NULL;
555 list_for_each_entry(ppir_node, node, &block->node_list, list) {
556 if (node->type == ppir_node_type_discard ||
557 node->type == ppir_node_type_store ||
558 node->type == ppir_node_type_branch) {
559 if (prev_node)
560 ppir_node_add_dep(node, prev_node);
561 prev_node = node;
562 }
563 }
564 }
565 }
566
567 static void ppir_print_shader_db(struct nir_shader *nir, ppir_compiler *comp,
568 const struct pipe_debug_callback *debug)
569 {
570 const struct shader_info *info = &nir->info;
571 char *shaderdb;
572 int ret = asprintf(&shaderdb,
573 "%s shader: %d inst, %d loops, %d:%d spills:fills\n",
574 gl_shader_stage_name(info->stage),
575 comp->cur_instr_index,
576 comp->num_loops,
577 comp->num_spills,
578 comp->num_fills);
579 assert(ret >= 0);
580
581 if (lima_debug & LIMA_DEBUG_SHADERDB)
582 fprintf(stderr, "SHADER-DB: %s\n", shaderdb);
583
584 pipe_debug_message(debug, SHADER_INFO, "%s", shaderdb);
585 free(shaderdb);
586 }
587
588 bool ppir_compile_nir(struct lima_fs_shader_state *prog, struct nir_shader *nir,
589 struct ra_regs *ra,
590 const struct pipe_debug_callback *debug)
591 {
592 nir_function_impl *func = nir_shader_get_entrypoint(nir);
593 ppir_compiler *comp = ppir_compiler_create(prog, func->reg_alloc, func->ssa_alloc);
594 if (!comp)
595 return false;
596
597 comp->ra = ra;
598
599 foreach_list_typed(nir_register, reg, node, &func->registers) {
600 ppir_reg *r = rzalloc(comp, ppir_reg);
601 if (!r)
602 return false;
603
604 r->index = reg->index;
605 r->num_components = reg->num_components;
606 r->live_in = INT_MAX;
607 r->live_out = 0;
608 r->is_head = false;
609 list_addtail(&r->list, &comp->reg_list);
610 }
611
612 if (!ppir_emit_cf_list(comp, &func->body))
613 goto err_out0;
614
615 /* If we have discard block add it to the very end */
616 if (comp->discard_block)
617 list_addtail(&comp->discard_block->list, &comp->block_list);
618
619 ppir_add_ordering_deps(comp);
620
621 ppir_node_print_prog(comp);
622
623 if (!ppir_lower_prog(comp))
624 goto err_out0;
625
626 if (!ppir_node_to_instr(comp))
627 goto err_out0;
628
629 if (!ppir_schedule_prog(comp))
630 goto err_out0;
631
632 if (!ppir_regalloc_prog(comp))
633 goto err_out0;
634
635 if (!ppir_codegen_prog(comp))
636 goto err_out0;
637
638 ppir_print_shader_db(nir, comp, debug);
639
640 ralloc_free(comp);
641 return true;
642
643 err_out0:
644 ralloc_free(comp);
645 return false;
646 }
647