src/gallium/drivers/lima/ir/pp/node.c

   1 /*
   2  * Copyright (c) 2017 Lima Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include "util/u_math.h"
  26 #include "util/ralloc.h"
  27 #include "util/bitscan.h"
  28
  29 #include "ppir.h"
  30
  31 const ppir_op_info ppir_op_infos[] = {
  32    [ppir_op_mov] = {
  33       .name = "mov",
  34       .slots = (int []) {
  35          PPIR_INSTR_SLOT_ALU_SCL_ADD, PPIR_INSTR_SLOT_ALU_SCL_MUL,
  36          PPIR_INSTR_SLOT_ALU_VEC_ADD, PPIR_INSTR_SLOT_ALU_VEC_MUL,
  37          PPIR_INSTR_SLOT_END
  38       },
  39    },
  40    [ppir_op_mul] = {
  41       .name = "mul",
  42       .slots = (int []) {
  43          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_VEC_MUL,
  44          PPIR_INSTR_SLOT_END
  45       },
  46    },
  47    [ppir_op_add] = {
  48       .name = "add",
  49       .slots = (int []) {
  50          PPIR_INSTR_SLOT_ALU_SCL_ADD, PPIR_INSTR_SLOT_ALU_VEC_ADD,
  51          PPIR_INSTR_SLOT_END
  52       },
  53    },
  54    [ppir_op_dot2] = {
  55       .name = "dot2",
  56    },
  57    [ppir_op_dot3] = {
  58       .name = "dot3",
  59    },
  60    [ppir_op_dot4] = {
  61       .name = "dot4",
  62    },
  63    [ppir_op_sum3] = {
  64       .name = "sum3",
  65       .slots = (int []) {
  66          PPIR_INSTR_SLOT_ALU_VEC_ADD, PPIR_INSTR_SLOT_END
  67       },
  68    },
  69    [ppir_op_sum4] = {
  70       .name = "sum4",
  71       .slots = (int []) {
  72          PPIR_INSTR_SLOT_ALU_VEC_ADD, PPIR_INSTR_SLOT_END
  73       },
  74    },
  75    [ppir_op_rsqrt] = {
  76       .name = "rsqrt",
  77       .slots = (int []) {
  78          PPIR_INSTR_SLOT_ALU_COMBINE, PPIR_INSTR_SLOT_END
  79       },
  80    },
  81    [ppir_op_log2] = {
  82       .name = "log2",
  83       .slots = (int []) {
  84          PPIR_INSTR_SLOT_ALU_COMBINE, PPIR_INSTR_SLOT_END
  85       },
  86    },
  87    [ppir_op_exp2] = {
  88       .name = "exp2",
  89       .slots = (int []) {
  90          PPIR_INSTR_SLOT_ALU_COMBINE, PPIR_INSTR_SLOT_END
  91       },
  92    },
  93    [ppir_op_sqrt] = {
  94       .name = "sqrt",
  95       .slots = (int []) {
  96          PPIR_INSTR_SLOT_ALU_COMBINE, PPIR_INSTR_SLOT_END
  97       },
  98    },
  99    [ppir_op_sin] = {
 100       .name = "sin",
 101       .slots = (int []) {
 102          PPIR_INSTR_SLOT_ALU_COMBINE, PPIR_INSTR_SLOT_END
 103       },
 104    },
 105    [ppir_op_cos] = {
 106       .name = "cos",
 107       .slots = (int []) {
 108          PPIR_INSTR_SLOT_ALU_COMBINE, PPIR_INSTR_SLOT_END
 109       },
 110    },
 111    [ppir_op_max] = {
 112       .name = "max",
 113       .slots = (int []) {
 114          PPIR_INSTR_SLOT_ALU_SCL_ADD, PPIR_INSTR_SLOT_ALU_SCL_MUL,
 115          PPIR_INSTR_SLOT_ALU_VEC_ADD, PPIR_INSTR_SLOT_ALU_VEC_MUL,
 116          PPIR_INSTR_SLOT_END
 117       },
 118    },
 119    [ppir_op_min] = {
 120       .name = "min",
 121       .slots = (int []) {
 122          PPIR_INSTR_SLOT_ALU_SCL_ADD, PPIR_INSTR_SLOT_ALU_SCL_MUL,
 123          PPIR_INSTR_SLOT_ALU_VEC_ADD, PPIR_INSTR_SLOT_ALU_VEC_MUL,
 124          PPIR_INSTR_SLOT_END
 125       },
 126    },
 127    [ppir_op_floor] = {
 128       .name = "floor",
 129       .slots = (int []) {
 130          PPIR_INSTR_SLOT_ALU_SCL_ADD, PPIR_INSTR_SLOT_ALU_VEC_ADD,
 131          PPIR_INSTR_SLOT_END
 132       },
 133    },
 134    [ppir_op_fract] = {
 135       .name = "fract",
 136       .slots = (int []) {
 137          PPIR_INSTR_SLOT_ALU_SCL_ADD, PPIR_INSTR_SLOT_ALU_VEC_ADD,
 138          PPIR_INSTR_SLOT_END
 139       },
 140    },
 141    [ppir_op_and] = {
 142       .name = "and",
 143       .slots = (int []) {
 144          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_VEC_MUL,
 145          PPIR_INSTR_SLOT_END
 146       },
 147    },
 148    [ppir_op_or] = {
 149       .name = "or",
 150       .slots = (int []) {
 151          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_VEC_MUL,
 152          PPIR_INSTR_SLOT_END
 153       },
 154    },
 155    [ppir_op_xor] = {
 156       .name = "xor",
 157       .slots = (int []) {
 158          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_VEC_MUL,
 159          PPIR_INSTR_SLOT_END
 160       },
 161    },
 162    [ppir_op_not] = {
 163       .name = "not",
 164       .slots = (int []) {
 165          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_VEC_MUL,
 166          PPIR_INSTR_SLOT_END
 167       },
 168    },
 169    [ppir_op_lt] = {
 170       .name = "lt",
 171    },
 172    [ppir_op_le] = {
 173       .name = "le",
 174    },
 175    [ppir_op_gt] = {
 176       .name = "gt",
 177       .slots = (int []) {
 178          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_SCL_ADD,
 179          PPIR_INSTR_SLOT_ALU_VEC_MUL, PPIR_INSTR_SLOT_ALU_VEC_ADD,
 180          PPIR_INSTR_SLOT_END
 181       },
 182    },
 183    [ppir_op_ge] = {
 184       .name = "ge",
 185       .slots = (int []) {
 186          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_SCL_ADD,
 187          PPIR_INSTR_SLOT_ALU_VEC_MUL, PPIR_INSTR_SLOT_ALU_VEC_ADD,
 188          PPIR_INSTR_SLOT_END
 189       },
 190    },
 191    [ppir_op_eq] = {
 192       .name = "eq",
 193       .slots = (int []) {
 194          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_SCL_ADD,
 195          PPIR_INSTR_SLOT_ALU_VEC_MUL, PPIR_INSTR_SLOT_ALU_VEC_ADD,
 196          PPIR_INSTR_SLOT_END
 197       },
 198    },
 199    [ppir_op_ne] = {
 200       .name = "ne",
 201       .slots = (int []) {
 202          PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_ALU_SCL_ADD,
 203          PPIR_INSTR_SLOT_ALU_VEC_MUL, PPIR_INSTR_SLOT_ALU_VEC_ADD,
 204          PPIR_INSTR_SLOT_END
 205       },
 206    },
 207    [ppir_op_select] = {
 208       .name = "select",
 209       .slots = (int []) {
 210          PPIR_INSTR_SLOT_ALU_SCL_ADD, PPIR_INSTR_SLOT_ALU_VEC_ADD,
 211          PPIR_INSTR_SLOT_END
 212       },
 213    },
 214    [ppir_op_rcp] = {
 215       .name = "rcp",
 216       .slots = (int []) {
 217          PPIR_INSTR_SLOT_ALU_COMBINE, PPIR_INSTR_SLOT_END
 218       },
 219    },
 220    [ppir_op_load_varying] = {
 221       .name = "ld_var",
 222       .type = ppir_node_type_load,
 223       .slots = (int []) {
 224          PPIR_INSTR_SLOT_VARYING, PPIR_INSTR_SLOT_END
 225       },
 226    },
 227    [ppir_op_load_coords] = {
 228       .name = "ld_coords",
 229       .type = ppir_node_type_load,
 230       .slots = (int []) {
 231          PPIR_INSTR_SLOT_VARYING, PPIR_INSTR_SLOT_END
 232       },
 233    },
 234    [ppir_op_load_uniform] = {
 235       .name = "ld_uni",
 236       .type = ppir_node_type_load,
 237       .slots = (int []) {
 238          PPIR_INSTR_SLOT_UNIFORM, PPIR_INSTR_SLOT_END
 239       },
 240    },
 241    [ppir_op_load_texture] = {
 242       .name = "ld_tex",
 243       .type = ppir_node_type_load_texture,
 244       .slots = (int []) {
 245          PPIR_INSTR_SLOT_TEXLD, PPIR_INSTR_SLOT_END
 246       },
 247    },
 248    [ppir_op_load_temp] = {
 249       .name = "ld_temp",
 250       .type = ppir_node_type_load,
 251       .slots = (int []) {
 252          PPIR_INSTR_SLOT_UNIFORM, PPIR_INSTR_SLOT_END
 253       },
 254    },
 255    [ppir_op_const] = {
 256       .name = "const",
 257       .type = ppir_node_type_const,
 258    },
 259    [ppir_op_store_color] = {
 260       .name = "st_col",
 261       .type = ppir_node_type_store,
 262    },
 263    [ppir_op_store_temp] = {
 264       .name = "st_temp",
 265       .type = ppir_node_type_store,
 266       .slots = (int []) {
 267          PPIR_INSTR_SLOT_STORE_TEMP, PPIR_INSTR_SLOT_END
 268       },
 269    },
 270 };
 271
 272 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask)
 273 {
 274    ppir_compiler *comp = block->comp;
 275    static const int node_size[] = {
 276       [ppir_node_type_alu] = sizeof(ppir_alu_node),
 277       [ppir_node_type_const] = sizeof(ppir_const_node),
 278       [ppir_node_type_load] = sizeof(ppir_load_node),
 279       [ppir_node_type_store] = sizeof(ppir_store_node),
 280       [ppir_node_type_load_texture] = sizeof(ppir_load_texture_node),
 281    };
 282
 283    ppir_node_type type = ppir_op_infos[op].type;
 284    int size = node_size[type];
 285    ppir_node *node = rzalloc_size(block, size);
 286    if (!node)
 287       return NULL;
 288
 289    list_inithead(&node->succ_list);
 290    list_inithead(&node->pred_list);
 291
 292    if (index >= 0) {
 293       if (mask) {
 294          /* reg has 4 slots for each componemt write node */
 295          while (mask)
 296             comp->var_nodes[(index << 2) + comp->reg_base + u_bit_scan(&mask)] = node;
 297          snprintf(node->name, sizeof(node->name), "reg%d", index);
 298       } else {
 299          comp->var_nodes[index] = node;
 300          snprintf(node->name, sizeof(node->name), "ssa%d", index);
 301       }
 302    }
 303    else
 304       snprintf(node->name, sizeof(node->name), "new");
 305
 306    node->op = op;
 307    node->type = type;
 308    node->index = comp->cur_index++;
 309    node->block = block;
 310
 311    return node;
 312 }
 313
 314 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred)
 315 {
 316    /* don't add dep for two nodes from different block */
 317    if (succ->block != pred->block)
 318       return;
 319
 320    /* don't add duplicated dep */
 321    ppir_node_foreach_pred(succ, dep) {
 322       if (dep->pred == pred)
 323          return;
 324    }
 325
 326    ppir_dep *dep = ralloc(succ, ppir_dep);
 327    dep->pred = pred;
 328    dep->succ = succ;
 329    list_addtail(&dep->pred_link, &succ->pred_list);
 330    list_addtail(&dep->succ_link, &pred->succ_list);
 331 }
 332
 333 void ppir_node_remove_dep(ppir_dep *dep)
 334 {
 335    list_del(&dep->succ_link);
 336    list_del(&dep->pred_link);
 337    ralloc_free(dep);
 338 }
 339
 340 static void _ppir_node_replace_child(ppir_src *src, ppir_node *old_child, ppir_node *new_child)
 341 {
 342    ppir_dest *od = ppir_node_get_dest(old_child);
 343    if (ppir_node_target_equal(src, od)) {
 344       ppir_dest *nd = ppir_node_get_dest(new_child);
 345       ppir_node_target_assign(src, nd);
 346    }
 347 }
 348
 349 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child)
 350 {
 351    if (parent->type == ppir_node_type_alu) {
 352       ppir_alu_node *alu = ppir_node_to_alu(parent);
 353       for (int i = 0; i < alu->num_src; i++)
 354          _ppir_node_replace_child(alu->src + i, old_child, new_child);
 355    }
 356    else if (parent->type == ppir_node_type_store) {
 357       ppir_store_node *store = ppir_node_to_store(parent);
 358       _ppir_node_replace_child(&store->src, old_child, new_child);
 359    }
 360 }
 361
 362 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred)
 363 {
 364    list_del(&dep->succ_link);
 365    dep->pred = new_pred;
 366    list_addtail(&dep->succ_link, &new_pred->succ_list);
 367 }
 368
 369 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src)
 370 {
 371    ppir_node_foreach_succ_safe(src, dep) {
 372       ppir_node_replace_pred(dep, dst);
 373       ppir_node_replace_child(dep->succ, src, dst);
 374    }
 375 }
 376
 377 void ppir_node_delete(ppir_node *node)
 378 {
 379    ppir_node_foreach_succ_safe(node, dep)
 380       ppir_node_remove_dep(dep);
 381
 382    ppir_node_foreach_pred_safe(node, dep)
 383       ppir_node_remove_dep(dep);
 384
 385    list_del(&node->list);
 386    ralloc_free(node);
 387 }
 388
 389 static void ppir_node_print_node(ppir_node *node, int space)
 390 {
 391    for (int i = 0; i < space; i++)
 392       printf(" ");
 393    printf("%s%s %d %s\n", node->printed && !ppir_node_is_leaf(node) ? "+" : "",
 394           ppir_op_infos[node->op].name, node->index, node->name);
 395
 396    if (!node->printed) {
 397       ppir_node_foreach_pred(node, dep) {
 398          ppir_node *pred = dep->pred;
 399          ppir_node_print_node(pred, space + 2);
 400       }
 401
 402       node->printed = true;
 403    }
 404 }
 405
 406 void ppir_node_print_prog(ppir_compiler *comp)
 407 {
 408    if (!(lima_debug & LIMA_DEBUG_PP))
 409       return;
 410
 411    list_for_each_entry(ppir_block, block, &comp->block_list, list) {
 412       list_for_each_entry(ppir_node, node, &block->node_list, list) {
 413          node->printed = false;
 414       }
 415    }
 416
 417    printf("========prog========\n");
 418    list_for_each_entry(ppir_block, block, &comp->block_list, list) {
 419       printf("-------block------\n");
 420       list_for_each_entry(ppir_node, node, &block->node_list, list) {
 421          if (ppir_node_is_root(node))
 422             ppir_node_print_node(node, 0);
 423       }
 424    }
 425    printf("====================\n");
 426 }