lima/ppir: introduce liveness internal live set
[mesa.git] / src / gallium / drivers / lima / ir / pp / node_to_instr.c
1 /*
2 * Copyright (c) 2017 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include "ppir.h"
26
27
28 static bool create_new_instr(ppir_block *block, ppir_node *node)
29 {
30 ppir_instr *instr = ppir_instr_create(block);
31 if (unlikely(!instr))
32 return false;
33
34 if (!ppir_instr_insert_node(instr, node))
35 return false;
36
37 return true;
38 }
39
40 /*
41 * If a node has a pipeline dest, schedule it in the same instruction as its
42 * successor.
43 * Since it has a pipeline dest, it must have only one successor and since we
44 * schedule nodes backwards, its successor must have already been scheduled.
45 */
46 static bool ppir_do_node_to_instr_pipeline(ppir_block *block, ppir_node *node)
47 {
48 ppir_dest *dest = ppir_node_get_dest(node);
49
50 if (!dest || dest->type != ppir_target_pipeline)
51 return false;
52
53 assert(ppir_node_has_single_src_succ(node));
54 ppir_node *succ = ppir_node_first_succ(node);
55 assert(succ);
56 assert(succ->instr);
57
58 if (!ppir_instr_insert_node(succ->instr, node))
59 return false;
60
61 return true;
62 }
63
64 static bool ppir_do_one_node_to_instr(ppir_block *block, ppir_node *node, ppir_node **next)
65 {
66 switch (node->type) {
67 case ppir_node_type_alu:
68 {
69 /* don't create an instr for undef node */
70 if (node->op == ppir_op_undef)
71 break;
72
73 /* merge pred mul and succ add in the same instr can save a reg
74 * by using pipeline reg ^vmul/^fmul */
75 ppir_alu_node *alu = ppir_node_to_alu(node);
76 if (alu->dest.type == ppir_target_ssa &&
77 ppir_node_has_single_src_succ(node)) {
78 ppir_node *succ = ppir_node_first_succ(node);
79 if (succ->instr_pos == PPIR_INSTR_SLOT_ALU_VEC_ADD) {
80 node->instr_pos = PPIR_INSTR_SLOT_ALU_VEC_MUL;
81 ppir_instr_insert_mul_node(succ, node);
82 }
83 else if (succ->instr_pos == PPIR_INSTR_SLOT_ALU_SCL_ADD &&
84 alu->dest.ssa.num_components == 1) {
85 node->instr_pos = PPIR_INSTR_SLOT_ALU_SCL_MUL;
86 ppir_instr_insert_mul_node(succ, node);
87 }
88 }
89
90 /* can't inserted to any existing instr, create one */
91 if (!node->instr && !create_new_instr(block, node))
92 return false;
93
94 if (node->op == ppir_op_store_color)
95 node->instr->is_end = true;
96
97 break;
98 }
99 case ppir_node_type_load:
100 case ppir_node_type_load_texture:
101 {
102 if (!create_new_instr(block, node))
103 return false;
104
105 /* load varying output can be a register, it doesn't need a mov */
106 switch (node->op) {
107 case ppir_op_load_varying:
108 case ppir_op_load_coords:
109 case ppir_op_load_coords_reg:
110 case ppir_op_load_fragcoord:
111 case ppir_op_load_pointcoord:
112 case ppir_op_load_frontface:
113 return true;
114 default:
115 break;
116 }
117
118 /* Load cannot be pipelined, likely slot is already taken. Create a mov */
119 assert(ppir_node_has_single_src_succ(node));
120 ppir_dest *dest = ppir_node_get_dest(node);
121 assert(dest->type == ppir_target_pipeline);
122 ppir_pipeline pipeline_reg = dest->pipeline;
123
124 /* Turn dest back to SSA, so we can update predecessors */
125 ppir_node *succ = ppir_node_first_succ(node);
126 ppir_src *succ_src = ppir_node_get_src_for_pred(succ, node);
127 dest->type = ppir_target_ssa;
128 dest->ssa.index = -1;
129 ppir_node_target_assign(succ_src, node);
130
131 ppir_node *move = ppir_node_insert_mov(node);
132 if (unlikely(!move))
133 return false;
134
135 ppir_src *mov_src = ppir_node_get_src(move, 0);
136 mov_src->type = dest->type = ppir_target_pipeline;
137 mov_src->pipeline = dest->pipeline = pipeline_reg;
138
139 ppir_debug("node_to_instr create move %d for load %d\n",
140 move->index, node->index);
141
142 if (!ppir_instr_insert_node(node->instr, move))
143 return false;
144
145 break;
146 }
147 case ppir_node_type_const:
148 /* Const nodes are supposed to go through do_node_to_instr_pipeline() */
149 assert(false);
150 break;
151 case ppir_node_type_store:
152 {
153 if (node->op == ppir_op_store_temp) {
154 if (!create_new_instr(block, node))
155 return false;
156 break;
157 }
158 }
159 case ppir_node_type_discard:
160 if (!create_new_instr(block, node))
161 return false;
162 node->instr->is_end = true;
163 break;
164 case ppir_node_type_branch:
165 if (!create_new_instr(block, node))
166 return false;
167 break;
168 default:
169 return false;
170 }
171
172 return true;
173 }
174
175 static bool ppir_do_node_to_instr(ppir_block *block, ppir_node *node)
176 {
177 ppir_node *next = node;
178
179 /* first try pipeline sched, if that didn't succeed try normal scheduling */
180 if (!ppir_do_node_to_instr_pipeline(block, node))
181 if (!ppir_do_one_node_to_instr(block, node, &next))
182 return false;
183
184 /* next may have been updated in ppir_do_one_node_to_instr */
185 node = next;
186
187 /* we have to make sure the dep not be destroyed (due to
188 * succ change) in ppir_do_node_to_instr, otherwise we can't
189 * do recursion like this */
190 ppir_node_foreach_pred(node, dep) {
191 ppir_node *pred = dep->pred;
192 bool ready = true;
193
194 /* pred may already be processed by the previous pred
195 * (this pred may be both node and previous pred's child) */
196 if (pred->instr)
197 continue;
198
199 /* insert pred only when all its successors have been inserted */
200 ppir_node_foreach_succ(pred, dep) {
201 ppir_node *succ = dep->succ;
202 if (!succ->instr) {
203 ready = false;
204 break;
205 }
206 }
207
208 if (ready) {
209 if (!ppir_do_node_to_instr(block, pred))
210 return false;
211 }
212 }
213
214 return true;
215 }
216
217 static bool ppir_create_instr_from_node(ppir_compiler *comp)
218 {
219 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
220 list_for_each_entry(ppir_node, node, &block->node_list, list) {
221 if (ppir_node_is_root(node)) {
222 if (!ppir_do_node_to_instr(block, node))
223 return false;
224 }
225 }
226 }
227
228 return true;
229 }
230
231 static void ppir_build_instr_dependency(ppir_compiler *comp)
232 {
233 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
234 list_for_each_entry(ppir_instr, instr, &block->instr_list, list) {
235 for (int i = 0; i < PPIR_INSTR_SLOT_NUM; i++) {
236 ppir_node *node = instr->slots[i];
237 if (node) {
238 ppir_node_foreach_pred(node, dep) {
239 ppir_node *pred = dep->pred;
240 if (pred->instr && pred->instr != instr)
241 ppir_instr_add_dep(instr, pred->instr);
242 }
243 }
244 }
245 }
246 }
247 }
248
249 bool ppir_node_to_instr(ppir_compiler *comp)
250 {
251 if (!ppir_create_instr_from_node(comp))
252 return false;
253 ppir_instr_print_list(comp);
254
255 ppir_build_instr_dependency(comp);
256 ppir_instr_print_dep(comp);
257
258 return true;
259 }