gallium: add lima driver
[mesa.git] / src / gallium / drivers / lima / ir / pp / node_to_instr.c
1 /*
2 * Copyright (c) 2017 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include "ppir.h"
26
27
28 static bool create_new_instr(ppir_block *block, ppir_node *node)
29 {
30 ppir_instr *instr = ppir_instr_create(block);
31 if (unlikely(!instr))
32 return false;
33
34 if (!ppir_instr_insert_node(instr, node))
35 return false;
36
37 return true;
38 }
39
40 static bool insert_to_load_tex(ppir_block *block, ppir_node *load_coords, ppir_node *ldtex)
41 {
42 ppir_dest *dest = ppir_node_get_dest(ldtex);
43 ppir_node *move = NULL;
44
45 ppir_load_node *load = ppir_node_to_load(load_coords);
46 load->dest.type = ppir_target_pipeline;
47 load->dest.pipeline = ppir_pipeline_reg_discard;
48
49 ppir_load_texture_node *load_texture = ppir_node_to_load_texture(ldtex);
50 load_texture->src_coords.type = ppir_target_pipeline;
51 load_texture->src_coords.pipeline = ppir_pipeline_reg_discard;
52
53 /* Insert load_coords to ldtex instruction */
54 if (!ppir_instr_insert_node(ldtex->instr, load_coords))
55 return false;
56
57 /* Create move node */
58 move = ppir_node_create(block, ppir_op_mov, -1 , 0);
59 if (unlikely(!move))
60 return false;
61
62 ppir_debug("insert_load_tex: create move %d for %d\n",
63 move->index, ldtex->index);
64
65 ppir_alu_node *alu = ppir_node_to_alu(move);
66 alu->dest = *dest;
67
68 ppir_node_replace_all_succ(move, ldtex);
69
70 dest->type = ppir_target_pipeline;
71 dest->pipeline = ppir_pipeline_reg_sampler;
72
73 alu->num_src = 1;
74 ppir_node_target_assign(&alu->src[0], dest);
75 for (int i = 0; i < 4; i++)
76 alu->src->swizzle[i] = i;
77
78 ppir_node_add_dep(move, ldtex);
79 list_addtail(&move->list, &ldtex->list);
80
81 if (!ppir_instr_insert_node(ldtex->instr, move))
82 return false;
83
84 return true;
85 }
86
87 static bool insert_to_each_succ_instr(ppir_block *block, ppir_node *node)
88 {
89 ppir_dest *dest = ppir_node_get_dest(node);
90 assert(dest->type == ppir_target_ssa);
91
92 ppir_node *move = NULL;
93
94 ppir_node_foreach_succ_safe(node, dep) {
95 ppir_node *succ = dep->succ;
96 assert(succ->type == ppir_node_type_alu);
97
98 if (!ppir_instr_insert_node(succ->instr, node)) {
99 /* create a move node to insert for failed node */
100 if (!move) {
101 move = ppir_node_create(block, ppir_op_mov, -1, 0);
102 if (unlikely(!move))
103 return false;
104
105 ppir_debug("node_to_instr create move %d for %d\n",
106 move->index, node->index);
107
108 ppir_alu_node *alu = ppir_node_to_alu(move);
109 alu->dest = *dest;
110 alu->num_src = 1;
111 ppir_node_target_assign(alu->src, dest);
112 for (int i = 0; i < 4; i++)
113 alu->src->swizzle[i] = i;
114 }
115
116 ppir_node_replace_pred(dep, move);
117 ppir_node_replace_child(succ, node, move);
118 }
119 }
120
121 if (move) {
122 if (!create_new_instr(block, move))
123 return false;
124
125 MAYBE_UNUSED bool insert_result =
126 ppir_instr_insert_node(move->instr, node);
127 assert(insert_result);
128
129 ppir_node_add_dep(move, node);
130 list_addtail(&move->list, &node->list);
131 }
132
133 /* dupliacte node for each successor */
134
135 bool first = true;
136 struct list_head dup_list;
137 list_inithead(&dup_list);
138
139 ppir_node_foreach_succ_safe(node, dep) {
140 ppir_node *succ = dep->succ;
141
142 if (first) {
143 first = false;
144 node->instr = succ->instr;
145 continue;
146 }
147
148 if (succ->instr == node->instr)
149 continue;
150
151 list_for_each_entry(ppir_node, dup, &dup_list, list) {
152 if (succ->instr == dup->instr) {
153 ppir_node_replace_pred(dep, dup);
154 continue;
155 }
156 }
157
158 ppir_node *dup = ppir_node_create(block, node->op, -1, 0);
159 if (unlikely(!dup))
160 return false;
161 list_addtail(&dup->list, &dup_list);
162
163 ppir_debug("node_to_instr duplicate %s %d from %d\n",
164 ppir_op_infos[dup->op].name, dup->index, node->index);
165
166 ppir_instr *instr = succ->instr;
167 dup->instr = instr;
168 dup->instr_pos = node->instr_pos;
169 ppir_node_replace_pred(dep, dup);
170
171 if ((node->op == ppir_op_load_uniform) || (node->op == ppir_op_load_temp)) {
172 ppir_load_node *load = ppir_node_to_load(node);
173 ppir_load_node *dup_load = ppir_node_to_load(dup);
174 dup_load->dest = load->dest;
175 dup_load->index = load->index;
176 dup_load->num_components = load->num_components;
177 instr->slots[node->instr_pos] = dup;
178 }
179 }
180
181 list_splicetail(&dup_list, &node->list);
182
183 return true;
184 }
185
186 static bool ppir_do_node_to_instr(ppir_block *block, ppir_node *node)
187 {
188 switch (node->type) {
189 case ppir_node_type_alu:
190 {
191 /* merge pred mul and succ add in the same instr can save a reg
192 * by using pipeline reg ^vmul/^fmul */
193 ppir_alu_node *alu = ppir_node_to_alu(node);
194 if (alu->dest.type == ppir_target_ssa &&
195 ppir_node_has_single_succ(node)) {
196 ppir_node *succ = ppir_node_first_succ(node);
197 if (succ->instr_pos == PPIR_INSTR_SLOT_ALU_VEC_ADD) {
198 node->instr_pos = PPIR_INSTR_SLOT_ALU_VEC_MUL;
199 /* select instr's condition must be inserted to fmul slot */
200 if (succ->op == ppir_op_select &&
201 ppir_node_first_pred(succ) == node) {
202 assert(alu->dest.ssa.num_components == 1);
203 node->instr_pos = PPIR_INSTR_SLOT_ALU_SCL_MUL;
204 }
205 ppir_instr_insert_mul_node(succ, node);
206 }
207 else if (succ->instr_pos == PPIR_INSTR_SLOT_ALU_SCL_ADD &&
208 alu->dest.ssa.num_components == 1) {
209 node->instr_pos = PPIR_INSTR_SLOT_ALU_SCL_MUL;
210 ppir_instr_insert_mul_node(succ, node);
211 }
212 }
213
214 /* can't inserted to any existing instr, create one */
215 if (!node->instr && !create_new_instr(block, node))
216 return false;
217
218 break;
219 }
220 case ppir_node_type_load:
221 if ((node->op == ppir_op_load_uniform) || (node->op == ppir_op_load_temp)) {
222 /* merge pred load_uniform into succ instr can save a reg
223 * by using pipeline reg */
224 if (!insert_to_each_succ_instr(block, node))
225 return false;
226
227 ppir_load_node *load = ppir_node_to_load(node);
228 load->dest.type = ppir_target_pipeline;
229 load->dest.pipeline = ppir_pipeline_reg_uniform;
230 }
231 else if (node->op == ppir_op_load_temp) {
232 /* merge pred load_temp into succ instr can save a reg
233 * by using pipeline reg */
234 if (!insert_to_each_succ_instr(block, node))
235 return false;
236
237 ppir_load_node *load = ppir_node_to_load(node);
238 load->dest.type = ppir_target_pipeline;
239 load->dest.pipeline = ppir_pipeline_reg_uniform;
240 }
241 else if (node->op == ppir_op_load_varying) {
242 /* delay the load varying dup to scheduler */
243 if (!create_new_instr(block, node))
244 return false;
245 }
246 else if (node->op == ppir_op_load_coords) {
247 ppir_node *ldtex = ppir_node_first_succ(node);
248 if (!insert_to_load_tex(block, node, ldtex))
249 return false;
250 }
251 else {
252 /* not supported yet */
253 assert(0);
254 return false;
255 }
256 break;
257 case ppir_node_type_load_texture:
258 if (!create_new_instr(block, node))
259 return false;
260 break;
261 case ppir_node_type_const:
262 if (!insert_to_each_succ_instr(block, node))
263 return false;
264 break;
265 case ppir_node_type_store:
266 {
267 if (node->op == ppir_op_store_temp) {
268 if (!create_new_instr(block, node))
269 return false;
270 break;
271 }
272
273 /* Only the store color node should appear here.
274 * Currently we always insert a move node as the end instr.
275 * But it should only be done when:
276 * 1. store a const node
277 * 2. store a load node
278 * 3. store a reg assigned in another block like loop/if
279 */
280
281 assert(node->op == ppir_op_store_color);
282
283 ppir_node *move = ppir_node_create(block, ppir_op_mov, -1, 0);
284 if (unlikely(!move))
285 return false;
286
287 ppir_debug("node_to_instr create move %d from store %d\n",
288 move->index, node->index);
289
290 ppir_node_foreach_pred_safe(node, dep) {
291 ppir_node *pred = dep->pred;
292 /* we can't do this in this function except here as this
293 * store is the root of this recursion */
294 ppir_node_remove_dep(dep);
295 ppir_node_add_dep(move, pred);
296 }
297
298 ppir_node_add_dep(node, move);
299 list_addtail(&move->list, &node->list);
300
301 ppir_alu_node *alu = ppir_node_to_alu(move);
302 ppir_store_node *store = ppir_node_to_store(node);
303 alu->src[0] = store->src;
304 alu->num_src = 1;
305
306 alu->dest.type = ppir_target_ssa;
307 alu->dest.ssa.num_components = 4;
308 alu->dest.ssa.live_in = INT_MAX;
309 alu->dest.ssa.live_out = 0;
310 alu->dest.write_mask = 0xf;
311
312 store->src.type = ppir_target_ssa;
313 store->src.ssa = &alu->dest.ssa;
314
315 if (!create_new_instr(block, move))
316 return false;
317
318 move->instr->is_end = true;
319 node->instr = move->instr;
320
321 /* use move for the following recursion */
322 node = move;
323 break;
324 }
325 default:
326 return false;
327 }
328
329 /* we have to make sure the dep not be destroyed (due to
330 * succ change) in ppir_do_node_to_instr, otherwise we can't
331 * do recursion like this */
332 ppir_node_foreach_pred(node, dep) {
333 ppir_node *pred = dep->pred;
334 bool ready = true;
335
336 /* pred may already be processed by the previous pred
337 * (this pred may be both node and previous pred's child) */
338 if (pred->instr)
339 continue;
340
341 /* insert pred only when all its successors have been inserted */
342 ppir_node_foreach_succ(pred, dep) {
343 ppir_node *succ = dep->succ;
344 if (!succ->instr) {
345 ready = false;
346 break;
347 }
348 }
349
350 if (ready) {
351 if (!ppir_do_node_to_instr(block, pred))
352 return false;
353 }
354 }
355
356 return true;
357 }
358
359 static bool ppir_create_instr_from_node(ppir_compiler *comp)
360 {
361 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
362 list_for_each_entry(ppir_node, node, &block->node_list, list) {
363 if (ppir_node_is_root(node)) {
364 if (!ppir_do_node_to_instr(block, node))
365 return false;
366 }
367 }
368 }
369
370 return true;
371 }
372
373 static void ppir_build_instr_dependency(ppir_compiler *comp)
374 {
375 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
376 list_for_each_entry(ppir_instr, instr, &block->instr_list, list) {
377 for (int i = 0; i < PPIR_INSTR_SLOT_NUM; i++) {
378 ppir_node *node = instr->slots[i];
379 if (node) {
380 ppir_node_foreach_pred(node, dep) {
381 ppir_node *pred = dep->pred;
382 if (pred->instr && pred->instr != instr)
383 ppir_instr_add_dep(instr, pred->instr);
384 }
385 }
386 }
387 }
388 }
389 }
390
391 bool ppir_node_to_instr(ppir_compiler *comp)
392 {
393 if (!ppir_create_instr_from_node(comp))
394 return false;
395 ppir_instr_print_list(comp);
396
397 ppir_build_instr_dependency(comp);
398 ppir_instr_print_dep(comp);
399
400 return true;
401 }