src/gallium/drivers/lima/ir/pp/ppir.h

   1 /*
   2  * Copyright (c) 2017 Lima Project
   3  * Copyright (c) 2013 Connor Abbott
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy
   6  * of this software and associated documentation files (the "Software"), to deal
   7  * in the Software without restriction, including without limitation the rights
   8  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9  * copies of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21  * THE SOFTWARE.
  22  *
  23  */
  24
  25 #ifndef LIMA_IR_PP_PPIR_H
  26 #define LIMA_IR_PP_PPIR_H
  27
  28 #include "util/u_math.h"
  29 #include "util/list.h"
  30
  31 #include "ir/lima_ir.h"
  32
  33 typedef enum {
  34    ppir_op_mov,
  35    ppir_op_add,
  36
  37    ppir_op_ddx,
  38    ppir_op_ddy,
  39
  40    ppir_op_mul,
  41    ppir_op_rcp,
  42
  43    ppir_op_sin_lut,
  44    ppir_op_cos_lut,
  45
  46    ppir_op_sum3,
  47    ppir_op_sum4,
  48
  49    ppir_op_normalize2,
  50    ppir_op_normalize3,
  51    ppir_op_normalize4,
  52
  53    ppir_op_select,
  54
  55    ppir_op_sin,
  56    ppir_op_cos,
  57    ppir_op_tan,
  58    ppir_op_asin,
  59    ppir_op_acos,
  60
  61    ppir_op_atan,
  62    ppir_op_atan2,
  63    ppir_op_atan_pt1,
  64    ppir_op_atan2_pt1,
  65    ppir_op_atan_pt2,
  66
  67    ppir_op_exp,
  68    ppir_op_log,
  69    ppir_op_exp2,
  70    ppir_op_log2,
  71    ppir_op_sqrt,
  72    ppir_op_rsqrt,
  73
  74    ppir_op_sign,
  75    ppir_op_floor,
  76    ppir_op_ceil,
  77    ppir_op_fract,
  78    ppir_op_mod,
  79    ppir_op_min,
  80    ppir_op_max,
  81
  82    ppir_op_dot2,
  83    ppir_op_dot3,
  84    ppir_op_dot4,
  85
  86    ppir_op_and,
  87    ppir_op_or,
  88    ppir_op_xor,
  89
  90    ppir_op_lt,
  91    ppir_op_gt,
  92    ppir_op_le,
  93    ppir_op_ge,
  94    ppir_op_eq,
  95    ppir_op_ne,
  96    ppir_op_not,
  97
  98    ppir_op_load_uniform,
  99    ppir_op_load_varying,
 100    ppir_op_load_coords,
 101    ppir_op_load_fragcoord,
 102    ppir_op_load_texture,
 103    ppir_op_load_temp,
 104
 105    ppir_op_store_temp,
 106    ppir_op_store_color,
 107
 108    ppir_op_const,
 109
 110    ppir_op_num,
 111 } ppir_op;
 112
 113 typedef enum {
 114    ppir_node_type_alu,
 115    ppir_node_type_const,
 116    ppir_node_type_load,
 117    ppir_node_type_store,
 118    ppir_node_type_load_texture,
 119 } ppir_node_type;
 120
 121 typedef struct {
 122    char *name;
 123    ppir_node_type type;
 124    int *slots;
 125 } ppir_op_info;
 126
 127 extern const ppir_op_info ppir_op_infos[];
 128
 129 typedef struct {
 130    void *pred, *succ;
 131    struct list_head pred_link;
 132    struct list_head succ_link;
 133 } ppir_dep;
 134
 135 typedef struct ppir_node {
 136    struct list_head list;
 137    ppir_op op;
 138    ppir_node_type type;
 139    int index;
 140    char name[16];
 141    bool printed;
 142    struct ppir_instr *instr;
 143    int instr_pos;
 144    struct ppir_block *block;
 145
 146    /* for scheduler */
 147    struct list_head succ_list;
 148    struct list_head pred_list;
 149 } ppir_node;
 150
 151 typedef enum {
 152    ppir_pipeline_reg_const0,
 153    ppir_pipeline_reg_const1,
 154    ppir_pipeline_reg_sampler,
 155    ppir_pipeline_reg_uniform,
 156    ppir_pipeline_reg_vmul,
 157    ppir_pipeline_reg_fmul,
 158    ppir_pipeline_reg_discard, /* varying load */
 159 } ppir_pipeline;
 160
 161 typedef struct ppir_reg {
 162    struct list_head list;
 163    int index;
 164    int num_components;
 165    /* whether this reg has to start from the x component
 166     * of a full physical reg, this is true for reg used
 167     * in load/store instr which has no swizzle field
 168     */
 169    bool is_head;
 170    /* instr live range */
 171    int live_in, live_out;
 172    bool spilled;
 173 } ppir_reg;
 174
 175 typedef enum {
 176    ppir_target_ssa,
 177    ppir_target_pipeline,
 178    ppir_target_register,
 179 } ppir_target;
 180
 181 typedef struct ppir_src {
 182    ppir_target type;
 183
 184    union {
 185       ppir_reg *ssa;
 186       ppir_reg *reg;
 187       ppir_pipeline pipeline;
 188    };
 189
 190    uint8_t swizzle[4];
 191    bool absolute, negate;
 192 } ppir_src;
 193
 194 typedef enum {
 195    ppir_outmod_none,
 196    ppir_outmod_clamp_fraction,
 197    ppir_outmod_clamp_positive,
 198    ppir_outmod_round,
 199 } ppir_outmod;
 200
 201 typedef struct ppir_dest {
 202    ppir_target type;
 203
 204    union {
 205       ppir_reg ssa;
 206       ppir_reg *reg;
 207       ppir_pipeline pipeline;
 208    };
 209
 210    ppir_outmod modifier;
 211    unsigned write_mask : 4;
 212 } ppir_dest;
 213
 214 typedef struct {
 215    ppir_node node;
 216    ppir_dest dest;
 217    ppir_src src[3];
 218    int num_src;
 219    int shift : 3; /* Only used for ppir_op_mul */
 220 } ppir_alu_node;
 221
 222 typedef struct ppir_const {
 223    union fi value[4];
 224    int num;
 225 } ppir_const;
 226
 227 typedef struct {
 228    ppir_node node;
 229    ppir_const constant;
 230    ppir_dest dest;
 231 } ppir_const_node;
 232
 233 typedef struct {
 234    ppir_node node;
 235    int index;
 236    int num_components;
 237    ppir_dest dest;
 238    ppir_src src;
 239 } ppir_load_node;
 240
 241 typedef struct {
 242    ppir_node node;
 243    int index;
 244    int num_components;
 245    ppir_src src;
 246 } ppir_store_node;
 247
 248 typedef struct {
 249    ppir_node node;
 250    ppir_dest dest;
 251    ppir_src src_coords;
 252    int sampler;
 253    int sampler_dim;
 254 } ppir_load_texture_node;
 255
 256 enum ppir_instr_slot {
 257    PPIR_INSTR_SLOT_VARYING,
 258    PPIR_INSTR_SLOT_TEXLD,
 259    PPIR_INSTR_SLOT_UNIFORM,
 260    PPIR_INSTR_SLOT_ALU_VEC_MUL,
 261    PPIR_INSTR_SLOT_ALU_SCL_MUL,
 262    PPIR_INSTR_SLOT_ALU_VEC_ADD,
 263    PPIR_INSTR_SLOT_ALU_SCL_ADD,
 264    PPIR_INSTR_SLOT_ALU_COMBINE,
 265    PPIR_INSTR_SLOT_STORE_TEMP,
 266    PPIR_INSTR_SLOT_NUM,
 267    PPIR_INSTR_SLOT_END,
 268    PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
 269    PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
 270 };
 271
 272 typedef struct ppir_instr {
 273    struct list_head list;
 274    int index;
 275    bool printed;
 276    int seq; /* command sequence after schedule */
 277
 278    ppir_node *slots[PPIR_INSTR_SLOT_NUM];
 279    ppir_const constant[2];
 280    bool is_end;
 281
 282    /* for scheduler */
 283    struct list_head succ_list;
 284    struct list_head pred_list;
 285    float reg_pressure;
 286    int est; /* earliest start time */
 287    int parent_index;
 288    bool scheduled;
 289 } ppir_instr;
 290
 291 typedef struct ppir_block {
 292    struct list_head list;
 293    struct list_head node_list;
 294    struct list_head instr_list;
 295    struct ppir_compiler *comp;
 296
 297    /* for scheduler */
 298    int sched_instr_index;
 299    int sched_instr_base;
 300 } ppir_block;
 301
 302 struct ra_regs;
 303 struct lima_fs_shader_state;
 304
 305 typedef struct ppir_compiler {
 306    struct list_head block_list;
 307    int cur_index;
 308    int cur_instr_index;
 309
 310    struct list_head reg_list;
 311
 312    /* array for searching ssa/reg node */
 313    ppir_node **var_nodes;
 314    unsigned reg_base;
 315
 316    struct ra_regs *ra;
 317    struct lima_fs_shader_state *prog;
 318
 319    /* for scheduler */
 320    int sched_instr_base;
 321
 322    /* for regalloc spilling debug */
 323    int force_spilling;
 324 } ppir_compiler;
 325
 326 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
 327 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred);
 328 void ppir_node_remove_dep(ppir_dep *dep);
 329 void ppir_node_delete(ppir_node *node);
 330 void ppir_node_print_prog(ppir_compiler *comp);
 331 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
 332 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
 333 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
 334
 335 static inline bool ppir_node_is_root(ppir_node *node)
 336 {
 337    return list_empty(&node->succ_list);
 338 }
 339
 340 static inline bool ppir_node_is_leaf(ppir_node *node)
 341 {
 342    return list_empty(&node->pred_list);
 343 }
 344
 345 static inline bool ppir_node_has_single_succ(ppir_node *node)
 346 {
 347    return list_is_singular(&node->succ_list);
 348 }
 349
 350 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
 351 {
 352    return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
 353 }
 354
 355 static inline bool ppir_node_has_single_pred(ppir_node *node)
 356 {
 357    return list_is_singular(&node->pred_list);
 358 }
 359
 360 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
 361 {
 362    return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
 363 }
 364
 365 #define ppir_node_foreach_succ(node, dep) \
 366    list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
 367 #define ppir_node_foreach_succ_safe(node, dep) \
 368    list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
 369 #define ppir_node_foreach_pred(node, dep) \
 370    list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
 371 #define ppir_node_foreach_pred_safe(node, dep) \
 372    list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
 373
 374 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
 375 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
 376 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
 377 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
 378 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
 379
 380 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
 381 {
 382    switch (node->type) {
 383    case ppir_node_type_alu:
 384       return &ppir_node_to_alu(node)->dest;
 385    case ppir_node_type_load:
 386       return &ppir_node_to_load(node)->dest;
 387    case ppir_node_type_const:
 388       return &ppir_node_to_const(node)->dest;
 389    case ppir_node_type_load_texture:
 390       return &ppir_node_to_load_texture(node)->dest;
 391    default:
 392       return NULL;
 393    }
 394 }
 395
 396 static inline void ppir_node_target_assign(ppir_src *src, ppir_dest *dest)
 397 {
 398    src->type = dest->type;
 399    switch (src->type) {
 400    case ppir_target_ssa:
 401       src->ssa = &dest->ssa;
 402       break;
 403    case ppir_target_register:
 404       src->reg = dest->reg;
 405       break;
 406    case ppir_target_pipeline:
 407       src->pipeline = dest->pipeline;
 408       break;
 409    }
 410 }
 411
 412 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
 413 {
 414    if (src->type != dest->type ||
 415        (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
 416        (src->type == ppir_target_register && src->reg != dest->reg) ||
 417        (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
 418       return false;
 419
 420    return true;
 421 }
 422
 423 static inline int ppir_target_get_src_reg_index(ppir_src *src)
 424 {
 425    switch (src->type) {
 426    case ppir_target_ssa:
 427       return src->ssa->index;
 428    case ppir_target_register:
 429       return src->reg->index;
 430    case ppir_target_pipeline:
 431       if (src->pipeline == ppir_pipeline_reg_discard)
 432          return 15 * 4;
 433       return (src->pipeline + 12) * 4;
 434    }
 435
 436    return -1;
 437 }
 438
 439 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
 440 {
 441    switch (dest->type) {
 442    case ppir_target_ssa:
 443       return dest->ssa.index;
 444    case ppir_target_register:
 445       return dest->reg->index;
 446    case ppir_target_pipeline:
 447       if (dest->pipeline == ppir_pipeline_reg_discard)
 448          return 15 * 4;
 449       return (dest->pipeline + 12) * 4;
 450    }
 451
 452    return -1;
 453 }
 454
 455 static inline bool ppir_target_is_scaler(ppir_dest *dest)
 456 {
 457    switch (dest->type) {
 458    case ppir_target_ssa:
 459       return dest->ssa.num_components == 1;
 460    case ppir_target_register:
 461       /* only one bit in mask is set */
 462       if ((dest->write_mask & 0x3) == 0x3 ||
 463           (dest->write_mask & 0x5) == 0x5 ||
 464           (dest->write_mask & 0x9) == 0x9 ||
 465           (dest->write_mask & 0x6) == 0x6 ||
 466           (dest->write_mask & 0xa) == 0xa ||
 467           (dest->write_mask & 0xc) == 0xc)
 468          return false;
 469       else
 470          return true;
 471    case ppir_target_pipeline:
 472       if (dest->pipeline == ppir_pipeline_reg_fmul)
 473          return true;
 474       else
 475          return false;
 476    default:
 477       return false;
 478    }
 479 }
 480
 481 ppir_instr *ppir_instr_create(ppir_block *block);
 482 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
 483 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
 484 void ppir_instr_print_list(ppir_compiler *comp);
 485 void ppir_instr_print_dep(ppir_compiler *comp);
 486 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
 487
 488 #define ppir_instr_foreach_succ(instr, dep) \
 489    list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
 490 #define ppir_instr_foreach_succ_safe(instr, dep) \
 491    list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
 492 #define ppir_instr_foreach_pred(instr, dep) \
 493    list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
 494 #define ppir_instr_foreach_pred_safe(instr, dep) \
 495    list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
 496
 497 static inline bool ppir_instr_is_root(ppir_instr *instr)
 498 {
 499    return list_empty(&instr->succ_list);
 500 }
 501
 502 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
 503 {
 504    return list_empty(&instr->pred_list);
 505 }
 506
 507 bool ppir_lower_prog(ppir_compiler *comp);
 508 bool ppir_node_to_instr(ppir_compiler *comp);
 509 bool ppir_schedule_prog(ppir_compiler *comp);
 510 bool ppir_regalloc_prog(ppir_compiler *comp);
 511 bool ppir_codegen_prog(ppir_compiler *comp);
 512
 513 #endif