b1de7b5a7d868c18a40a4b1b66e689ead918d057
[mesa.git] / src / gallium / drivers / lima / ir / pp / ppir.h
1 /*
2 * Copyright (c) 2017 Lima Project
3 * Copyright (c) 2013 Connor Abbott
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 * THE SOFTWARE.
22 *
23 */
24
25 #ifndef LIMA_IR_PP_PPIR_H
26 #define LIMA_IR_PP_PPIR_H
27
28 #include "util/u_math.h"
29 #include "util/list.h"
30
31 #include "ir/lima_ir.h"
32
33 typedef enum {
34 ppir_op_mov,
35 ppir_op_abs,
36 ppir_op_neg,
37 ppir_op_sat,
38 ppir_op_add,
39
40 ppir_op_ddx,
41 ppir_op_ddy,
42
43 ppir_op_mul,
44 ppir_op_rcp,
45
46 ppir_op_sin_lut,
47 ppir_op_cos_lut,
48
49 ppir_op_sum3,
50 ppir_op_sum4,
51
52 ppir_op_normalize2,
53 ppir_op_normalize3,
54 ppir_op_normalize4,
55
56 ppir_op_sel_cond,
57 ppir_op_select,
58
59 ppir_op_sin,
60 ppir_op_cos,
61 ppir_op_tan,
62 ppir_op_asin,
63 ppir_op_acos,
64
65 ppir_op_atan,
66 ppir_op_atan2,
67 ppir_op_atan_pt1,
68 ppir_op_atan2_pt1,
69 ppir_op_atan_pt2,
70
71 ppir_op_exp,
72 ppir_op_log,
73 ppir_op_exp2,
74 ppir_op_log2,
75 ppir_op_sqrt,
76 ppir_op_rsqrt,
77
78 ppir_op_sign,
79 ppir_op_floor,
80 ppir_op_ceil,
81 ppir_op_fract,
82 ppir_op_mod,
83 ppir_op_min,
84 ppir_op_max,
85 ppir_op_trunc,
86
87 ppir_op_and,
88 ppir_op_or,
89 ppir_op_xor,
90
91 ppir_op_lt,
92 ppir_op_gt,
93 ppir_op_le,
94 ppir_op_ge,
95 ppir_op_eq,
96 ppir_op_ne,
97 ppir_op_not,
98
99 ppir_op_load_uniform,
100 ppir_op_load_varying,
101 ppir_op_load_coords,
102 ppir_op_load_fragcoord,
103 ppir_op_load_pointcoord,
104 ppir_op_load_frontface,
105 ppir_op_load_texture,
106 ppir_op_load_temp,
107
108 ppir_op_store_temp,
109 ppir_op_store_color,
110
111 ppir_op_const,
112
113 ppir_op_discard,
114 ppir_op_branch,
115
116 ppir_op_undef,
117
118 ppir_op_num,
119 } ppir_op;
120
121 typedef enum {
122 ppir_node_type_alu,
123 ppir_node_type_const,
124 ppir_node_type_load,
125 ppir_node_type_store,
126 ppir_node_type_load_texture,
127 ppir_node_type_discard,
128 ppir_node_type_branch,
129 } ppir_node_type;
130
131 typedef struct {
132 char *name;
133 ppir_node_type type;
134 int *slots;
135 } ppir_op_info;
136
137 extern const ppir_op_info ppir_op_infos[];
138
139 typedef struct {
140 void *pred, *succ;
141 struct list_head pred_link;
142 struct list_head succ_link;
143 } ppir_dep;
144
145 typedef struct ppir_node {
146 struct list_head list;
147 ppir_op op;
148 ppir_node_type type;
149 int index;
150 char name[16];
151 bool printed;
152 struct ppir_instr *instr;
153 int instr_pos;
154 struct ppir_block *block;
155
156 /* for scheduler */
157 struct list_head succ_list;
158 struct list_head pred_list;
159 } ppir_node;
160
161 typedef enum {
162 ppir_pipeline_reg_const0,
163 ppir_pipeline_reg_const1,
164 ppir_pipeline_reg_sampler,
165 ppir_pipeline_reg_uniform,
166 ppir_pipeline_reg_vmul,
167 ppir_pipeline_reg_fmul,
168 ppir_pipeline_reg_discard, /* varying load */
169 } ppir_pipeline;
170
171 typedef struct ppir_reg {
172 struct list_head list;
173 int index;
174 int regalloc_index;
175 int num_components;
176 /* whether this reg has to start from the x component
177 * of a full physical reg, this is true for reg used
178 * in load/store instr which has no swizzle field
179 */
180 bool is_head;
181 /* instr live range */
182 int live_in, live_out;
183 bool spilled;
184 } ppir_reg;
185
186 typedef enum {
187 ppir_target_ssa,
188 ppir_target_pipeline,
189 ppir_target_register,
190 } ppir_target;
191
192 typedef struct ppir_src {
193 ppir_target type;
194 ppir_node *node;
195
196 union {
197 ppir_reg *ssa;
198 ppir_reg *reg;
199 ppir_pipeline pipeline;
200 };
201
202 uint8_t swizzle[4];
203 bool absolute, negate;
204 } ppir_src;
205
206 typedef enum {
207 ppir_outmod_none,
208 ppir_outmod_clamp_fraction,
209 ppir_outmod_clamp_positive,
210 ppir_outmod_round,
211 } ppir_outmod;
212
213 typedef struct ppir_dest {
214 ppir_target type;
215
216 union {
217 ppir_reg ssa;
218 ppir_reg *reg;
219 ppir_pipeline pipeline;
220 };
221
222 ppir_outmod modifier;
223 unsigned write_mask : 4;
224 } ppir_dest;
225
226 typedef struct {
227 ppir_node node;
228 ppir_dest dest;
229 ppir_src src[3];
230 int num_src;
231 int shift : 3; /* Only used for ppir_op_mul */
232 } ppir_alu_node;
233
234 typedef struct ppir_const {
235 union fi value[4];
236 int num;
237 } ppir_const;
238
239 typedef struct {
240 ppir_node node;
241 ppir_const constant;
242 ppir_dest dest;
243 } ppir_const_node;
244
245 typedef struct {
246 ppir_node node;
247 int index;
248 int num_components;
249 ppir_dest dest;
250 ppir_src src;
251 int num_src;
252 } ppir_load_node;
253
254 typedef struct {
255 ppir_node node;
256 int index;
257 int num_components;
258 ppir_src src;
259 } ppir_store_node;
260
261 typedef struct {
262 ppir_node node;
263 ppir_dest dest;
264 ppir_src src_coords; /* not to be used after lowering */
265 int sampler;
266 int sampler_dim;
267 } ppir_load_texture_node;
268
269 typedef struct {
270 ppir_node node;
271 } ppir_discard_node;
272
273 enum ppir_instr_slot {
274 PPIR_INSTR_SLOT_VARYING,
275 PPIR_INSTR_SLOT_TEXLD,
276 PPIR_INSTR_SLOT_UNIFORM,
277 PPIR_INSTR_SLOT_ALU_VEC_MUL,
278 PPIR_INSTR_SLOT_ALU_SCL_MUL,
279 PPIR_INSTR_SLOT_ALU_VEC_ADD,
280 PPIR_INSTR_SLOT_ALU_SCL_ADD,
281 PPIR_INSTR_SLOT_ALU_COMBINE,
282 PPIR_INSTR_SLOT_STORE_TEMP,
283 PPIR_INSTR_SLOT_BRANCH,
284 PPIR_INSTR_SLOT_NUM,
285 PPIR_INSTR_SLOT_END,
286 PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
287 PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
288 };
289
290 typedef struct ppir_instr {
291 struct list_head list;
292 int index;
293 bool printed;
294 int seq; /* command sequence after schedule */
295
296 ppir_node *slots[PPIR_INSTR_SLOT_NUM];
297 ppir_const constant[2];
298 bool is_end;
299
300 /* for scheduler */
301 struct list_head succ_list;
302 struct list_head pred_list;
303 float reg_pressure;
304 int est; /* earliest start time */
305 int parent_index;
306 bool scheduled;
307 int offset;
308 int encode_size;
309 } ppir_instr;
310
311 typedef struct ppir_block {
312 struct list_head list;
313 struct list_head node_list;
314 struct list_head instr_list;
315
316 struct ppir_block *successors[2];
317
318 struct ppir_compiler *comp;
319
320 /* for scheduler */
321 int sched_instr_index;
322 int sched_instr_base;
323 int index;
324
325 /* for liveness analysis */
326 BITSET_WORD *def;
327 BITSET_WORD *use;
328 BITSET_WORD *live_in;
329 BITSET_WORD *live_out;
330 } ppir_block;
331
332 typedef struct {
333 ppir_node node;
334 ppir_src src[2];
335 int num_src;
336 bool cond_gt;
337 bool cond_eq;
338 bool cond_lt;
339 bool negate;
340 ppir_block *target;
341 } ppir_branch_node;
342
343 struct ra_regs;
344 struct lima_fs_shader_state;
345
346 typedef struct ppir_compiler {
347 struct list_head block_list;
348 struct hash_table_u64 *blocks;
349 int cur_index;
350 int cur_instr_index;
351
352 struct list_head reg_list;
353
354 /* array for searching ssa/reg node */
355 ppir_node **var_nodes;
356 unsigned reg_base;
357
358 struct ra_regs *ra;
359 struct lima_fs_shader_state *prog;
360
361 /* for scheduler */
362 int sched_instr_base;
363
364 /* for regalloc spilling debug */
365 int force_spilling;
366
367 /* shaderdb */
368 int num_loops;
369 int num_spills;
370 int num_fills;
371
372 ppir_block *discard_block;
373 ppir_block *current_block;
374 ppir_block *loop_break_block;
375 ppir_block *loop_cont_block;
376 } ppir_compiler;
377
378 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
379 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred);
380 void ppir_node_remove_dep(ppir_dep *dep);
381 void ppir_node_delete(ppir_node *node);
382 void ppir_node_print_prog(ppir_compiler *comp);
383 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
384 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
385 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
386 ppir_dep *ppir_dep_for_pred(ppir_node *node, ppir_node *pred);
387 ppir_node *ppir_node_clone(ppir_block *block, ppir_node *node);
388 /* Assumes that node successors are in the same block */
389 ppir_node *ppir_node_insert_mov(ppir_node *node);
390
391 static inline bool ppir_node_is_root(ppir_node *node)
392 {
393 return list_empty(&node->succ_list);
394 }
395
396 static inline bool ppir_node_is_leaf(ppir_node *node)
397 {
398 return list_empty(&node->pred_list);
399 }
400
401 static inline bool ppir_node_has_single_succ(ppir_node *node)
402 {
403 return list_is_singular(&node->succ_list);
404 }
405
406 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
407 {
408 return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
409 }
410
411 static inline bool ppir_node_has_single_pred(ppir_node *node)
412 {
413 return list_is_singular(&node->pred_list);
414 }
415
416 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
417 {
418 return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
419 }
420
421 #define ppir_node_foreach_succ(node, dep) \
422 list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
423 #define ppir_node_foreach_succ_safe(node, dep) \
424 list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
425 #define ppir_node_foreach_pred(node, dep) \
426 list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
427 #define ppir_node_foreach_pred_safe(node, dep) \
428 list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
429
430 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
431 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
432 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
433 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
434 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
435 #define ppir_node_to_discard(node) ((ppir_discard_node *)(node))
436 #define ppir_node_to_branch(node) ((ppir_branch_node *)(node))
437
438 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
439 {
440 switch (node->type) {
441 case ppir_node_type_alu:
442 return &ppir_node_to_alu(node)->dest;
443 case ppir_node_type_load:
444 return &ppir_node_to_load(node)->dest;
445 case ppir_node_type_const:
446 return &ppir_node_to_const(node)->dest;
447 case ppir_node_type_load_texture:
448 return &ppir_node_to_load_texture(node)->dest;
449 default:
450 return NULL;
451 }
452 }
453
454 static inline int ppir_node_get_src_num(ppir_node *node)
455 {
456 switch (node->type) {
457 case ppir_node_type_alu:
458 return ppir_node_to_alu(node)->num_src;
459 case ppir_node_type_branch:
460 return ppir_node_to_branch(node)->num_src;
461 case ppir_node_type_load:
462 return ppir_node_to_load(node)->num_src;
463 case ppir_node_type_load_texture:
464 case ppir_node_type_store:
465 return 1;
466 default:
467 return 0;
468 }
469
470 return 0;
471 }
472
473 static inline ppir_src *ppir_node_get_src(ppir_node *node, int idx)
474 {
475 if (idx < 0 || idx >= ppir_node_get_src_num(node))
476 return NULL;
477
478 switch (node->type) {
479 case ppir_node_type_alu:
480 return &ppir_node_to_alu(node)->src[idx];
481 case ppir_node_type_branch:
482 return &ppir_node_to_branch(node)->src[idx];
483 case ppir_node_type_load_texture:
484 return &ppir_node_to_load_texture(node)->src_coords;
485 case ppir_node_type_load:
486 return &ppir_node_to_load(node)->src;
487 case ppir_node_type_store:
488 return &ppir_node_to_store(node)->src;
489 default:
490 break;
491 }
492
493 return NULL;
494 }
495
496 static inline ppir_reg *ppir_src_get_reg(ppir_src *src)
497 {
498 switch (src->type) {
499 case ppir_target_ssa:
500 return src->ssa;
501 case ppir_target_register:
502 return src->reg;
503 default:
504 return NULL;
505 }
506 }
507
508 static inline ppir_reg *ppir_dest_get_reg(ppir_dest *dest)
509 {
510 switch (dest->type) {
511 case ppir_target_ssa:
512 return &dest->ssa;
513 case ppir_target_register:
514 return dest->reg;
515 default:
516 return NULL;
517 }
518 }
519
520 static inline ppir_src *ppir_node_get_src_for_pred(ppir_node *node, ppir_node *pred)
521 {
522 for (int i = 0; i < ppir_node_get_src_num(node); i++) {
523 ppir_src *src = ppir_node_get_src(node, i);
524 if (src && src->node == pred)
525 return src;
526 }
527
528 return NULL;
529 }
530
531 static inline void ppir_node_target_assign(ppir_src *src, ppir_node *node)
532 {
533 ppir_dest *dest = ppir_node_get_dest(node);
534 src->type = dest->type;
535 switch (src->type) {
536 case ppir_target_ssa:
537 src->ssa = &dest->ssa;
538 src->node = node;
539 break;
540 case ppir_target_register:
541 src->reg = dest->reg;
542 /* Registers can be assigned from multiple nodes, so don't keep
543 * pointer to the node here
544 */
545 src->node = NULL;
546 break;
547 case ppir_target_pipeline:
548 src->pipeline = dest->pipeline;
549 src->node = node;
550 break;
551 }
552 }
553
554 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
555 {
556 if (src->type != dest->type ||
557 (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
558 (src->type == ppir_target_register && src->reg != dest->reg) ||
559 (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
560 return false;
561
562 return true;
563 }
564
565 static inline int ppir_target_get_src_reg_index(ppir_src *src)
566 {
567 switch (src->type) {
568 case ppir_target_ssa:
569 if (src->ssa)
570 return src->ssa->index;
571 break;
572 case ppir_target_register:
573 if (src->reg)
574 return src->reg->index;
575 break;
576 case ppir_target_pipeline:
577 if (src->pipeline == ppir_pipeline_reg_discard)
578 return 15 * 4;
579 return (src->pipeline + 12) * 4;
580 }
581
582 return -1;
583 }
584
585 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
586 {
587 switch (dest->type) {
588 case ppir_target_ssa:
589 return dest->ssa.index;
590 case ppir_target_register:
591 return dest->reg->index;
592 case ppir_target_pipeline:
593 if (dest->pipeline == ppir_pipeline_reg_discard)
594 return 15 * 4;
595 return (dest->pipeline + 12) * 4;
596 }
597
598 return -1;
599 }
600
601 static inline bool ppir_target_is_scaler(ppir_dest *dest)
602 {
603 switch (dest->type) {
604 case ppir_target_ssa:
605 return dest->ssa.num_components == 1;
606 case ppir_target_register:
607 /* only one bit in mask is set */
608 if ((dest->write_mask & 0x3) == 0x3 ||
609 (dest->write_mask & 0x5) == 0x5 ||
610 (dest->write_mask & 0x9) == 0x9 ||
611 (dest->write_mask & 0x6) == 0x6 ||
612 (dest->write_mask & 0xa) == 0xa ||
613 (dest->write_mask & 0xc) == 0xc)
614 return false;
615 else
616 return true;
617 case ppir_target_pipeline:
618 if (dest->pipeline == ppir_pipeline_reg_fmul)
619 return true;
620 else
621 return false;
622 default:
623 return false;
624 }
625 }
626
627 ppir_instr *ppir_instr_create(ppir_block *block);
628 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
629 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
630 void ppir_instr_print_list(ppir_compiler *comp);
631 void ppir_instr_print_dep(ppir_compiler *comp);
632 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
633
634 #define ppir_instr_foreach_succ(instr, dep) \
635 list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
636 #define ppir_instr_foreach_succ_safe(instr, dep) \
637 list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
638 #define ppir_instr_foreach_pred(instr, dep) \
639 list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
640 #define ppir_instr_foreach_pred_safe(instr, dep) \
641 list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
642
643 static inline bool ppir_instr_is_root(ppir_instr *instr)
644 {
645 return list_empty(&instr->succ_list);
646 }
647
648 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
649 {
650 return list_empty(&instr->pred_list);
651 }
652
653 bool ppir_lower_prog(ppir_compiler *comp);
654 bool ppir_node_to_instr(ppir_compiler *comp);
655 bool ppir_schedule_prog(ppir_compiler *comp);
656 bool ppir_regalloc_prog(ppir_compiler *comp);
657 bool ppir_codegen_prog(ppir_compiler *comp);
658 void ppir_liveness_analysis(ppir_compiler *comp);
659
660 #endif