src/gallium/drivers/lima/ir/pp/ppir.h

   1 /*
   2  * Copyright (c) 2017 Lima Project
   3  * Copyright (c) 2013 Connor Abbott
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy
   6  * of this software and associated documentation files (the "Software"), to deal
   7  * in the Software without restriction, including without limitation the rights
   8  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9  * copies of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21  * THE SOFTWARE.
  22  *
  23  */
  24
  25 #ifndef LIMA_IR_PP_PPIR_H
  26 #define LIMA_IR_PP_PPIR_H
  27
  28 #include "util/u_math.h"
  29 #include "util/list.h"
  30
  31 #include "ir/lima_ir.h"
  32
  33 typedef enum {
  34    ppir_op_mov,
  35    ppir_op_abs,
  36    ppir_op_neg,
  37    ppir_op_add,
  38
  39    ppir_op_ddx,
  40    ppir_op_ddy,
  41
  42    ppir_op_mul,
  43    ppir_op_rcp,
  44
  45    ppir_op_sin_lut,
  46    ppir_op_cos_lut,
  47
  48    ppir_op_sum3,
  49    ppir_op_sum4,
  50
  51    ppir_op_normalize2,
  52    ppir_op_normalize3,
  53    ppir_op_normalize4,
  54
  55    ppir_op_select,
  56
  57    ppir_op_sin,
  58    ppir_op_cos,
  59    ppir_op_tan,
  60    ppir_op_asin,
  61    ppir_op_acos,
  62
  63    ppir_op_atan,
  64    ppir_op_atan2,
  65    ppir_op_atan_pt1,
  66    ppir_op_atan2_pt1,
  67    ppir_op_atan_pt2,
  68
  69    ppir_op_exp,
  70    ppir_op_log,
  71    ppir_op_exp2,
  72    ppir_op_log2,
  73    ppir_op_sqrt,
  74    ppir_op_rsqrt,
  75
  76    ppir_op_sign,
  77    ppir_op_floor,
  78    ppir_op_ceil,
  79    ppir_op_fract,
  80    ppir_op_mod,
  81    ppir_op_min,
  82    ppir_op_max,
  83    ppir_op_trunc,
  84
  85    ppir_op_dot2,
  86    ppir_op_dot3,
  87    ppir_op_dot4,
  88
  89    ppir_op_and,
  90    ppir_op_or,
  91    ppir_op_xor,
  92
  93    ppir_op_lt,
  94    ppir_op_gt,
  95    ppir_op_le,
  96    ppir_op_ge,
  97    ppir_op_eq,
  98    ppir_op_ne,
  99    ppir_op_not,
 100
 101    ppir_op_load_uniform,
 102    ppir_op_load_varying,
 103    ppir_op_load_coords,
 104    ppir_op_load_fragcoord,
 105    ppir_op_load_texture,
 106    ppir_op_load_temp,
 107
 108    ppir_op_store_temp,
 109    ppir_op_store_color,
 110
 111    ppir_op_const,
 112
 113    ppir_op_discard,
 114    ppir_op_branch,
 115
 116    ppir_op_num,
 117 } ppir_op;
 118
 119 typedef enum {
 120    ppir_node_type_alu,
 121    ppir_node_type_const,
 122    ppir_node_type_load,
 123    ppir_node_type_store,
 124    ppir_node_type_load_texture,
 125    ppir_node_type_discard,
 126    ppir_node_type_branch,
 127 } ppir_node_type;
 128
 129 typedef struct {
 130    char *name;
 131    ppir_node_type type;
 132    int *slots;
 133 } ppir_op_info;
 134
 135 extern const ppir_op_info ppir_op_infos[];
 136
 137 typedef struct {
 138    void *pred, *succ;
 139    struct list_head pred_link;
 140    struct list_head succ_link;
 141 } ppir_dep;
 142
 143 typedef struct ppir_node {
 144    struct list_head list;
 145    ppir_op op;
 146    ppir_node_type type;
 147    int index;
 148    char name[16];
 149    bool printed;
 150    struct ppir_instr *instr;
 151    int instr_pos;
 152    struct ppir_block *block;
 153
 154    /* for scheduler */
 155    struct list_head succ_list;
 156    struct list_head pred_list;
 157 } ppir_node;
 158
 159 typedef enum {
 160    ppir_pipeline_reg_const0,
 161    ppir_pipeline_reg_const1,
 162    ppir_pipeline_reg_sampler,
 163    ppir_pipeline_reg_uniform,
 164    ppir_pipeline_reg_vmul,
 165    ppir_pipeline_reg_fmul,
 166    ppir_pipeline_reg_discard, /* varying load */
 167 } ppir_pipeline;
 168
 169 typedef struct ppir_reg {
 170    struct list_head list;
 171    int index;
 172    int num_components;
 173    /* whether this reg has to start from the x component
 174     * of a full physical reg, this is true for reg used
 175     * in load/store instr which has no swizzle field
 176     */
 177    bool is_head;
 178    /* instr live range */
 179    int live_in, live_out;
 180    bool spilled;
 181 } ppir_reg;
 182
 183 typedef enum {
 184    ppir_target_ssa,
 185    ppir_target_pipeline,
 186    ppir_target_register,
 187 } ppir_target;
 188
 189 typedef struct ppir_src {
 190    ppir_target type;
 191
 192    union {
 193       ppir_reg *ssa;
 194       ppir_reg *reg;
 195       ppir_pipeline pipeline;
 196    };
 197
 198    uint8_t swizzle[4];
 199    bool absolute, negate;
 200 } ppir_src;
 201
 202 typedef enum {
 203    ppir_outmod_none,
 204    ppir_outmod_clamp_fraction,
 205    ppir_outmod_clamp_positive,
 206    ppir_outmod_round,
 207 } ppir_outmod;
 208
 209 typedef struct ppir_dest {
 210    ppir_target type;
 211
 212    union {
 213       ppir_reg ssa;
 214       ppir_reg *reg;
 215       ppir_pipeline pipeline;
 216    };
 217
 218    ppir_outmod modifier;
 219    unsigned write_mask : 4;
 220 } ppir_dest;
 221
 222 typedef struct {
 223    ppir_node node;
 224    ppir_dest dest;
 225    ppir_src src[3];
 226    int num_src;
 227    int shift : 3; /* Only used for ppir_op_mul */
 228 } ppir_alu_node;
 229
 230 typedef struct ppir_const {
 231    union fi value[4];
 232    int num;
 233 } ppir_const;
 234
 235 typedef struct {
 236    ppir_node node;
 237    ppir_const constant;
 238    ppir_dest dest;
 239 } ppir_const_node;
 240
 241 typedef struct {
 242    ppir_node node;
 243    int index;
 244    int num_components;
 245    ppir_dest dest;
 246    ppir_src src;
 247 } ppir_load_node;
 248
 249 typedef struct {
 250    ppir_node node;
 251    int index;
 252    int num_components;
 253    ppir_src src;
 254 } ppir_store_node;
 255
 256 typedef struct {
 257    ppir_node node;
 258    ppir_dest dest;
 259    ppir_src src_coords;
 260    int sampler;
 261    int sampler_dim;
 262 } ppir_load_texture_node;
 263
 264 typedef struct {
 265    ppir_node node;
 266 } ppir_discard_node;
 267
 268 enum ppir_instr_slot {
 269    PPIR_INSTR_SLOT_VARYING,
 270    PPIR_INSTR_SLOT_TEXLD,
 271    PPIR_INSTR_SLOT_UNIFORM,
 272    PPIR_INSTR_SLOT_ALU_VEC_MUL,
 273    PPIR_INSTR_SLOT_ALU_SCL_MUL,
 274    PPIR_INSTR_SLOT_ALU_VEC_ADD,
 275    PPIR_INSTR_SLOT_ALU_SCL_ADD,
 276    PPIR_INSTR_SLOT_ALU_COMBINE,
 277    PPIR_INSTR_SLOT_STORE_TEMP,
 278    PPIR_INSTR_SLOT_BRANCH,
 279    PPIR_INSTR_SLOT_NUM,
 280    PPIR_INSTR_SLOT_END,
 281    PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
 282    PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
 283 };
 284
 285 typedef struct ppir_instr {
 286    struct list_head list;
 287    int index;
 288    bool printed;
 289    int seq; /* command sequence after schedule */
 290
 291    ppir_node *slots[PPIR_INSTR_SLOT_NUM];
 292    ppir_const constant[2];
 293    bool is_end;
 294
 295    /* for scheduler */
 296    struct list_head succ_list;
 297    struct list_head pred_list;
 298    float reg_pressure;
 299    int est; /* earliest start time */
 300    int parent_index;
 301    bool scheduled;
 302    int offset;
 303 } ppir_instr;
 304
 305 typedef struct ppir_block {
 306    struct list_head list;
 307    struct list_head node_list;
 308    struct list_head instr_list;
 309    struct ppir_compiler *comp;
 310
 311    /* for scheduler */
 312    int sched_instr_index;
 313    int sched_instr_base;
 314 } ppir_block;
 315
 316 typedef struct {
 317    ppir_node node;
 318    ppir_src src[2];
 319    bool cond_gt;
 320    bool cond_eq;
 321    bool cond_lt;
 322    ppir_block *target;
 323 } ppir_branch_node;
 324
 325 struct ra_regs;
 326 struct lima_fs_shader_state;
 327
 328 typedef struct ppir_compiler {
 329    struct list_head block_list;
 330    int cur_index;
 331    int cur_instr_index;
 332
 333    struct list_head reg_list;
 334
 335    /* array for searching ssa/reg node */
 336    ppir_node **var_nodes;
 337    unsigned reg_base;
 338
 339    struct ra_regs *ra;
 340    struct lima_fs_shader_state *prog;
 341
 342    /* for scheduler */
 343    int sched_instr_base;
 344
 345    /* for regalloc spilling debug */
 346    int force_spilling;
 347
 348    ppir_block *discard_block;
 349 } ppir_compiler;
 350
 351 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
 352 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred);
 353 void ppir_node_remove_dep(ppir_dep *dep);
 354 void ppir_node_delete(ppir_node *node);
 355 void ppir_node_print_prog(ppir_compiler *comp);
 356 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
 357 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
 358 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
 359
 360 static inline bool ppir_node_is_root(ppir_node *node)
 361 {
 362    return list_empty(&node->succ_list);
 363 }
 364
 365 static inline bool ppir_node_is_leaf(ppir_node *node)
 366 {
 367    return list_empty(&node->pred_list);
 368 }
 369
 370 static inline bool ppir_node_has_single_succ(ppir_node *node)
 371 {
 372    return list_is_singular(&node->succ_list);
 373 }
 374
 375 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
 376 {
 377    return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
 378 }
 379
 380 static inline bool ppir_node_has_single_pred(ppir_node *node)
 381 {
 382    return list_is_singular(&node->pred_list);
 383 }
 384
 385 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
 386 {
 387    return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
 388 }
 389
 390 #define ppir_node_foreach_succ(node, dep) \
 391    list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
 392 #define ppir_node_foreach_succ_safe(node, dep) \
 393    list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
 394 #define ppir_node_foreach_pred(node, dep) \
 395    list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
 396 #define ppir_node_foreach_pred_safe(node, dep) \
 397    list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
 398
 399 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
 400 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
 401 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
 402 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
 403 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
 404 #define ppir_node_to_discard(node) ((ppir_discard_node *)(node))
 405 #define ppir_node_to_branch(node) ((ppir_branch_node *)(node))
 406
 407 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
 408 {
 409    switch (node->type) {
 410    case ppir_node_type_alu:
 411       return &ppir_node_to_alu(node)->dest;
 412    case ppir_node_type_load:
 413       return &ppir_node_to_load(node)->dest;
 414    case ppir_node_type_const:
 415       return &ppir_node_to_const(node)->dest;
 416    case ppir_node_type_load_texture:
 417       return &ppir_node_to_load_texture(node)->dest;
 418    default:
 419       return NULL;
 420    }
 421 }
 422
 423 static inline void ppir_node_target_assign(ppir_src *src, ppir_dest *dest)
 424 {
 425    src->type = dest->type;
 426    switch (src->type) {
 427    case ppir_target_ssa:
 428       src->ssa = &dest->ssa;
 429       break;
 430    case ppir_target_register:
 431       src->reg = dest->reg;
 432       break;
 433    case ppir_target_pipeline:
 434       src->pipeline = dest->pipeline;
 435       break;
 436    }
 437 }
 438
 439 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
 440 {
 441    if (src->type != dest->type ||
 442        (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
 443        (src->type == ppir_target_register && src->reg != dest->reg) ||
 444        (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
 445       return false;
 446
 447    return true;
 448 }
 449
 450 static inline int ppir_target_get_src_reg_index(ppir_src *src)
 451 {
 452    switch (src->type) {
 453    case ppir_target_ssa:
 454       return src->ssa->index;
 455    case ppir_target_register:
 456       return src->reg->index;
 457    case ppir_target_pipeline:
 458       if (src->pipeline == ppir_pipeline_reg_discard)
 459          return 15 * 4;
 460       return (src->pipeline + 12) * 4;
 461    }
 462
 463    return -1;
 464 }
 465
 466 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
 467 {
 468    switch (dest->type) {
 469    case ppir_target_ssa:
 470       return dest->ssa.index;
 471    case ppir_target_register:
 472       return dest->reg->index;
 473    case ppir_target_pipeline:
 474       if (dest->pipeline == ppir_pipeline_reg_discard)
 475          return 15 * 4;
 476       return (dest->pipeline + 12) * 4;
 477    }
 478
 479    return -1;
 480 }
 481
 482 static inline bool ppir_target_is_scaler(ppir_dest *dest)
 483 {
 484    switch (dest->type) {
 485    case ppir_target_ssa:
 486       return dest->ssa.num_components == 1;
 487    case ppir_target_register:
 488       /* only one bit in mask is set */
 489       if ((dest->write_mask & 0x3) == 0x3 ||
 490           (dest->write_mask & 0x5) == 0x5 ||
 491           (dest->write_mask & 0x9) == 0x9 ||
 492           (dest->write_mask & 0x6) == 0x6 ||
 493           (dest->write_mask & 0xa) == 0xa ||
 494           (dest->write_mask & 0xc) == 0xc)
 495          return false;
 496       else
 497          return true;
 498    case ppir_target_pipeline:
 499       if (dest->pipeline == ppir_pipeline_reg_fmul)
 500          return true;
 501       else
 502          return false;
 503    default:
 504       return false;
 505    }
 506 }
 507
 508 ppir_instr *ppir_instr_create(ppir_block *block);
 509 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
 510 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
 511 void ppir_instr_print_list(ppir_compiler *comp);
 512 void ppir_instr_print_dep(ppir_compiler *comp);
 513 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
 514
 515 #define ppir_instr_foreach_succ(instr, dep) \
 516    list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
 517 #define ppir_instr_foreach_succ_safe(instr, dep) \
 518    list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
 519 #define ppir_instr_foreach_pred(instr, dep) \
 520    list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
 521 #define ppir_instr_foreach_pred_safe(instr, dep) \
 522    list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
 523
 524 static inline bool ppir_instr_is_root(ppir_instr *instr)
 525 {
 526    return list_empty(&instr->succ_list);
 527 }
 528
 529 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
 530 {
 531    return list_empty(&instr->pred_list);
 532 }
 533
 534 bool ppir_lower_prog(ppir_compiler *comp);
 535 bool ppir_node_to_instr(ppir_compiler *comp);
 536 bool ppir_schedule_prog(ppir_compiler *comp);
 537 bool ppir_regalloc_prog(ppir_compiler *comp);
 538 bool ppir_codegen_prog(ppir_compiler *comp);
 539
 540 #endif