lima/ppir: Add undef handling
[mesa.git] / src / gallium / drivers / lima / ir / pp / ppir.h
1 /*
2 * Copyright (c) 2017 Lima Project
3 * Copyright (c) 2013 Connor Abbott
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 * THE SOFTWARE.
22 *
23 */
24
25 #ifndef LIMA_IR_PP_PPIR_H
26 #define LIMA_IR_PP_PPIR_H
27
28 #include "util/u_math.h"
29 #include "util/list.h"
30
31 #include "ir/lima_ir.h"
32
33 typedef enum {
34 ppir_op_mov,
35 ppir_op_abs,
36 ppir_op_neg,
37 ppir_op_sat,
38 ppir_op_add,
39
40 ppir_op_ddx,
41 ppir_op_ddy,
42
43 ppir_op_mul,
44 ppir_op_rcp,
45
46 ppir_op_sin_lut,
47 ppir_op_cos_lut,
48
49 ppir_op_sum3,
50 ppir_op_sum4,
51
52 ppir_op_normalize2,
53 ppir_op_normalize3,
54 ppir_op_normalize4,
55
56 ppir_op_sel_cond,
57 ppir_op_select,
58
59 ppir_op_sin,
60 ppir_op_cos,
61 ppir_op_tan,
62 ppir_op_asin,
63 ppir_op_acos,
64
65 ppir_op_atan,
66 ppir_op_atan2,
67 ppir_op_atan_pt1,
68 ppir_op_atan2_pt1,
69 ppir_op_atan_pt2,
70
71 ppir_op_exp,
72 ppir_op_log,
73 ppir_op_exp2,
74 ppir_op_log2,
75 ppir_op_sqrt,
76 ppir_op_rsqrt,
77
78 ppir_op_sign,
79 ppir_op_floor,
80 ppir_op_ceil,
81 ppir_op_fract,
82 ppir_op_mod,
83 ppir_op_min,
84 ppir_op_max,
85 ppir_op_trunc,
86
87 ppir_op_and,
88 ppir_op_or,
89 ppir_op_xor,
90
91 ppir_op_lt,
92 ppir_op_gt,
93 ppir_op_le,
94 ppir_op_ge,
95 ppir_op_eq,
96 ppir_op_ne,
97 ppir_op_not,
98
99 ppir_op_load_uniform,
100 ppir_op_load_varying,
101 ppir_op_load_coords,
102 ppir_op_load_fragcoord,
103 ppir_op_load_pointcoord,
104 ppir_op_load_frontface,
105 ppir_op_load_texture,
106 ppir_op_load_temp,
107
108 ppir_op_store_temp,
109 ppir_op_store_color,
110
111 ppir_op_const,
112
113 ppir_op_discard,
114 ppir_op_branch,
115
116 ppir_op_undef,
117
118 ppir_op_num,
119 } ppir_op;
120
121 typedef enum {
122 ppir_node_type_alu,
123 ppir_node_type_const,
124 ppir_node_type_load,
125 ppir_node_type_store,
126 ppir_node_type_load_texture,
127 ppir_node_type_discard,
128 ppir_node_type_branch,
129 } ppir_node_type;
130
131 typedef struct {
132 char *name;
133 ppir_node_type type;
134 int *slots;
135 } ppir_op_info;
136
137 extern const ppir_op_info ppir_op_infos[];
138
139 typedef struct {
140 void *pred, *succ;
141 struct list_head pred_link;
142 struct list_head succ_link;
143 } ppir_dep;
144
145 typedef struct ppir_node {
146 struct list_head list;
147 ppir_op op;
148 ppir_node_type type;
149 int index;
150 char name[16];
151 bool printed;
152 struct ppir_instr *instr;
153 int instr_pos;
154 struct ppir_block *block;
155
156 /* for scheduler */
157 struct list_head succ_list;
158 struct list_head pred_list;
159 } ppir_node;
160
161 typedef enum {
162 ppir_pipeline_reg_const0,
163 ppir_pipeline_reg_const1,
164 ppir_pipeline_reg_sampler,
165 ppir_pipeline_reg_uniform,
166 ppir_pipeline_reg_vmul,
167 ppir_pipeline_reg_fmul,
168 ppir_pipeline_reg_discard, /* varying load */
169 } ppir_pipeline;
170
171 typedef struct ppir_reg {
172 struct list_head list;
173 int index;
174 int regalloc_index;
175 int num_components;
176 /* whether this reg has to start from the x component
177 * of a full physical reg, this is true for reg used
178 * in load/store instr which has no swizzle field
179 */
180 bool is_head;
181 /* instr live range */
182 int live_in, live_out;
183 bool spilled;
184 bool undef;
185 } ppir_reg;
186
187 typedef enum {
188 ppir_target_ssa,
189 ppir_target_pipeline,
190 ppir_target_register,
191 } ppir_target;
192
193 typedef struct ppir_src {
194 ppir_target type;
195 ppir_node *node;
196
197 union {
198 ppir_reg *ssa;
199 ppir_reg *reg;
200 ppir_pipeline pipeline;
201 };
202
203 uint8_t swizzle[4];
204 bool absolute, negate;
205 } ppir_src;
206
207 typedef enum {
208 ppir_outmod_none,
209 ppir_outmod_clamp_fraction,
210 ppir_outmod_clamp_positive,
211 ppir_outmod_round,
212 } ppir_outmod;
213
214 typedef struct ppir_dest {
215 ppir_target type;
216
217 union {
218 ppir_reg ssa;
219 ppir_reg *reg;
220 ppir_pipeline pipeline;
221 };
222
223 ppir_outmod modifier;
224 unsigned write_mask : 4;
225 } ppir_dest;
226
227 typedef struct {
228 ppir_node node;
229 ppir_dest dest;
230 ppir_src src[3];
231 int num_src;
232 int shift : 3; /* Only used for ppir_op_mul */
233 } ppir_alu_node;
234
235 typedef struct ppir_const {
236 union fi value[4];
237 int num;
238 } ppir_const;
239
240 typedef struct {
241 ppir_node node;
242 ppir_const constant;
243 ppir_dest dest;
244 } ppir_const_node;
245
246 typedef struct {
247 ppir_node node;
248 int index;
249 int num_components;
250 ppir_dest dest;
251 ppir_src src;
252 int num_src;
253 } ppir_load_node;
254
255 typedef struct {
256 ppir_node node;
257 int index;
258 int num_components;
259 ppir_src src;
260 } ppir_store_node;
261
262 typedef struct {
263 ppir_node node;
264 ppir_dest dest;
265 ppir_src src_coords; /* not to be used after lowering */
266 int sampler;
267 int sampler_dim;
268 } ppir_load_texture_node;
269
270 typedef struct {
271 ppir_node node;
272 } ppir_discard_node;
273
274 enum ppir_instr_slot {
275 PPIR_INSTR_SLOT_VARYING,
276 PPIR_INSTR_SLOT_TEXLD,
277 PPIR_INSTR_SLOT_UNIFORM,
278 PPIR_INSTR_SLOT_ALU_VEC_MUL,
279 PPIR_INSTR_SLOT_ALU_SCL_MUL,
280 PPIR_INSTR_SLOT_ALU_VEC_ADD,
281 PPIR_INSTR_SLOT_ALU_SCL_ADD,
282 PPIR_INSTR_SLOT_ALU_COMBINE,
283 PPIR_INSTR_SLOT_STORE_TEMP,
284 PPIR_INSTR_SLOT_BRANCH,
285 PPIR_INSTR_SLOT_NUM,
286 PPIR_INSTR_SLOT_END,
287 PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
288 PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
289 };
290
291 typedef struct ppir_instr {
292 struct list_head list;
293 int index;
294 bool printed;
295 int seq; /* command sequence after schedule */
296
297 ppir_node *slots[PPIR_INSTR_SLOT_NUM];
298 ppir_const constant[2];
299 bool is_end;
300
301 /* for scheduler */
302 struct list_head succ_list;
303 struct list_head pred_list;
304 float reg_pressure;
305 int est; /* earliest start time */
306 int parent_index;
307 bool scheduled;
308 int offset;
309 int encode_size;
310 } ppir_instr;
311
312 typedef struct ppir_block {
313 struct list_head list;
314 struct list_head node_list;
315 struct list_head instr_list;
316
317 struct ppir_block *successors[2];
318
319 struct ppir_compiler *comp;
320
321 /* for scheduler */
322 int sched_instr_index;
323 int sched_instr_base;
324 int index;
325
326 /* for liveness analysis */
327 BITSET_WORD *def;
328 BITSET_WORD *use;
329 BITSET_WORD *live_in;
330 BITSET_WORD *live_out;
331 } ppir_block;
332
333 typedef struct {
334 ppir_node node;
335 ppir_src src[2];
336 int num_src;
337 bool cond_gt;
338 bool cond_eq;
339 bool cond_lt;
340 bool negate;
341 ppir_block *target;
342 } ppir_branch_node;
343
344 struct ra_regs;
345 struct lima_fs_shader_state;
346
347 typedef struct ppir_compiler {
348 struct list_head block_list;
349 struct hash_table_u64 *blocks;
350 int cur_index;
351 int cur_instr_index;
352
353 struct list_head reg_list;
354
355 /* array for searching ssa/reg node */
356 ppir_node **var_nodes;
357 unsigned reg_base;
358
359 struct ra_regs *ra;
360 struct lima_fs_shader_state *prog;
361
362 /* for scheduler */
363 int sched_instr_base;
364
365 /* for regalloc spilling debug */
366 int force_spilling;
367
368 /* shaderdb */
369 int num_loops;
370 int num_spills;
371 int num_fills;
372
373 ppir_block *discard_block;
374 ppir_block *current_block;
375 ppir_block *loop_break_block;
376 ppir_block *loop_cont_block;
377 } ppir_compiler;
378
379 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
380 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred);
381 void ppir_node_remove_dep(ppir_dep *dep);
382 void ppir_node_delete(ppir_node *node);
383 void ppir_node_print_prog(ppir_compiler *comp);
384 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
385 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
386 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
387 ppir_dep *ppir_dep_for_pred(ppir_node *node, ppir_node *pred);
388 ppir_node *ppir_node_clone(ppir_block *block, ppir_node *node);
389 /* Assumes that node successors are in the same block */
390 ppir_node *ppir_node_insert_mov(ppir_node *node);
391
392 static inline bool ppir_node_is_root(ppir_node *node)
393 {
394 return list_empty(&node->succ_list);
395 }
396
397 static inline bool ppir_node_is_leaf(ppir_node *node)
398 {
399 return list_empty(&node->pred_list);
400 }
401
402 static inline bool ppir_node_has_single_succ(ppir_node *node)
403 {
404 return list_is_singular(&node->succ_list);
405 }
406
407 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
408 {
409 return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
410 }
411
412 static inline bool ppir_node_has_single_pred(ppir_node *node)
413 {
414 return list_is_singular(&node->pred_list);
415 }
416
417 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
418 {
419 return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
420 }
421
422 #define ppir_node_foreach_succ(node, dep) \
423 list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
424 #define ppir_node_foreach_succ_safe(node, dep) \
425 list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
426 #define ppir_node_foreach_pred(node, dep) \
427 list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
428 #define ppir_node_foreach_pred_safe(node, dep) \
429 list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
430
431 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
432 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
433 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
434 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
435 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
436 #define ppir_node_to_discard(node) ((ppir_discard_node *)(node))
437 #define ppir_node_to_branch(node) ((ppir_branch_node *)(node))
438
439 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
440 {
441 switch (node->type) {
442 case ppir_node_type_alu:
443 return &ppir_node_to_alu(node)->dest;
444 case ppir_node_type_load:
445 return &ppir_node_to_load(node)->dest;
446 case ppir_node_type_const:
447 return &ppir_node_to_const(node)->dest;
448 case ppir_node_type_load_texture:
449 return &ppir_node_to_load_texture(node)->dest;
450 default:
451 return NULL;
452 }
453 }
454
455 static inline int ppir_node_get_src_num(ppir_node *node)
456 {
457 switch (node->type) {
458 case ppir_node_type_alu:
459 return ppir_node_to_alu(node)->num_src;
460 case ppir_node_type_branch:
461 return ppir_node_to_branch(node)->num_src;
462 case ppir_node_type_load:
463 return ppir_node_to_load(node)->num_src;
464 case ppir_node_type_load_texture:
465 case ppir_node_type_store:
466 return 1;
467 default:
468 return 0;
469 }
470
471 return 0;
472 }
473
474 static inline ppir_src *ppir_node_get_src(ppir_node *node, int idx)
475 {
476 if (idx < 0 || idx >= ppir_node_get_src_num(node))
477 return NULL;
478
479 switch (node->type) {
480 case ppir_node_type_alu:
481 return &ppir_node_to_alu(node)->src[idx];
482 case ppir_node_type_branch:
483 return &ppir_node_to_branch(node)->src[idx];
484 case ppir_node_type_load_texture:
485 return &ppir_node_to_load_texture(node)->src_coords;
486 case ppir_node_type_load:
487 return &ppir_node_to_load(node)->src;
488 case ppir_node_type_store:
489 return &ppir_node_to_store(node)->src;
490 default:
491 break;
492 }
493
494 return NULL;
495 }
496
497 static inline ppir_reg *ppir_src_get_reg(ppir_src *src)
498 {
499 switch (src->type) {
500 case ppir_target_ssa:
501 return src->ssa;
502 case ppir_target_register:
503 return src->reg;
504 default:
505 return NULL;
506 }
507 }
508
509 static inline ppir_reg *ppir_dest_get_reg(ppir_dest *dest)
510 {
511 switch (dest->type) {
512 case ppir_target_ssa:
513 return &dest->ssa;
514 case ppir_target_register:
515 return dest->reg;
516 default:
517 return NULL;
518 }
519 }
520
521 static inline ppir_src *ppir_node_get_src_for_pred(ppir_node *node, ppir_node *pred)
522 {
523 for (int i = 0; i < ppir_node_get_src_num(node); i++) {
524 ppir_src *src = ppir_node_get_src(node, i);
525 if (src && src->node == pred)
526 return src;
527 }
528
529 return NULL;
530 }
531
532 static inline void ppir_node_target_assign(ppir_src *src, ppir_node *node)
533 {
534 ppir_dest *dest = ppir_node_get_dest(node);
535 src->type = dest->type;
536 switch (src->type) {
537 case ppir_target_ssa:
538 src->ssa = &dest->ssa;
539 src->node = node;
540 break;
541 case ppir_target_register:
542 src->reg = dest->reg;
543 /* Registers can be assigned from multiple nodes, so don't keep
544 * pointer to the node here
545 */
546 src->node = NULL;
547 break;
548 case ppir_target_pipeline:
549 src->pipeline = dest->pipeline;
550 src->node = node;
551 break;
552 }
553 }
554
555 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
556 {
557 if (src->type != dest->type ||
558 (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
559 (src->type == ppir_target_register && src->reg != dest->reg) ||
560 (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
561 return false;
562
563 return true;
564 }
565
566 static inline int ppir_target_get_src_reg_index(ppir_src *src)
567 {
568 switch (src->type) {
569 case ppir_target_ssa:
570 if (src->ssa)
571 return src->ssa->index;
572 break;
573 case ppir_target_register:
574 if (src->reg)
575 return src->reg->index;
576 break;
577 case ppir_target_pipeline:
578 if (src->pipeline == ppir_pipeline_reg_discard)
579 return 15 * 4;
580 return (src->pipeline + 12) * 4;
581 }
582
583 return -1;
584 }
585
586 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
587 {
588 switch (dest->type) {
589 case ppir_target_ssa:
590 return dest->ssa.index;
591 case ppir_target_register:
592 return dest->reg->index;
593 case ppir_target_pipeline:
594 if (dest->pipeline == ppir_pipeline_reg_discard)
595 return 15 * 4;
596 return (dest->pipeline + 12) * 4;
597 }
598
599 return -1;
600 }
601
602 static inline bool ppir_target_is_scaler(ppir_dest *dest)
603 {
604 switch (dest->type) {
605 case ppir_target_ssa:
606 return dest->ssa.num_components == 1;
607 case ppir_target_register:
608 /* only one bit in mask is set */
609 if ((dest->write_mask & 0x3) == 0x3 ||
610 (dest->write_mask & 0x5) == 0x5 ||
611 (dest->write_mask & 0x9) == 0x9 ||
612 (dest->write_mask & 0x6) == 0x6 ||
613 (dest->write_mask & 0xa) == 0xa ||
614 (dest->write_mask & 0xc) == 0xc)
615 return false;
616 else
617 return true;
618 case ppir_target_pipeline:
619 if (dest->pipeline == ppir_pipeline_reg_fmul)
620 return true;
621 else
622 return false;
623 default:
624 return false;
625 }
626 }
627
628 ppir_instr *ppir_instr_create(ppir_block *block);
629 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
630 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
631 void ppir_instr_print_list(ppir_compiler *comp);
632 void ppir_instr_print_dep(ppir_compiler *comp);
633 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
634
635 #define ppir_instr_foreach_succ(instr, dep) \
636 list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
637 #define ppir_instr_foreach_succ_safe(instr, dep) \
638 list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
639 #define ppir_instr_foreach_pred(instr, dep) \
640 list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
641 #define ppir_instr_foreach_pred_safe(instr, dep) \
642 list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
643
644 static inline bool ppir_instr_is_root(ppir_instr *instr)
645 {
646 return list_empty(&instr->succ_list);
647 }
648
649 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
650 {
651 return list_empty(&instr->pred_list);
652 }
653
654 bool ppir_lower_prog(ppir_compiler *comp);
655 bool ppir_node_to_instr(ppir_compiler *comp);
656 bool ppir_schedule_prog(ppir_compiler *comp);
657 bool ppir_regalloc_prog(ppir_compiler *comp);
658 bool ppir_codegen_prog(ppir_compiler *comp);
659 void ppir_liveness_analysis(ppir_compiler *comp);
660
661 #endif