f58dd8be7306d9bd787576c2e1d85b5ff29447bf
[mesa.git] / src / gallium / drivers / lima / ir / pp / ppir.h
1 /*
2 * Copyright (c) 2017 Lima Project
3 * Copyright (c) 2013 Connor Abbott
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 * THE SOFTWARE.
22 *
23 */
24
25 #ifndef LIMA_IR_PP_PPIR_H
26 #define LIMA_IR_PP_PPIR_H
27
28 #include "util/u_math.h"
29 #include "util/list.h"
30 #include "util/set.h"
31
32 #include "ir/lima_ir.h"
33
34 typedef enum {
35 ppir_op_mov,
36 ppir_op_abs,
37 ppir_op_neg,
38 ppir_op_sat,
39 ppir_op_add,
40
41 ppir_op_ddx,
42 ppir_op_ddy,
43
44 ppir_op_mul,
45 ppir_op_rcp,
46
47 ppir_op_sin_lut,
48 ppir_op_cos_lut,
49
50 ppir_op_sum3,
51 ppir_op_sum4,
52
53 ppir_op_normalize2,
54 ppir_op_normalize3,
55 ppir_op_normalize4,
56
57 ppir_op_sel_cond,
58 ppir_op_select,
59
60 ppir_op_sin,
61 ppir_op_cos,
62 ppir_op_tan,
63 ppir_op_asin,
64 ppir_op_acos,
65
66 ppir_op_atan,
67 ppir_op_atan2,
68 ppir_op_atan_pt1,
69 ppir_op_atan2_pt1,
70 ppir_op_atan_pt2,
71
72 ppir_op_exp,
73 ppir_op_log,
74 ppir_op_exp2,
75 ppir_op_log2,
76 ppir_op_sqrt,
77 ppir_op_rsqrt,
78
79 ppir_op_sign,
80 ppir_op_floor,
81 ppir_op_ceil,
82 ppir_op_fract,
83 ppir_op_mod,
84 ppir_op_min,
85 ppir_op_max,
86 ppir_op_trunc,
87
88 ppir_op_and,
89 ppir_op_or,
90 ppir_op_xor,
91
92 ppir_op_lt,
93 ppir_op_gt,
94 ppir_op_le,
95 ppir_op_ge,
96 ppir_op_eq,
97 ppir_op_ne,
98 ppir_op_not,
99
100 ppir_op_load_uniform,
101 ppir_op_load_varying,
102 ppir_op_load_coords,
103 ppir_op_load_coords_reg,
104 ppir_op_load_fragcoord,
105 ppir_op_load_pointcoord,
106 ppir_op_load_frontface,
107 ppir_op_load_texture,
108 ppir_op_load_temp,
109
110 ppir_op_store_temp,
111 ppir_op_store_color,
112
113 ppir_op_const,
114
115 ppir_op_discard,
116 ppir_op_branch,
117
118 ppir_op_undef,
119
120 ppir_op_num,
121 } ppir_op;
122
123 typedef enum {
124 ppir_node_type_alu,
125 ppir_node_type_const,
126 ppir_node_type_load,
127 ppir_node_type_store,
128 ppir_node_type_load_texture,
129 ppir_node_type_discard,
130 ppir_node_type_branch,
131 } ppir_node_type;
132
133 typedef struct {
134 char *name;
135 ppir_node_type type;
136 int *slots;
137 } ppir_op_info;
138
139 extern const ppir_op_info ppir_op_infos[];
140
141 typedef enum {
142 ppir_dep_src,
143 ppir_dep_write_after_read,
144 ppir_dep_sequence,
145 } ppir_dep_type;
146
147 typedef struct {
148 void *pred, *succ;
149 ppir_dep_type type;
150 struct list_head pred_link;
151 struct list_head succ_link;
152 } ppir_dep;
153
154 typedef struct ppir_node {
155 struct list_head list;
156 ppir_op op;
157 ppir_node_type type;
158 int index;
159 char name[16];
160 bool printed;
161 struct ppir_instr *instr;
162 int instr_pos;
163 struct ppir_block *block;
164
165 /* for scheduler */
166 struct list_head succ_list;
167 struct list_head pred_list;
168 } ppir_node;
169
170 typedef enum {
171 ppir_pipeline_reg_const0,
172 ppir_pipeline_reg_const1,
173 ppir_pipeline_reg_sampler,
174 ppir_pipeline_reg_uniform,
175 ppir_pipeline_reg_vmul,
176 ppir_pipeline_reg_fmul,
177 ppir_pipeline_reg_discard, /* varying load */
178 } ppir_pipeline;
179
180 typedef struct ppir_reg {
181 struct list_head list;
182 int index;
183 int regalloc_index;
184 int num_components;
185
186 /* whether this reg has to start from the x component
187 * of a full physical reg, this is true for reg used
188 * in load/store instr which has no swizzle field */
189 bool is_head;
190 bool spilled;
191 bool undef;
192 } ppir_reg;
193
194 typedef enum {
195 ppir_target_ssa,
196 ppir_target_pipeline,
197 ppir_target_register,
198 } ppir_target;
199
200 typedef struct ppir_src {
201 ppir_target type;
202 ppir_node *node;
203
204 union {
205 ppir_reg *ssa;
206 ppir_reg *reg;
207 ppir_pipeline pipeline;
208 };
209
210 uint8_t swizzle[4];
211 bool absolute, negate;
212 } ppir_src;
213
214 typedef enum {
215 ppir_outmod_none,
216 ppir_outmod_clamp_fraction,
217 ppir_outmod_clamp_positive,
218 ppir_outmod_round,
219 } ppir_outmod;
220
221 typedef struct ppir_dest {
222 ppir_target type;
223
224 union {
225 ppir_reg ssa;
226 ppir_reg *reg;
227 ppir_pipeline pipeline;
228 };
229
230 ppir_outmod modifier;
231 unsigned write_mask : 4;
232 } ppir_dest;
233
234 typedef struct {
235 ppir_node node;
236 ppir_dest dest;
237 ppir_src src[3];
238 int num_src;
239 int shift : 3; /* Only used for ppir_op_mul */
240 } ppir_alu_node;
241
242 typedef struct ppir_const {
243 union fi value[4];
244 int num;
245 } ppir_const;
246
247 typedef struct {
248 ppir_node node;
249 ppir_const constant;
250 ppir_dest dest;
251 } ppir_const_node;
252
253 typedef struct {
254 ppir_node node;
255 int index;
256 int num_components;
257 ppir_dest dest;
258 ppir_src src;
259 int num_src;
260 } ppir_load_node;
261
262 typedef struct {
263 ppir_node node;
264 int index;
265 int num_components;
266 ppir_src src;
267 } ppir_store_node;
268
269 typedef struct {
270 ppir_node node;
271 ppir_dest dest;
272 ppir_src src[2]; /* src[0] temporarily stores src_coords,
273 not to be used after lowering */
274 int num_src;
275 int sampler;
276 int sampler_dim;
277 bool lod_bias_en;
278 bool explicit_lod;
279 } ppir_load_texture_node;
280
281 typedef struct {
282 ppir_node node;
283 } ppir_discard_node;
284
285 enum ppir_instr_slot {
286 PPIR_INSTR_SLOT_VARYING,
287 PPIR_INSTR_SLOT_TEXLD,
288 PPIR_INSTR_SLOT_UNIFORM,
289 PPIR_INSTR_SLOT_ALU_VEC_MUL,
290 PPIR_INSTR_SLOT_ALU_SCL_MUL,
291 PPIR_INSTR_SLOT_ALU_VEC_ADD,
292 PPIR_INSTR_SLOT_ALU_SCL_ADD,
293 PPIR_INSTR_SLOT_ALU_COMBINE,
294 PPIR_INSTR_SLOT_STORE_TEMP,
295 PPIR_INSTR_SLOT_BRANCH,
296 PPIR_INSTR_SLOT_NUM,
297 PPIR_INSTR_SLOT_END,
298 PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
299 PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
300 };
301
302 struct ppir_liveness {
303 ppir_reg *reg;
304 unsigned mask : 4;
305 };
306
307 typedef struct ppir_instr {
308 struct list_head list;
309 int index;
310 bool printed;
311 int seq; /* command sequence after schedule */
312
313 ppir_node *slots[PPIR_INSTR_SLOT_NUM];
314 ppir_const constant[2];
315 bool is_end;
316
317 /* for scheduler */
318 struct list_head succ_list;
319 struct list_head pred_list;
320 float reg_pressure;
321 int est; /* earliest start time */
322 int parent_index;
323 bool scheduled;
324 int offset;
325 int encode_size;
326
327 /* for liveness analysis */
328 struct ppir_liveness *live_in;
329 struct ppir_liveness *live_out;
330 struct set *live_in_set;
331 struct set *live_out_set;
332 } ppir_instr;
333
334 typedef struct ppir_block {
335 struct list_head list;
336 struct list_head node_list;
337 struct list_head instr_list;
338
339 struct ppir_block *successors[2];
340
341 struct ppir_compiler *comp;
342
343 /* for scheduler */
344 int sched_instr_index;
345 int sched_instr_base;
346 int index;
347
348 /* for liveness analysis */
349 struct ppir_liveness *live_in;
350 struct ppir_liveness *live_out;
351 struct set *live_in_set;
352 struct set *live_out_set;
353 } ppir_block;
354
355 typedef struct {
356 ppir_node node;
357 ppir_src src[2];
358 int num_src;
359 bool cond_gt;
360 bool cond_eq;
361 bool cond_lt;
362 bool negate;
363 ppir_block *target;
364 } ppir_branch_node;
365
366 struct ra_regs;
367 struct lima_fs_shader_state;
368
369 typedef struct ppir_compiler {
370 struct list_head block_list;
371 struct hash_table_u64 *blocks;
372 int cur_index;
373 int cur_instr_index;
374
375 struct list_head reg_list;
376
377 /* array for searching ssa/reg node */
378 ppir_node **var_nodes;
379 unsigned reg_base;
380
381 struct ra_regs *ra;
382 struct lima_fs_shader_state *prog;
383
384 /* for scheduler */
385 int sched_instr_base;
386
387 /* for regalloc spilling debug */
388 int force_spilling;
389
390 /* shaderdb */
391 int num_loops;
392 int num_spills;
393 int num_fills;
394
395 ppir_block *discard_block;
396 ppir_block *current_block;
397 ppir_block *loop_break_block;
398 ppir_block *loop_cont_block;
399 } ppir_compiler;
400
401 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
402 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred, ppir_dep_type type);
403 void ppir_node_remove_dep(ppir_dep *dep);
404 void ppir_node_delete(ppir_node *node);
405 void ppir_node_print_prog(ppir_compiler *comp);
406 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
407 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
408 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
409 void ppir_delete_if_orphan(ppir_block *block, ppir_node *node);
410 ppir_dep *ppir_dep_for_pred(ppir_node *node, ppir_node *pred);
411 ppir_node *ppir_node_clone(ppir_block *block, ppir_node *node);
412 /* Assumes that node successors are in the same block */
413 ppir_node *ppir_node_insert_mov(ppir_node *node);
414
415 static inline bool ppir_node_is_root(ppir_node *node)
416 {
417 return list_is_empty(&node->succ_list);
418 }
419
420 static inline bool ppir_node_is_leaf(ppir_node *node)
421 {
422 return list_is_empty(&node->pred_list);
423 }
424
425 static inline bool ppir_node_has_single_succ(ppir_node *node)
426 {
427 return list_is_singular(&node->succ_list);
428 }
429
430 bool ppir_node_has_single_src_succ(ppir_node *node);
431
432 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
433 {
434 return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
435 }
436
437 static inline bool ppir_node_has_single_pred(ppir_node *node)
438 {
439 return list_is_singular(&node->pred_list);
440 }
441
442 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
443 {
444 return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
445 }
446
447 #define ppir_node_foreach_succ(node, dep) \
448 list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
449 #define ppir_node_foreach_succ_safe(node, dep) \
450 list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
451 #define ppir_node_foreach_pred(node, dep) \
452 list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
453 #define ppir_node_foreach_pred_safe(node, dep) \
454 list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
455
456 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
457 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
458 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
459 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
460 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
461 #define ppir_node_to_discard(node) ((ppir_discard_node *)(node))
462 #define ppir_node_to_branch(node) ((ppir_branch_node *)(node))
463
464 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
465 {
466 switch (node->type) {
467 case ppir_node_type_alu:
468 return &ppir_node_to_alu(node)->dest;
469 case ppir_node_type_load:
470 return &ppir_node_to_load(node)->dest;
471 case ppir_node_type_const:
472 return &ppir_node_to_const(node)->dest;
473 case ppir_node_type_load_texture:
474 return &ppir_node_to_load_texture(node)->dest;
475 default:
476 return NULL;
477 }
478 }
479
480 static inline int ppir_src_get_mask(ppir_node *node)
481 {
482 ppir_dest *dest = ppir_node_get_dest(node);
483 if (dest)
484 return dest->write_mask;
485
486 return 0x01;
487 }
488
489 static inline int ppir_node_get_src_num(ppir_node *node)
490 {
491 switch (node->type) {
492 case ppir_node_type_alu:
493 return ppir_node_to_alu(node)->num_src;
494 case ppir_node_type_branch:
495 return ppir_node_to_branch(node)->num_src;
496 case ppir_node_type_load:
497 return ppir_node_to_load(node)->num_src;
498 case ppir_node_type_load_texture:
499 return ppir_node_to_load_texture(node)->num_src;
500 case ppir_node_type_store:
501 return 1;
502 default:
503 return 0;
504 }
505
506 return 0;
507 }
508
509 static inline ppir_src *ppir_node_get_src(ppir_node *node, int idx)
510 {
511 if (idx < 0 || idx >= ppir_node_get_src_num(node))
512 return NULL;
513
514 switch (node->type) {
515 case ppir_node_type_alu:
516 return &ppir_node_to_alu(node)->src[idx];
517 case ppir_node_type_branch:
518 return &ppir_node_to_branch(node)->src[idx];
519 case ppir_node_type_load_texture:
520 return &ppir_node_to_load_texture(node)->src[idx];
521 case ppir_node_type_load:
522 return &ppir_node_to_load(node)->src;
523 case ppir_node_type_store:
524 return &ppir_node_to_store(node)->src;
525 default:
526 break;
527 }
528
529 return NULL;
530 }
531
532 static inline ppir_reg *ppir_src_get_reg(ppir_src *src)
533 {
534 switch (src->type) {
535 case ppir_target_ssa:
536 return src->ssa;
537 case ppir_target_register:
538 return src->reg;
539 default:
540 return NULL;
541 }
542 }
543
544 static inline ppir_reg *ppir_dest_get_reg(ppir_dest *dest)
545 {
546 switch (dest->type) {
547 case ppir_target_ssa:
548 return &dest->ssa;
549 case ppir_target_register:
550 return dest->reg;
551 default:
552 return NULL;
553 }
554 }
555
556 static inline ppir_src *ppir_node_get_src_for_pred(ppir_node *node, ppir_node *pred)
557 {
558 for (int i = 0; i < ppir_node_get_src_num(node); i++) {
559 ppir_src *src = ppir_node_get_src(node, i);
560 if (src && src->node == pred)
561 return src;
562 }
563
564 return NULL;
565 }
566
567 static inline void ppir_node_target_assign(ppir_src *src, ppir_node *node)
568 {
569 ppir_dest *dest = ppir_node_get_dest(node);
570 src->type = dest->type;
571 switch (src->type) {
572 case ppir_target_ssa:
573 src->ssa = &dest->ssa;
574 src->node = node;
575 break;
576 case ppir_target_register:
577 src->reg = dest->reg;
578 /* Registers can be assigned from multiple nodes, so don't keep
579 * pointer to the node here
580 */
581 src->node = NULL;
582 break;
583 case ppir_target_pipeline:
584 src->pipeline = dest->pipeline;
585 src->node = node;
586 break;
587 }
588 }
589
590 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
591 {
592 if (src->type != dest->type ||
593 (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
594 (src->type == ppir_target_register && src->reg != dest->reg) ||
595 (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
596 return false;
597
598 return true;
599 }
600
601 static inline int ppir_target_get_src_reg_index(ppir_src *src)
602 {
603 switch (src->type) {
604 case ppir_target_ssa:
605 if (src->ssa)
606 return src->ssa->index;
607 break;
608 case ppir_target_register:
609 if (src->reg)
610 return src->reg->index;
611 break;
612 case ppir_target_pipeline:
613 if (src->pipeline == ppir_pipeline_reg_discard)
614 return 15 * 4;
615 return (src->pipeline + 12) * 4;
616 }
617
618 return -1;
619 }
620
621 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
622 {
623 switch (dest->type) {
624 case ppir_target_ssa:
625 return dest->ssa.index;
626 case ppir_target_register:
627 return dest->reg->index;
628 case ppir_target_pipeline:
629 if (dest->pipeline == ppir_pipeline_reg_discard)
630 return 15 * 4;
631 return (dest->pipeline + 12) * 4;
632 }
633
634 return -1;
635 }
636
637 static inline bool ppir_target_is_scaler(ppir_dest *dest)
638 {
639 switch (dest->type) {
640 case ppir_target_ssa:
641 return dest->ssa.num_components == 1;
642 case ppir_target_register:
643 /* only one bit in mask is set */
644 if ((dest->write_mask & 0x3) == 0x3 ||
645 (dest->write_mask & 0x5) == 0x5 ||
646 (dest->write_mask & 0x9) == 0x9 ||
647 (dest->write_mask & 0x6) == 0x6 ||
648 (dest->write_mask & 0xa) == 0xa ||
649 (dest->write_mask & 0xc) == 0xc)
650 return false;
651 else
652 return true;
653 case ppir_target_pipeline:
654 if (dest->pipeline == ppir_pipeline_reg_fmul)
655 return true;
656 else
657 return false;
658 default:
659 return false;
660 }
661 }
662
663 ppir_instr *ppir_instr_create(ppir_block *block);
664 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
665 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
666 void ppir_instr_print_list(ppir_compiler *comp);
667 void ppir_instr_print_dep(ppir_compiler *comp);
668 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
669
670 #define ppir_instr_foreach_succ(instr, dep) \
671 list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
672 #define ppir_instr_foreach_succ_safe(instr, dep) \
673 list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
674 #define ppir_instr_foreach_pred(instr, dep) \
675 list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
676 #define ppir_instr_foreach_pred_safe(instr, dep) \
677 list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
678
679 static inline bool ppir_instr_is_root(ppir_instr *instr)
680 {
681 return list_is_empty(&instr->succ_list);
682 }
683
684 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
685 {
686 return list_is_empty(&instr->pred_list);
687 }
688
689 bool ppir_lower_prog(ppir_compiler *comp);
690 bool ppir_node_to_instr(ppir_compiler *comp);
691 bool ppir_schedule_prog(ppir_compiler *comp);
692 bool ppir_regalloc_prog(ppir_compiler *comp);
693 bool ppir_codegen_prog(ppir_compiler *comp);
694 void ppir_liveness_analysis(ppir_compiler *comp);
695
696 #endif