gallium: add lima driver
[mesa.git] / src / gallium / drivers / lima / ir / pp / ppir.h
1 /*
2 * Copyright (c) 2017 Lima Project
3 * Copyright (c) 2013 Connor Abbott
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 * THE SOFTWARE.
22 *
23 */
24
25 #ifndef LIMA_IR_PP_PPIR_H
26 #define LIMA_IR_PP_PPIR_H
27
28 #include "util/u_math.h"
29 #include "util/list.h"
30
31 #include "ir/lima_ir.h"
32
33 typedef enum {
34 ppir_op_mov,
35 ppir_op_add,
36
37 ppir_op_ddx,
38 ppir_op_ddy,
39
40 ppir_op_mul,
41 ppir_op_rcp,
42
43 ppir_op_sin_lut,
44 ppir_op_cos_lut,
45
46 ppir_op_sum3,
47 ppir_op_sum4,
48
49 ppir_op_normalize2,
50 ppir_op_normalize3,
51 ppir_op_normalize4,
52
53 ppir_op_select,
54
55 ppir_op_sin,
56 ppir_op_cos,
57 ppir_op_tan,
58 ppir_op_asin,
59 ppir_op_acos,
60
61 ppir_op_atan,
62 ppir_op_atan2,
63 ppir_op_atan_pt1,
64 ppir_op_atan2_pt1,
65 ppir_op_atan_pt2,
66
67 ppir_op_exp,
68 ppir_op_log,
69 ppir_op_exp2,
70 ppir_op_log2,
71 ppir_op_sqrt,
72 ppir_op_rsqrt,
73
74 ppir_op_sign,
75 ppir_op_floor,
76 ppir_op_ceil,
77 ppir_op_fract,
78 ppir_op_mod,
79 ppir_op_min,
80 ppir_op_max,
81
82 ppir_op_dot2,
83 ppir_op_dot3,
84 ppir_op_dot4,
85
86 ppir_op_and,
87 ppir_op_or,
88 ppir_op_xor,
89
90 ppir_op_lt,
91 ppir_op_gt,
92 ppir_op_le,
93 ppir_op_ge,
94 ppir_op_eq,
95 ppir_op_ne,
96 ppir_op_not,
97
98 ppir_op_load_uniform,
99 ppir_op_load_varying,
100 ppir_op_load_coords,
101 ppir_op_load_texture,
102 ppir_op_load_temp,
103
104 ppir_op_store_temp,
105 ppir_op_store_color,
106
107 ppir_op_const,
108
109 ppir_op_num,
110 } ppir_op;
111
112 typedef enum {
113 ppir_node_type_alu,
114 ppir_node_type_const,
115 ppir_node_type_load,
116 ppir_node_type_store,
117 ppir_node_type_load_texture,
118 } ppir_node_type;
119
120 typedef struct {
121 char *name;
122 ppir_node_type type;
123 int *slots;
124 } ppir_op_info;
125
126 extern const ppir_op_info ppir_op_infos[];
127
128 typedef struct {
129 void *pred, *succ;
130 struct list_head pred_link;
131 struct list_head succ_link;
132 } ppir_dep;
133
134 typedef struct ppir_node {
135 struct list_head list;
136 ppir_op op;
137 ppir_node_type type;
138 int index;
139 char name[16];
140 bool printed;
141 struct ppir_instr *instr;
142 int instr_pos;
143 struct ppir_block *block;
144
145 /* for scheduler */
146 struct list_head succ_list;
147 struct list_head pred_list;
148 } ppir_node;
149
150 typedef enum {
151 ppir_pipeline_reg_const0,
152 ppir_pipeline_reg_const1,
153 ppir_pipeline_reg_sampler,
154 ppir_pipeline_reg_uniform,
155 ppir_pipeline_reg_vmul,
156 ppir_pipeline_reg_fmul,
157 ppir_pipeline_reg_discard, /* varying load */
158 } ppir_pipeline;
159
160 typedef struct ppir_reg {
161 struct list_head list;
162 int index;
163 int num_components;
164 /* whether this reg has to start from the x component
165 * of a full physical reg, this is true for reg used
166 * in load/store instr which has no swizzle field
167 */
168 bool is_head;
169 /* instr live range */
170 int live_in, live_out;
171 bool spilled;
172 } ppir_reg;
173
174 typedef enum {
175 ppir_target_ssa,
176 ppir_target_pipeline,
177 ppir_target_register,
178 } ppir_target;
179
180 typedef struct ppir_src {
181 ppir_target type;
182
183 union {
184 ppir_reg *ssa;
185 ppir_reg *reg;
186 ppir_pipeline pipeline;
187 };
188
189 uint8_t swizzle[4];
190 bool absolute, negate;
191 } ppir_src;
192
193 typedef enum {
194 ppir_outmod_none,
195 ppir_outmod_clamp_fraction,
196 ppir_outmod_clamp_positive,
197 ppir_outmod_round,
198 } ppir_outmod;
199
200 typedef struct ppir_dest {
201 ppir_target type;
202
203 union {
204 ppir_reg ssa;
205 ppir_reg *reg;
206 ppir_pipeline pipeline;
207 };
208
209 ppir_outmod modifier;
210 unsigned write_mask : 4;
211 } ppir_dest;
212
213 typedef struct {
214 ppir_node node;
215 ppir_dest dest;
216 ppir_src src[3];
217 int num_src;
218 int shift : 3; /* Only used for ppir_op_mul */
219 } ppir_alu_node;
220
221 typedef struct ppir_const {
222 union fi value[4];
223 int num;
224 } ppir_const;
225
226 typedef struct {
227 ppir_node node;
228 ppir_const constant;
229 ppir_dest dest;
230 } ppir_const_node;
231
232 typedef struct {
233 ppir_node node;
234 int index;
235 int num_components;
236 ppir_dest dest;
237 ppir_src src;
238 } ppir_load_node;
239
240 typedef struct {
241 ppir_node node;
242 int index;
243 int num_components;
244 ppir_src src;
245 } ppir_store_node;
246
247 typedef struct {
248 ppir_node node;
249 ppir_dest dest;
250 ppir_src src_coords;
251 int sampler;
252 int sampler_dim;
253 } ppir_load_texture_node;
254
255 enum ppir_instr_slot {
256 PPIR_INSTR_SLOT_VARYING,
257 PPIR_INSTR_SLOT_TEXLD,
258 PPIR_INSTR_SLOT_UNIFORM,
259 PPIR_INSTR_SLOT_ALU_VEC_MUL,
260 PPIR_INSTR_SLOT_ALU_SCL_MUL,
261 PPIR_INSTR_SLOT_ALU_VEC_ADD,
262 PPIR_INSTR_SLOT_ALU_SCL_ADD,
263 PPIR_INSTR_SLOT_ALU_COMBINE,
264 PPIR_INSTR_SLOT_STORE_TEMP,
265 PPIR_INSTR_SLOT_NUM,
266 PPIR_INSTR_SLOT_END,
267 PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
268 PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
269 };
270
271 typedef struct ppir_instr {
272 struct list_head list;
273 int index;
274 bool printed;
275 int seq; /* command sequence after schedule */
276
277 ppir_node *slots[PPIR_INSTR_SLOT_NUM];
278 ppir_const constant[2];
279 bool is_end;
280
281 /* for scheduler */
282 struct list_head succ_list;
283 struct list_head pred_list;
284 float reg_pressure;
285 int est; /* earliest start time */
286 int parent_index;
287 bool scheduled;
288 } ppir_instr;
289
290 typedef struct ppir_block {
291 struct list_head list;
292 struct list_head node_list;
293 struct list_head instr_list;
294 struct ppir_compiler *comp;
295
296 /* for scheduler */
297 int sched_instr_index;
298 int sched_instr_base;
299 } ppir_block;
300
301 struct ra_regs;
302 struct lima_fs_shader_state;
303
304 typedef struct ppir_compiler {
305 struct list_head block_list;
306 int cur_index;
307 int cur_instr_index;
308
309 struct list_head reg_list;
310
311 /* array for searching ssa/reg node */
312 ppir_node **var_nodes;
313 unsigned reg_base;
314
315 struct ra_regs *ra;
316 struct lima_fs_shader_state *prog;
317
318 /* for scheduler */
319 int sched_instr_base;
320
321 /* for regalloc spilling debug */
322 int force_spilling;
323 } ppir_compiler;
324
325 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
326 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred);
327 void ppir_node_remove_dep(ppir_dep *dep);
328 void ppir_node_delete(ppir_node *node);
329 void ppir_node_print_prog(ppir_compiler *comp);
330 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
331 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
332 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
333
334 static inline bool ppir_node_is_root(ppir_node *node)
335 {
336 return list_empty(&node->succ_list);
337 }
338
339 static inline bool ppir_node_is_leaf(ppir_node *node)
340 {
341 return list_empty(&node->pred_list);
342 }
343
344 static inline bool ppir_node_has_single_succ(ppir_node *node)
345 {
346 return list_is_singular(&node->succ_list);
347 }
348
349 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
350 {
351 return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
352 }
353
354 static inline bool ppir_node_has_single_pred(ppir_node *node)
355 {
356 return list_is_singular(&node->pred_list);
357 }
358
359 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
360 {
361 return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
362 }
363
364 #define ppir_node_foreach_succ(node, dep) \
365 list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
366 #define ppir_node_foreach_succ_safe(node, dep) \
367 list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
368 #define ppir_node_foreach_pred(node, dep) \
369 list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
370 #define ppir_node_foreach_pred_safe(node, dep) \
371 list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
372
373 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
374 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
375 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
376 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
377 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
378
379 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
380 {
381 switch (node->type) {
382 case ppir_node_type_alu:
383 return &ppir_node_to_alu(node)->dest;
384 case ppir_node_type_load:
385 return &ppir_node_to_load(node)->dest;
386 case ppir_node_type_const:
387 return &ppir_node_to_const(node)->dest;
388 case ppir_node_type_load_texture:
389 return &ppir_node_to_load_texture(node)->dest;
390 default:
391 return NULL;
392 }
393 }
394
395 static inline void ppir_node_target_assign(ppir_src *src, ppir_dest *dest)
396 {
397 src->type = dest->type;
398 switch (src->type) {
399 case ppir_target_ssa:
400 src->ssa = &dest->ssa;
401 break;
402 case ppir_target_register:
403 src->reg = dest->reg;
404 break;
405 case ppir_target_pipeline:
406 src->pipeline = dest->pipeline;
407 break;
408 }
409 }
410
411 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
412 {
413 if (src->type != dest->type ||
414 (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
415 (src->type == ppir_target_register && src->reg != dest->reg) ||
416 (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
417 return false;
418
419 return true;
420 }
421
422 static inline int ppir_target_get_src_reg_index(ppir_src *src)
423 {
424 switch (src->type) {
425 case ppir_target_ssa:
426 return src->ssa->index;
427 case ppir_target_register:
428 return src->reg->index;
429 case ppir_target_pipeline:
430 if (src->pipeline == ppir_pipeline_reg_discard)
431 return 15 * 4;
432 return (src->pipeline + 12) * 4;
433 }
434
435 return -1;
436 }
437
438 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
439 {
440 switch (dest->type) {
441 case ppir_target_ssa:
442 return dest->ssa.index;
443 case ppir_target_register:
444 return dest->reg->index;
445 case ppir_target_pipeline:
446 if (dest->pipeline == ppir_pipeline_reg_discard)
447 return 15 * 4;
448 return (dest->pipeline + 12) * 4;
449 }
450
451 return -1;
452 }
453
454 static inline bool ppir_target_is_scaler(ppir_dest *dest)
455 {
456 switch (dest->type) {
457 case ppir_target_ssa:
458 return dest->ssa.num_components == 1;
459 case ppir_target_register:
460 /* only one bit in mask is set */
461 if ((dest->write_mask & 0x3) == 0x3 ||
462 (dest->write_mask & 0x5) == 0x5 ||
463 (dest->write_mask & 0x9) == 0x9 ||
464 (dest->write_mask & 0x6) == 0x6 ||
465 (dest->write_mask & 0xa) == 0xa ||
466 (dest->write_mask & 0xc) == 0xc)
467 return false;
468 else
469 return true;
470 case ppir_target_pipeline:
471 if (dest->pipeline == ppir_pipeline_reg_fmul)
472 return true;
473 else
474 return false;
475 default:
476 return false;
477 }
478 }
479
480 ppir_instr *ppir_instr_create(ppir_block *block);
481 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
482 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
483 void ppir_instr_print_list(ppir_compiler *comp);
484 void ppir_instr_print_dep(ppir_compiler *comp);
485 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
486
487 #define ppir_instr_foreach_succ(instr, dep) \
488 list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
489 #define ppir_instr_foreach_succ_safe(instr, dep) \
490 list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
491 #define ppir_instr_foreach_pred(instr, dep) \
492 list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
493 #define ppir_instr_foreach_pred_safe(instr, dep) \
494 list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
495
496 static inline bool ppir_instr_is_root(ppir_instr *instr)
497 {
498 return list_empty(&instr->succ_list);
499 }
500
501 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
502 {
503 return list_empty(&instr->pred_list);
504 }
505
506 bool ppir_lower_prog(ppir_compiler *comp);
507 bool ppir_node_to_instr(ppir_compiler *comp);
508 bool ppir_schedule_prog(ppir_compiler *comp);
509 bool ppir_regalloc_prog(ppir_compiler *comp);
510 bool ppir_codegen_prog(ppir_compiler *comp);
511
512 #endif