lima/ppir: clone ld_{uni,tex,var} into each block
[mesa.git] / src / gallium / drivers / lima / ir / pp / ppir.h
1 /*
2 * Copyright (c) 2017 Lima Project
3 * Copyright (c) 2013 Connor Abbott
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 * THE SOFTWARE.
22 *
23 */
24
25 #ifndef LIMA_IR_PP_PPIR_H
26 #define LIMA_IR_PP_PPIR_H
27
28 #include "util/u_math.h"
29 #include "util/list.h"
30
31 #include "ir/lima_ir.h"
32
33 typedef enum {
34 ppir_op_mov,
35 ppir_op_abs,
36 ppir_op_neg,
37 ppir_op_sat,
38 ppir_op_add,
39
40 ppir_op_ddx,
41 ppir_op_ddy,
42
43 ppir_op_mul,
44 ppir_op_rcp,
45
46 ppir_op_sin_lut,
47 ppir_op_cos_lut,
48
49 ppir_op_sum3,
50 ppir_op_sum4,
51
52 ppir_op_normalize2,
53 ppir_op_normalize3,
54 ppir_op_normalize4,
55
56 ppir_op_sel_cond,
57 ppir_op_select,
58
59 ppir_op_sin,
60 ppir_op_cos,
61 ppir_op_tan,
62 ppir_op_asin,
63 ppir_op_acos,
64
65 ppir_op_atan,
66 ppir_op_atan2,
67 ppir_op_atan_pt1,
68 ppir_op_atan2_pt1,
69 ppir_op_atan_pt2,
70
71 ppir_op_exp,
72 ppir_op_log,
73 ppir_op_exp2,
74 ppir_op_log2,
75 ppir_op_sqrt,
76 ppir_op_rsqrt,
77
78 ppir_op_sign,
79 ppir_op_floor,
80 ppir_op_ceil,
81 ppir_op_fract,
82 ppir_op_mod,
83 ppir_op_min,
84 ppir_op_max,
85 ppir_op_trunc,
86
87 ppir_op_and,
88 ppir_op_or,
89 ppir_op_xor,
90
91 ppir_op_lt,
92 ppir_op_gt,
93 ppir_op_le,
94 ppir_op_ge,
95 ppir_op_eq,
96 ppir_op_ne,
97 ppir_op_not,
98
99 ppir_op_load_uniform,
100 ppir_op_load_varying,
101 ppir_op_load_coords,
102 ppir_op_load_fragcoord,
103 ppir_op_load_pointcoord,
104 ppir_op_load_frontface,
105 ppir_op_load_texture,
106 ppir_op_load_temp,
107
108 ppir_op_store_temp,
109 ppir_op_store_color,
110
111 ppir_op_const,
112
113 ppir_op_discard,
114 ppir_op_branch,
115
116 ppir_op_num,
117 } ppir_op;
118
119 typedef enum {
120 ppir_node_type_alu,
121 ppir_node_type_const,
122 ppir_node_type_load,
123 ppir_node_type_store,
124 ppir_node_type_load_texture,
125 ppir_node_type_discard,
126 ppir_node_type_branch,
127 } ppir_node_type;
128
129 typedef struct {
130 char *name;
131 ppir_node_type type;
132 int *slots;
133 } ppir_op_info;
134
135 extern const ppir_op_info ppir_op_infos[];
136
137 typedef struct {
138 void *pred, *succ;
139 struct list_head pred_link;
140 struct list_head succ_link;
141 } ppir_dep;
142
143 typedef struct ppir_node {
144 struct list_head list;
145 ppir_op op;
146 ppir_node_type type;
147 int index;
148 char name[16];
149 bool printed;
150 struct ppir_instr *instr;
151 int instr_pos;
152 struct ppir_block *block;
153
154 /* for scheduler */
155 struct list_head succ_list;
156 struct list_head pred_list;
157 } ppir_node;
158
159 typedef enum {
160 ppir_pipeline_reg_const0,
161 ppir_pipeline_reg_const1,
162 ppir_pipeline_reg_sampler,
163 ppir_pipeline_reg_uniform,
164 ppir_pipeline_reg_vmul,
165 ppir_pipeline_reg_fmul,
166 ppir_pipeline_reg_discard, /* varying load */
167 } ppir_pipeline;
168
169 typedef struct ppir_reg {
170 struct list_head list;
171 int index;
172 int num_components;
173 /* whether this reg has to start from the x component
174 * of a full physical reg, this is true for reg used
175 * in load/store instr which has no swizzle field
176 */
177 bool is_head;
178 /* instr live range */
179 int live_in, live_out;
180 bool spilled;
181 } ppir_reg;
182
183 typedef enum {
184 ppir_target_ssa,
185 ppir_target_pipeline,
186 ppir_target_register,
187 } ppir_target;
188
189 typedef struct ppir_src {
190 ppir_target type;
191 ppir_node *node;
192
193 union {
194 ppir_reg *ssa;
195 ppir_reg *reg;
196 ppir_pipeline pipeline;
197 };
198
199 uint8_t swizzle[4];
200 bool absolute, negate;
201 } ppir_src;
202
203 typedef enum {
204 ppir_outmod_none,
205 ppir_outmod_clamp_fraction,
206 ppir_outmod_clamp_positive,
207 ppir_outmod_round,
208 } ppir_outmod;
209
210 typedef struct ppir_dest {
211 ppir_target type;
212
213 union {
214 ppir_reg ssa;
215 ppir_reg *reg;
216 ppir_pipeline pipeline;
217 };
218
219 ppir_outmod modifier;
220 unsigned write_mask : 4;
221 } ppir_dest;
222
223 typedef struct {
224 ppir_node node;
225 ppir_dest dest;
226 ppir_src src[3];
227 int num_src;
228 int shift : 3; /* Only used for ppir_op_mul */
229 } ppir_alu_node;
230
231 typedef struct ppir_const {
232 union fi value[4];
233 int num;
234 } ppir_const;
235
236 typedef struct {
237 ppir_node node;
238 ppir_const constant;
239 ppir_dest dest;
240 } ppir_const_node;
241
242 typedef struct {
243 ppir_node node;
244 int index;
245 int num_components;
246 ppir_dest dest;
247 ppir_src src;
248 } ppir_load_node;
249
250 typedef struct {
251 ppir_node node;
252 int index;
253 int num_components;
254 ppir_src src;
255 } ppir_store_node;
256
257 typedef struct {
258 ppir_node node;
259 ppir_dest dest;
260 ppir_src src_coords; /* not to be used after lowering */
261 int sampler;
262 int sampler_dim;
263 } ppir_load_texture_node;
264
265 typedef struct {
266 ppir_node node;
267 } ppir_discard_node;
268
269 enum ppir_instr_slot {
270 PPIR_INSTR_SLOT_VARYING,
271 PPIR_INSTR_SLOT_TEXLD,
272 PPIR_INSTR_SLOT_UNIFORM,
273 PPIR_INSTR_SLOT_ALU_VEC_MUL,
274 PPIR_INSTR_SLOT_ALU_SCL_MUL,
275 PPIR_INSTR_SLOT_ALU_VEC_ADD,
276 PPIR_INSTR_SLOT_ALU_SCL_ADD,
277 PPIR_INSTR_SLOT_ALU_COMBINE,
278 PPIR_INSTR_SLOT_STORE_TEMP,
279 PPIR_INSTR_SLOT_BRANCH,
280 PPIR_INSTR_SLOT_NUM,
281 PPIR_INSTR_SLOT_END,
282 PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
283 PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
284 };
285
286 typedef struct ppir_instr {
287 struct list_head list;
288 int index;
289 bool printed;
290 int seq; /* command sequence after schedule */
291
292 ppir_node *slots[PPIR_INSTR_SLOT_NUM];
293 ppir_const constant[2];
294 bool is_end;
295
296 /* for scheduler */
297 struct list_head succ_list;
298 struct list_head pred_list;
299 float reg_pressure;
300 int est; /* earliest start time */
301 int parent_index;
302 bool scheduled;
303 int offset;
304 int encode_size;
305 } ppir_instr;
306
307 typedef struct ppir_block {
308 struct list_head list;
309 struct list_head node_list;
310 struct list_head instr_list;
311 struct ppir_compiler *comp;
312
313 /* for scheduler */
314 int sched_instr_index;
315 int sched_instr_base;
316 } ppir_block;
317
318 typedef struct {
319 ppir_node node;
320 ppir_src src[2];
321 bool cond_gt;
322 bool cond_eq;
323 bool cond_lt;
324 ppir_block *target;
325 } ppir_branch_node;
326
327 struct ra_regs;
328 struct lima_fs_shader_state;
329
330 typedef struct ppir_compiler {
331 struct list_head block_list;
332 int cur_index;
333 int cur_instr_index;
334
335 struct list_head reg_list;
336
337 /* array for searching ssa/reg node */
338 ppir_node **var_nodes;
339 unsigned reg_base;
340
341 struct ra_regs *ra;
342 struct lima_fs_shader_state *prog;
343
344 /* for scheduler */
345 int sched_instr_base;
346
347 /* for regalloc spilling debug */
348 int force_spilling;
349
350 /* shaderdb */
351 int num_loops;
352 int num_spills;
353 int num_fills;
354
355 ppir_block *discard_block;
356 } ppir_compiler;
357
358 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
359 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred);
360 void ppir_node_remove_dep(ppir_dep *dep);
361 void ppir_node_delete(ppir_node *node);
362 void ppir_node_print_prog(ppir_compiler *comp);
363 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
364 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
365 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
366 ppir_node *ppir_node_clone(ppir_block *block, ppir_node *node);
367
368 static inline bool ppir_node_is_root(ppir_node *node)
369 {
370 return list_empty(&node->succ_list);
371 }
372
373 static inline bool ppir_node_is_leaf(ppir_node *node)
374 {
375 return list_empty(&node->pred_list);
376 }
377
378 static inline bool ppir_node_has_single_succ(ppir_node *node)
379 {
380 return list_is_singular(&node->succ_list);
381 }
382
383 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
384 {
385 return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
386 }
387
388 static inline bool ppir_node_has_single_pred(ppir_node *node)
389 {
390 return list_is_singular(&node->pred_list);
391 }
392
393 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
394 {
395 return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
396 }
397
398 #define ppir_node_foreach_succ(node, dep) \
399 list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
400 #define ppir_node_foreach_succ_safe(node, dep) \
401 list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
402 #define ppir_node_foreach_pred(node, dep) \
403 list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
404 #define ppir_node_foreach_pred_safe(node, dep) \
405 list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
406
407 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
408 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
409 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
410 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
411 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
412 #define ppir_node_to_discard(node) ((ppir_discard_node *)(node))
413 #define ppir_node_to_branch(node) ((ppir_branch_node *)(node))
414
415 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
416 {
417 switch (node->type) {
418 case ppir_node_type_alu:
419 return &ppir_node_to_alu(node)->dest;
420 case ppir_node_type_load:
421 return &ppir_node_to_load(node)->dest;
422 case ppir_node_type_const:
423 return &ppir_node_to_const(node)->dest;
424 case ppir_node_type_load_texture:
425 return &ppir_node_to_load_texture(node)->dest;
426 default:
427 return NULL;
428 }
429 }
430
431 static inline int ppir_node_get_src_num(ppir_node *node)
432 {
433 switch (node->type) {
434 case ppir_node_type_alu:
435 return ppir_node_to_alu(node)->num_src;
436 case ppir_node_type_branch:
437 return 2;
438 case ppir_node_type_load_texture:
439 case ppir_node_type_load:
440 case ppir_node_type_store:
441 return 1;
442 default:
443 return 0;
444 }
445
446 return 0;
447 }
448
449 static inline ppir_src *ppir_node_get_src(ppir_node *node, int idx)
450 {
451 if (idx < 0 || idx >= ppir_node_get_src_num(node))
452 return NULL;
453
454 switch (node->type) {
455 case ppir_node_type_alu:
456 return &ppir_node_to_alu(node)->src[idx];
457 case ppir_node_type_branch:
458 return &ppir_node_to_branch(node)->src[idx];
459 case ppir_node_type_load_texture:
460 return &ppir_node_to_load_texture(node)->src_coords;
461 case ppir_node_type_load:
462 return &ppir_node_to_load(node)->src;
463 case ppir_node_type_store:
464 return &ppir_node_to_store(node)->src;
465 default:
466 break;
467 }
468
469 return NULL;
470 }
471
472 static inline ppir_src *ppir_node_get_src_for_pred(ppir_node *node, ppir_node *pred)
473 {
474 for (int i = 0; i < ppir_node_get_src_num(node); i++) {
475 ppir_src *src = ppir_node_get_src(node, i);
476 if (src && src->node == pred)
477 return src;
478 }
479
480 return NULL;
481 }
482
483 static inline void ppir_node_target_assign(ppir_src *src, ppir_node *node)
484 {
485 ppir_dest *dest = ppir_node_get_dest(node);
486 src->type = dest->type;
487 switch (src->type) {
488 case ppir_target_ssa:
489 src->ssa = &dest->ssa;
490 src->node = node;
491 break;
492 case ppir_target_register:
493 src->reg = dest->reg;
494 /* Registers can be assigned from multiple nodes, so don't keep
495 * pointer to the node here
496 */
497 src->node = NULL;
498 break;
499 case ppir_target_pipeline:
500 src->pipeline = dest->pipeline;
501 src->node = node;
502 break;
503 }
504 }
505
506 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
507 {
508 if (src->type != dest->type ||
509 (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
510 (src->type == ppir_target_register && src->reg != dest->reg) ||
511 (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
512 return false;
513
514 return true;
515 }
516
517 static inline int ppir_target_get_src_reg_index(ppir_src *src)
518 {
519 switch (src->type) {
520 case ppir_target_ssa:
521 if (src->ssa)
522 return src->ssa->index;
523 break;
524 case ppir_target_register:
525 if (src->reg)
526 return src->reg->index;
527 break;
528 case ppir_target_pipeline:
529 if (src->pipeline == ppir_pipeline_reg_discard)
530 return 15 * 4;
531 return (src->pipeline + 12) * 4;
532 }
533
534 return -1;
535 }
536
537 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
538 {
539 switch (dest->type) {
540 case ppir_target_ssa:
541 return dest->ssa.index;
542 case ppir_target_register:
543 return dest->reg->index;
544 case ppir_target_pipeline:
545 if (dest->pipeline == ppir_pipeline_reg_discard)
546 return 15 * 4;
547 return (dest->pipeline + 12) * 4;
548 }
549
550 return -1;
551 }
552
553 static inline bool ppir_target_is_scaler(ppir_dest *dest)
554 {
555 switch (dest->type) {
556 case ppir_target_ssa:
557 return dest->ssa.num_components == 1;
558 case ppir_target_register:
559 /* only one bit in mask is set */
560 if ((dest->write_mask & 0x3) == 0x3 ||
561 (dest->write_mask & 0x5) == 0x5 ||
562 (dest->write_mask & 0x9) == 0x9 ||
563 (dest->write_mask & 0x6) == 0x6 ||
564 (dest->write_mask & 0xa) == 0xa ||
565 (dest->write_mask & 0xc) == 0xc)
566 return false;
567 else
568 return true;
569 case ppir_target_pipeline:
570 if (dest->pipeline == ppir_pipeline_reg_fmul)
571 return true;
572 else
573 return false;
574 default:
575 return false;
576 }
577 }
578
579 ppir_instr *ppir_instr_create(ppir_block *block);
580 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
581 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
582 void ppir_instr_print_list(ppir_compiler *comp);
583 void ppir_instr_print_dep(ppir_compiler *comp);
584 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
585
586 #define ppir_instr_foreach_succ(instr, dep) \
587 list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
588 #define ppir_instr_foreach_succ_safe(instr, dep) \
589 list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
590 #define ppir_instr_foreach_pred(instr, dep) \
591 list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
592 #define ppir_instr_foreach_pred_safe(instr, dep) \
593 list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
594
595 static inline bool ppir_instr_is_root(ppir_instr *instr)
596 {
597 return list_empty(&instr->succ_list);
598 }
599
600 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
601 {
602 return list_empty(&instr->pred_list);
603 }
604
605 bool ppir_lower_prog(ppir_compiler *comp);
606 bool ppir_node_to_instr(ppir_compiler *comp);
607 bool ppir_schedule_prog(ppir_compiler *comp);
608 bool ppir_regalloc_prog(ppir_compiler *comp);
609 bool ppir_codegen_prog(ppir_compiler *comp);
610
611 #endif