2 * Copyright (c) 2011-2013 Luc Verhaegen <libv@skynet.be>
3 * Copyright (c) 2017-2019 Lima Project
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
26 #include "util/u_math.h"
27 #include "util/format/u_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_half.h"
30 #include "util/u_helpers.h"
31 #include "util/u_inlines.h"
32 #include "util/u_pack_color.h"
33 #include "util/hash_table.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36 #include "util/u_vbuf.h"
38 #include "lima_context.h"
39 #include "lima_screen.h"
40 #include "lima_resource.h"
41 #include "lima_program.h"
43 #include "lima_submit.h"
44 #include "lima_texture.h"
45 #include "lima_util.h"
46 #include "lima_fence.h"
47 #include "lima_format.h"
49 #include <drm-uapi/lima_drm.h>
51 struct lima_gp_frame_reg
{
52 uint32_t vs_cmd_start
;
54 uint32_t plbu_cmd_start
;
55 uint32_t plbu_cmd_end
;
56 uint32_t tile_heap_start
;
57 uint32_t tile_heap_end
;
60 struct lima_pp_frame_reg
{
61 uint32_t plbu_array_address
;
62 uint32_t render_address
;
65 uint32_t clear_value_depth
;
66 uint32_t clear_value_stencil
;
67 uint32_t clear_value_color
;
68 uint32_t clear_value_color_1
;
69 uint32_t clear_value_color_2
;
70 uint32_t clear_value_color_3
;
73 uint32_t fragment_stack_address
;
74 uint32_t fragment_stack_size
;
78 uint32_t supersampled_height
;
86 struct lima_pp_wb_reg
{
89 uint32_t pixel_format
;
90 uint32_t downsample_factor
;
91 uint32_t pixel_layout
;
101 struct lima_render_state
{
102 uint32_t blend_color_bg
;
103 uint32_t blend_color_ra
;
104 uint32_t alpha_blend
;
106 uint32_t depth_range
;
107 uint32_t stencil_front
;
108 uint32_t stencil_back
;
109 uint32_t stencil_test
;
110 uint32_t multi_sample
;
111 uint32_t shader_address
;
112 uint32_t varying_types
;
113 uint32_t uniforms_address
;
114 uint32_t textures_address
;
117 uint32_t varyings_address
;
122 #define PLBU_CMD_BEGIN(max) { \
123 int i = 0, max_n = max; \
124 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + max_n * 4);
126 #define PLBU_CMD_END() \
127 assert(i <= max_n); \
128 ctx->plbu_cmd_array.size += i * 4; \
131 #define PLBU_CMD(v1, v2) \
133 plbu_cmd[i++] = v1; \
134 plbu_cmd[i++] = v2; \
137 #define PLBU_CMD_BLOCK_STEP(shift_min, shift_h, shift_w) \
138 PLBU_CMD(((shift_min) << 28) | ((shift_h) << 16) | (shift_w), 0x1000010C)
139 #define PLBU_CMD_TILED_DIMENSIONS(tiled_w, tiled_h) \
140 PLBU_CMD((((tiled_w) - 1) << 24) | (((tiled_h) - 1) << 8), 0x10000109)
141 #define PLBU_CMD_BLOCK_STRIDE(block_w) PLBU_CMD((block_w) & 0xff, 0x30000000)
142 #define PLBU_CMD_ARRAY_ADDRESS(gp_stream, block_num) \
143 PLBU_CMD(gp_stream, 0x28000000 | ((block_num) - 1) | 1)
144 #define PLBU_CMD_VIEWPORT_LEFT(v) PLBU_CMD(v, 0x10000107)
145 #define PLBU_CMD_VIEWPORT_RIGHT(v) PLBU_CMD(v, 0x10000108)
146 #define PLBU_CMD_VIEWPORT_BOTTOM(v) PLBU_CMD(v, 0x10000105)
147 #define PLBU_CMD_VIEWPORT_TOP(v) PLBU_CMD(v, 0x10000106)
148 #define PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN() PLBU_CMD(0x00010002, 0x60000000)
149 #define PLBU_CMD_ARRAYS_SEMAPHORE_END() PLBU_CMD(0x00010001, 0x60000000)
150 #define PLBU_CMD_PRIMITIVE_SETUP(prim, cull, index_size) \
151 PLBU_CMD(0x200 | (prim) | (cull) | ((index_size) << 9), 0x1000010B)
152 #define PLBU_CMD_RSW_VERTEX_ARRAY(rsw, gl_pos) \
153 PLBU_CMD(rsw, 0x80000000 | ((gl_pos) >> 4))
154 #define PLBU_CMD_SCISSORS(minx, maxx, miny, maxy) \
155 PLBU_CMD(((minx) << 30) | ((maxy) - 1) << 15 | (miny), \
156 0x70000000 | ((maxx) - 1) << 13 | ((minx) >> 2))
157 #define PLBU_CMD_UNKNOWN1() PLBU_CMD(0x00000000, 0x1000010A)
158 #define PLBU_CMD_UNKNOWN2() PLBU_CMD(0x00000200, 0x1000010B)
159 #define PLBU_CMD_LOW_PRIM_SIZE(v) PLBU_CMD(v, 0x1000010D)
160 #define PLBU_CMD_DEPTH_RANGE_NEAR(v) PLBU_CMD(v, 0x1000010E)
161 #define PLBU_CMD_DEPTH_RANGE_FAR(v) PLBU_CMD(v, 0x1000010F)
162 #define PLBU_CMD_INDEXED_DEST(gl_pos) PLBU_CMD(gl_pos, 0x10000100)
163 #define PLBU_CMD_INDEXED_PT_SIZE(pt_size) PLBU_CMD(pt_size, 0x10000102)
164 #define PLBU_CMD_INDICES(va) PLBU_CMD(va, 0x10000101)
165 #define PLBU_CMD_DRAW_ARRAYS(mode, start, count) \
166 PLBU_CMD(((count) << 24) | (start), (((mode) & 0x1F) << 16) | ((count) >> 8))
167 #define PLBU_CMD_DRAW_ELEMENTS(mode, start, count) \
168 PLBU_CMD(((count) << 24) | (start), \
169 0x00200000 | (((mode) & 0x1F) << 16) | ((count) >> 8))
172 #define VS_CMD_BEGIN(max) { \
173 int i = 0, max_n = max; \
174 uint32_t *vs_cmd = util_dynarray_ensure_cap(&ctx->vs_cmd_array, ctx->vs_cmd_array.size + max_n * 4);
176 #define VS_CMD_END() \
177 assert(i <= max_n); \
178 ctx->vs_cmd_array.size += i * 4; \
181 #define VS_CMD(v1, v2) \
187 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1() VS_CMD(0x00028000, 0x50000000)
188 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2() VS_CMD(0x00000001, 0x50000000)
189 #define VS_CMD_ARRAYS_SEMAPHORE_END(index_draw) \
190 VS_CMD((index_draw) ? 0x00018000 : 0x00000000, 0x50000000)
191 #define VS_CMD_UNIFORMS_ADDRESS(addr, size) \
192 VS_CMD(addr, 0x30000000 | ((size) << 12))
193 #define VS_CMD_SHADER_ADDRESS(addr, size) \
194 VS_CMD(addr, 0x40000000 | ((size) << 12))
195 #define VS_CMD_SHADER_INFO(prefetch, size) \
196 VS_CMD(((prefetch) << 20) | ((((size) >> 4) - 1) << 10), 0x10000040)
197 #define VS_CMD_VARYING_ATTRIBUTE_COUNT(nv, na) \
198 VS_CMD((((nv) - 1) << 8) | (((na) - 1) << 24), 0x10000042)
199 #define VS_CMD_UNKNOWN1() VS_CMD(0x00000003, 0x10000041)
200 #define VS_CMD_UNKNOWN2() VS_CMD(0x00000000, 0x60000000)
201 #define VS_CMD_ATTRIBUTES_ADDRESS(addr, na) \
202 VS_CMD(addr, 0x20000000 | ((na) << 17))
203 #define VS_CMD_VARYINGS_ADDRESS(addr, nv) \
204 VS_CMD(addr, 0x20000008 | ((nv) << 17))
205 #define VS_CMD_DRAW(num, index_draw) \
206 VS_CMD(((num) << 24) | ((index_draw) ? 1 : 0), ((num) >> 8))
209 lima_ctx_dirty(struct lima_context
*ctx
)
211 return ctx
->plbu_cmd_array
.size
;
214 static inline struct lima_damage_region
*
215 lima_ctx_get_damage(struct lima_context
*ctx
)
217 if (!ctx
->framebuffer
.base
.nr_cbufs
)
220 struct lima_surface
*surf
= lima_surface(ctx
->framebuffer
.base
.cbufs
[0]);
221 struct lima_resource
*res
= lima_resource(surf
->base
.texture
);
226 lima_fb_need_reload(struct lima_context
*ctx
)
228 /* Depth buffer is always discarded */
229 if (!ctx
->framebuffer
.base
.nr_cbufs
)
232 struct lima_surface
*surf
= lima_surface(ctx
->framebuffer
.base
.cbufs
[0]);
233 struct lima_resource
*res
= lima_resource(surf
->base
.texture
);
234 if (res
->damage
.region
) {
235 /* for EGL_KHR_partial_update, when EGL_EXT_buffer_age is enabled,
236 * we need to reload damage region, otherwise just want to reload
237 * the region not aligned to tile boundary */
238 //if (!res->damage.aligned)
242 else if (surf
->reload
)
249 lima_pack_reload_plbu_cmd(struct lima_context
*ctx
)
251 #define lima_reload_render_state_offset 0x0000
252 #define lima_reload_gl_pos_offset 0x0040
253 #define lima_reload_varying_offset 0x0080
254 #define lima_reload_tex_desc_offset 0x00c0
255 #define lima_reload_tex_array_offset 0x0100
256 #define lima_reload_buffer_size 0x0140
260 struct pipe_resource
*pres
= NULL
;
261 u_upload_alloc(ctx
->uploader
, 0, lima_reload_buffer_size
,
262 0x40, &offset
, &pres
, &cpu
);
264 struct lima_resource
*res
= lima_resource(pres
);
265 uint32_t va
= res
->bo
->va
+ offset
;
267 struct lima_screen
*screen
= lima_screen(ctx
->base
.screen
);
269 uint32_t reload_shader_first_instr_size
=
270 ((uint32_t *)(screen
->pp_buffer
->map
+ pp_reload_program_offset
))[0] & 0x1f;
271 uint32_t reload_shader_va
= screen
->pp_buffer
->va
+ pp_reload_program_offset
;
273 struct lima_render_state reload_render_state
= {
274 .alpha_blend
= 0xf03b1ad2,
275 .depth_test
= 0x0000000e,
276 .depth_range
= 0xffff0000,
277 .stencil_front
= 0x00000007,
278 .stencil_back
= 0x00000007,
279 .multi_sample
= 0x0000f007,
280 .shader_address
= reload_shader_va
| reload_shader_first_instr_size
,
281 .varying_types
= 0x00000001,
282 .textures_address
= va
+ lima_reload_tex_array_offset
,
284 .varyings_address
= va
+ lima_reload_varying_offset
,
286 memcpy(cpu
+ lima_reload_render_state_offset
, &reload_render_state
,
287 sizeof(reload_render_state
));
289 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
290 lima_tex_desc
*td
= cpu
+ lima_reload_tex_desc_offset
;
291 memset(td
, 0, lima_min_tex_desc_size
);
292 lima_texture_desc_set_res(ctx
, td
, fb
->base
.cbufs
[0]->texture
, 0, 0);
293 td
->unnorm_coords
= 1;
294 td
->texture_type
= LIMA_TEXTURE_TYPE_2D
;
295 td
->min_img_filter_nearest
= 1;
296 td
->mag_img_filter_nearest
= 1;
297 td
->wrap_s_clamp_to_edge
= 1;
298 td
->wrap_t_clamp_to_edge
= 1;
299 td
->unknown_2_2
= 0x1;
301 uint32_t *ta
= cpu
+ lima_reload_tex_array_offset
;
302 ta
[0] = va
+ lima_reload_tex_desc_offset
;
304 float reload_gl_pos
[] = {
305 fb
->base
.width
, 0, 0, 1,
307 0, fb
->base
.height
, 0, 1,
309 memcpy(cpu
+ lima_reload_gl_pos_offset
, reload_gl_pos
,
310 sizeof(reload_gl_pos
));
312 float reload_varying
[] = {
313 fb
->base
.width
, 0, 0, 0,
314 0, fb
->base
.height
, 0, 0,
316 memcpy(cpu
+ lima_reload_varying_offset
, reload_varying
,
317 sizeof(reload_varying
));
319 lima_submit_add_bo(ctx
->pp_submit
, res
->bo
, LIMA_SUBMIT_BO_READ
);
320 pipe_resource_reference(&pres
, NULL
);
324 PLBU_CMD_VIEWPORT_LEFT(0);
325 PLBU_CMD_VIEWPORT_RIGHT(fui(fb
->base
.width
));
326 PLBU_CMD_VIEWPORT_BOTTOM(0);
327 PLBU_CMD_VIEWPORT_TOP(fui(fb
->base
.height
));
329 PLBU_CMD_RSW_VERTEX_ARRAY(
330 va
+ lima_reload_render_state_offset
,
331 va
+ lima_reload_gl_pos_offset
);
336 PLBU_CMD_INDICES(screen
->pp_buffer
->va
+ pp_shared_index_offset
);
337 PLBU_CMD_INDEXED_DEST(va
+ lima_reload_gl_pos_offset
);
338 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
344 lima_pack_head_plbu_cmd(struct lima_context
*ctx
)
346 /* first draw need create a PLBU command header */
347 if (lima_ctx_dirty(ctx
))
350 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
355 PLBU_CMD_BLOCK_STEP(fb
->shift_min
, fb
->shift_h
, fb
->shift_w
);
356 PLBU_CMD_TILED_DIMENSIONS(fb
->tiled_w
, fb
->tiled_h
);
357 PLBU_CMD_BLOCK_STRIDE(fb
->block_w
);
359 PLBU_CMD_ARRAY_ADDRESS(
360 ctx
->plb_gp_stream
->va
+ ctx
->plb_index
* ctx
->plb_gp_size
,
361 fb
->block_w
* fb
->block_h
);
365 if (lima_fb_need_reload(ctx
))
366 lima_pack_reload_plbu_cmd(ctx
);
370 lima_is_scissor_zero(struct lima_context
*ctx
)
372 if (!ctx
->rasterizer
|| !ctx
->rasterizer
->base
.scissor
)
375 struct pipe_scissor_state
*scissor
= &ctx
->scissor
;
377 scissor
->minx
== scissor
->maxx
378 && scissor
->miny
== scissor
->maxy
;
382 hilbert_rotate(int n
, int *x
, int *y
, int rx
, int ry
)
398 hilbert_coords(int n
, int d
, int *x
, int *y
)
404 for (i
= 0; (1 << i
) < n
; i
++) {
409 hilbert_rotate(1 << i
, x
, y
, rx
, ry
);
419 lima_get_pp_stream_size(int num_pp
, int tiled_w
, int tiled_h
, uint32_t *off
)
421 /* carefully calculate each stream start address:
422 * 1. overflow: each stream size may be different due to
423 * fb->tiled_w * fb->tiled_h can't be divided by num_pp,
424 * extra size should be added to the preceeding stream
425 * 2. alignment: each stream address should be 0x20 aligned
427 int delta
= tiled_w
* tiled_h
/ num_pp
* 16 + 8;
428 int remain
= tiled_w
* tiled_h
% num_pp
;
431 for (int i
= 0; i
< num_pp
; i
++) {
439 offset
= align(offset
, 0x20);
446 inside_damage_region(int x
, int y
, struct lima_damage_region
*ds
)
448 if (!ds
|| !ds
->region
)
451 for (int i
= 0; i
< ds
->num_region
; i
++) {
452 struct pipe_scissor_state
*ss
= ds
->region
+ i
;
453 if (x
>= ss
->minx
&& x
< ss
->maxx
&&
454 y
>= ss
->miny
&& y
< ss
->maxy
)
462 lima_update_pp_stream(struct lima_context
*ctx
, int off_x
, int off_y
,
463 int tiled_w
, int tiled_h
)
465 struct lima_pp_stream_state
*ps
= &ctx
->pp_stream
;
466 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
467 struct lima_damage_region
*damage
= lima_ctx_get_damage(ctx
);
468 struct lima_screen
*screen
= lima_screen(ctx
->base
.screen
);
469 int i
, num_pp
= screen
->num_pp
;
471 /* use hilbert_coords to generates 1D to 2D relationship.
472 * 1D for pp stream index and 2D for plb block x/y on framebuffer.
473 * if multi pp, interleave the 1D index to make each pp's render target
474 * close enough which should result close workload
476 int max
= MAX2(tiled_w
, tiled_h
);
477 int dim
= util_logbase2_ceil(max
);
478 int count
= 1 << (dim
+ dim
);
483 for (i
= 0; i
< num_pp
; i
++)
484 stream
[i
] = ps
->bo
->map
+ ps
->bo_offset
+ ps
->offset
[i
];
486 for (i
= 0; i
< count
; i
++) {
488 hilbert_coords(max
, i
, &x
, &y
);
489 if (x
< tiled_w
&& y
< tiled_h
) {
493 if (!inside_damage_region(x
, y
, damage
))
496 int pp
= index
% num_pp
;
497 int offset
= ((y
>> fb
->shift_h
) * fb
->block_w
+
498 (x
>> fb
->shift_w
)) * LIMA_CTX_PLB_BLK_SIZE
;
499 int plb_va
= ctx
->plb
[ctx
->plb_index
]->va
+ offset
;
501 stream
[pp
][si
[pp
]++] = 0;
502 stream
[pp
][si
[pp
]++] = 0xB8000000 | x
| (y
<< 8);
503 stream
[pp
][si
[pp
]++] = 0xE0000002 | ((plb_va
>> 3) & ~0xE0000003);
504 stream
[pp
][si
[pp
]++] = 0xB0000000;
510 for (i
= 0; i
< num_pp
; i
++) {
511 stream
[i
][si
[i
]++] = 0;
512 stream
[i
][si
[i
]++] = 0xBC000000;
514 lima_dump_command_stream_print(
515 stream
[i
], si
[i
] * 4, false, "pp plb stream %d at va %x\n",
516 i
, ps
->bo
->va
+ ps
->bo_offset
+ ps
->offset
[i
]);
521 lima_update_damage_pp_stream(struct lima_context
*ctx
)
523 struct lima_damage_region
*ds
= lima_ctx_get_damage(ctx
);
524 struct pipe_scissor_state
*bound
= &ds
->bound
;
526 int tiled_w
= bound
->maxx
- bound
->minx
;
527 int tiled_h
= bound
->maxy
- bound
->miny
;
528 struct lima_screen
*screen
= lima_screen(ctx
->base
.screen
);
529 int size
= lima_get_pp_stream_size(
530 screen
->num_pp
, tiled_w
, tiled_h
, ctx
->pp_stream
.offset
);
534 struct pipe_resource
*pres
= NULL
;
535 u_upload_alloc(ctx
->uploader
, 0, size
, 0x40, &offset
, &pres
, &cpu
);
537 struct lima_resource
*res
= lima_resource(pres
);
538 ctx
->pp_stream
.bo
= res
->bo
;
539 ctx
->pp_stream
.bo_offset
= offset
;
541 lima_update_pp_stream(ctx
, bound
->minx
, bound
->miny
, tiled_w
, tiled_h
);
543 lima_submit_add_bo(ctx
->pp_submit
, res
->bo
, LIMA_SUBMIT_BO_READ
);
544 pipe_resource_reference(&pres
, NULL
);
548 lima_update_full_pp_stream(struct lima_context
*ctx
)
550 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
551 struct lima_ctx_plb_pp_stream_key key
= {
552 .plb_index
= ctx
->plb_index
,
553 .tiled_w
= fb
->tiled_w
,
554 .tiled_h
= fb
->tiled_h
,
557 struct hash_entry
*entry
=
558 _mesa_hash_table_search(ctx
->plb_pp_stream
, &key
);
559 struct lima_ctx_plb_pp_stream
*s
= entry
->data
;
562 ctx
->pp_stream
.bo
= s
->bo
;
563 ctx
->pp_stream
.bo_offset
= 0;
564 memcpy(ctx
->pp_stream
.offset
, s
->offset
, sizeof(s
->offset
));
567 struct lima_screen
*screen
= lima_screen(ctx
->base
.screen
);
568 int size
= lima_get_pp_stream_size(
569 screen
->num_pp
, fb
->tiled_w
, fb
->tiled_h
, s
->offset
);
570 s
->bo
= lima_bo_create(screen
, size
, 0);
573 ctx
->pp_stream
.bo
= s
->bo
;
574 ctx
->pp_stream
.bo_offset
= 0;
575 memcpy(ctx
->pp_stream
.offset
, s
->offset
, sizeof(s
->offset
));
577 lima_update_pp_stream(ctx
, 0, 0, fb
->tiled_w
, fb
->tiled_h
);
580 lima_submit_add_bo(ctx
->pp_submit
, s
->bo
, LIMA_SUBMIT_BO_READ
);
584 lima_update_submit_bo(struct lima_context
*ctx
)
586 if (lima_ctx_dirty(ctx
))
589 struct lima_screen
*screen
= lima_screen(ctx
->base
.screen
);
590 lima_submit_add_bo(ctx
->gp_submit
, ctx
->plb_gp_stream
, LIMA_SUBMIT_BO_READ
);
591 lima_submit_add_bo(ctx
->gp_submit
, ctx
->plb
[ctx
->plb_index
], LIMA_SUBMIT_BO_WRITE
);
592 lima_submit_add_bo(ctx
->gp_submit
, ctx
->gp_tile_heap
[ctx
->plb_index
], LIMA_SUBMIT_BO_WRITE
);
594 lima_dump_command_stream_print(
595 ctx
->plb_gp_stream
->map
+ ctx
->plb_index
* ctx
->plb_gp_size
,
596 ctx
->plb_gp_size
, false, "gp plb stream at va %x\n",
597 ctx
->plb_gp_stream
->va
+ ctx
->plb_index
* ctx
->plb_gp_size
);
599 struct lima_damage_region
*damage
= lima_ctx_get_damage(ctx
);
600 if (damage
&& damage
->region
)
601 lima_update_damage_pp_stream(ctx
);
602 else if (ctx
->plb_pp_stream
)
603 lima_update_full_pp_stream(ctx
);
605 ctx
->pp_stream
.bo
= NULL
;
607 if (ctx
->framebuffer
.base
.nr_cbufs
) {
608 struct lima_resource
*res
= lima_resource(ctx
->framebuffer
.base
.cbufs
[0]->texture
);
609 lima_submit_add_bo(ctx
->pp_submit
, res
->bo
, LIMA_SUBMIT_BO_WRITE
);
611 if (ctx
->framebuffer
.base
.zsbuf
) {
612 struct lima_resource
*res
= lima_resource(ctx
->framebuffer
.base
.zsbuf
->texture
);
613 lima_submit_add_bo(ctx
->pp_submit
, res
->bo
, LIMA_SUBMIT_BO_WRITE
);
615 lima_submit_add_bo(ctx
->pp_submit
, ctx
->plb
[ctx
->plb_index
], LIMA_SUBMIT_BO_READ
);
616 lima_submit_add_bo(ctx
->pp_submit
, ctx
->gp_tile_heap
[ctx
->plb_index
], LIMA_SUBMIT_BO_READ
);
617 lima_submit_add_bo(ctx
->pp_submit
, screen
->pp_buffer
, LIMA_SUBMIT_BO_READ
);
621 lima_clear(struct pipe_context
*pctx
, unsigned buffers
,
622 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
624 struct lima_context
*ctx
= lima_context(pctx
);
628 /* no need to reload if cleared */
629 if (ctx
->framebuffer
.base
.nr_cbufs
&& (buffers
& PIPE_CLEAR_COLOR0
)) {
630 struct lima_surface
*surf
= lima_surface(ctx
->framebuffer
.base
.cbufs
[0]);
631 surf
->reload
= false;
634 struct lima_context_clear
*clear
= &ctx
->clear
;
635 clear
->buffers
= buffers
;
637 if (buffers
& PIPE_CLEAR_COLOR0
) {
639 ((uint32_t)float_to_ubyte(color
->f
[3]) << 24) |
640 ((uint32_t)float_to_ubyte(color
->f
[2]) << 16) |
641 ((uint32_t)float_to_ubyte(color
->f
[1]) << 8) |
642 float_to_ubyte(color
->f
[0]);
645 ((uint64_t)float_to_ushort(color
->f
[3]) << 48) |
646 ((uint64_t)float_to_ushort(color
->f
[2]) << 32) |
647 ((uint64_t)float_to_ushort(color
->f
[1]) << 16) |
648 float_to_ushort(color
->f
[0]);
651 if (buffers
& PIPE_CLEAR_DEPTH
)
652 clear
->depth
= util_pack_z(PIPE_FORMAT_Z24X8_UNORM
, depth
);
654 if (buffers
& PIPE_CLEAR_STENCIL
)
655 clear
->stencil
= stencil
;
657 lima_update_submit_bo(ctx
);
659 lima_pack_head_plbu_cmd(ctx
);
661 ctx
->dirty
|= LIMA_CONTEXT_DIRTY_CLEAR
;
664 enum lima_attrib_type
{
665 LIMA_ATTRIB_FLOAT
= 0x000,
666 /* todo: find out what lives here. */
667 LIMA_ATTRIB_I16
= 0x004,
668 LIMA_ATTRIB_U16
= 0x005,
669 LIMA_ATTRIB_I8
= 0x006,
670 LIMA_ATTRIB_U8
= 0x007,
671 LIMA_ATTRIB_I8N
= 0x008,
672 LIMA_ATTRIB_U8N
= 0x009,
673 LIMA_ATTRIB_I16N
= 0x00A,
674 LIMA_ATTRIB_U16N
= 0x00B,
675 /* todo: where is the 32 int */
676 /* todo: find out what lives here. */
677 LIMA_ATTRIB_FIXED
= 0x101
680 static enum lima_attrib_type
681 lima_pipe_format_to_attrib_type(enum pipe_format format
)
683 const struct util_format_description
*desc
= util_format_description(format
);
684 int i
= util_format_get_first_non_void_channel(format
);
685 const struct util_format_channel_description
*c
= desc
->channel
+ i
;
688 case UTIL_FORMAT_TYPE_FLOAT
:
689 return LIMA_ATTRIB_FLOAT
;
690 case UTIL_FORMAT_TYPE_FIXED
:
691 return LIMA_ATTRIB_FIXED
;
692 case UTIL_FORMAT_TYPE_SIGNED
:
695 return LIMA_ATTRIB_I8N
;
697 return LIMA_ATTRIB_I8
;
699 else if (c
->size
== 16) {
701 return LIMA_ATTRIB_I16N
;
703 return LIMA_ATTRIB_I16
;
706 case UTIL_FORMAT_TYPE_UNSIGNED
:
709 return LIMA_ATTRIB_U8N
;
711 return LIMA_ATTRIB_U8
;
713 else if (c
->size
== 16) {
715 return LIMA_ATTRIB_U16N
;
717 return LIMA_ATTRIB_U16
;
722 return LIMA_ATTRIB_FLOAT
;
726 lima_pack_vs_cmd(struct lima_context
*ctx
, const struct pipe_draw_info
*info
)
730 if (!info
->index_size
) {
731 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1();
732 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2();
735 int uniform_size
= ctx
->vs
->uniform_pending_offset
+ ctx
->vs
->constant_size
+ 32;
736 VS_CMD_UNIFORMS_ADDRESS(
737 lima_ctx_buff_va(ctx
, lima_ctx_buff_gp_uniform
, LIMA_CTX_BUFF_SUBMIT_GP
),
738 align(uniform_size
, 16));
740 VS_CMD_SHADER_ADDRESS(ctx
->vs
->bo
->va
, ctx
->vs
->shader_size
);
741 VS_CMD_SHADER_INFO(ctx
->vs
->prefetch
, ctx
->vs
->shader_size
);
743 int num_outputs
= ctx
->vs
->num_outputs
;
744 int num_attributes
= ctx
->vertex_elements
->num_elements
;
745 VS_CMD_VARYING_ATTRIBUTE_COUNT(num_outputs
, MAX2(1, num_attributes
));
749 VS_CMD_ATTRIBUTES_ADDRESS(
750 lima_ctx_buff_va(ctx
, lima_ctx_buff_gp_attribute_info
, LIMA_CTX_BUFF_SUBMIT_GP
),
751 MAX2(1, num_attributes
));
753 VS_CMD_VARYINGS_ADDRESS(
754 lima_ctx_buff_va(ctx
, lima_ctx_buff_gp_varying_info
, LIMA_CTX_BUFF_SUBMIT_GP
),
757 unsigned num
= info
->index_size
? (ctx
->max_index
- ctx
->min_index
+ 1) : info
->count
;
758 VS_CMD_DRAW(num
, info
->index_size
);
762 VS_CMD_ARRAYS_SEMAPHORE_END(info
->index_size
);
768 lima_pack_plbu_cmd(struct lima_context
*ctx
, const struct pipe_draw_info
*info
)
770 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
771 struct lima_vs_shader_state
*vs
= ctx
->vs
;
773 lima_pack_head_plbu_cmd(ctx
);
775 /* If it's zero scissor, we skip adding all other commands */
776 if (lima_is_scissor_zero(ctx
))
781 PLBU_CMD_VIEWPORT_LEFT(fui(ctx
->viewport
.left
));
782 PLBU_CMD_VIEWPORT_RIGHT(fui(ctx
->viewport
.right
));
783 PLBU_CMD_VIEWPORT_BOTTOM(fui(ctx
->viewport
.bottom
));
784 PLBU_CMD_VIEWPORT_TOP(fui(ctx
->viewport
.top
));
786 if (!info
->index_size
)
787 PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN();
789 int cf
= ctx
->rasterizer
->base
.cull_face
;
790 int ccw
= ctx
->rasterizer
->base
.front_ccw
;
792 if (cf
!= PIPE_FACE_NONE
) {
793 if (cf
& PIPE_FACE_FRONT
)
794 cull
|= ccw
? 0x00040000 : 0x00020000;
795 if (cf
& PIPE_FACE_BACK
)
796 cull
|= ccw
? 0x00020000 : 0x00040000;
799 if (info
->mode
== PIPE_PRIM_POINTS
&& ctx
->vs
->point_size_idx
!= -1)
800 PLBU_CMD_PRIMITIVE_SETUP(0x0000, cull
, info
->index_size
);
801 else if (info
->mode
< PIPE_PRIM_TRIANGLES
)
802 PLBU_CMD_PRIMITIVE_SETUP(0x3000, cull
, info
->index_size
);
804 PLBU_CMD_PRIMITIVE_SETUP(0x2000, cull
, info
->index_size
);
806 uint32_t gl_position_va
=
807 lima_ctx_buff_va(ctx
, lima_ctx_buff_sh_gl_pos
,
808 LIMA_CTX_BUFF_SUBMIT_GP
| LIMA_CTX_BUFF_SUBMIT_PP
);
809 PLBU_CMD_RSW_VERTEX_ARRAY(
810 lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_plb_rsw
, LIMA_CTX_BUFF_SUBMIT_PP
),
814 * - we should set it only for the first draw that enabled the scissor and for
815 * latter draw only if scissor is dirty
817 if (ctx
->rasterizer
->base
.scissor
) {
818 struct pipe_scissor_state
*scissor
= &ctx
->scissor
;
819 PLBU_CMD_SCISSORS(scissor
->minx
, scissor
->maxx
, scissor
->miny
, scissor
->maxy
);
821 PLBU_CMD_SCISSORS(0, fb
->base
.width
, 0, fb
->base
.height
);
826 PLBU_CMD_DEPTH_RANGE_NEAR(fui(ctx
->viewport
.near
));
827 PLBU_CMD_DEPTH_RANGE_FAR(fui(ctx
->viewport
.far
));
829 if ((info
->mode
== PIPE_PRIM_POINTS
&& ctx
->vs
->point_size_idx
== -1) ||
830 ((info
->mode
>= PIPE_PRIM_LINES
) && (info
->mode
< PIPE_PRIM_TRIANGLES
)))
832 uint32_t v
= info
->mode
== PIPE_PRIM_POINTS
?
833 fui(ctx
->rasterizer
->base
.point_size
) : fui(ctx
->rasterizer
->base
.line_width
);
834 PLBU_CMD_LOW_PRIM_SIZE(v
);
837 if (info
->index_size
) {
838 PLBU_CMD_INDEXED_DEST(gl_position_va
);
839 if (vs
->point_size_idx
!= -1) {
840 uint32_t gl_point_size_va
=
841 lima_ctx_buff_va(ctx
, lima_ctx_buff_sh_gl_point_size
,
842 LIMA_CTX_BUFF_SUBMIT_GP
|
843 LIMA_CTX_BUFF_SUBMIT_PP
);
844 PLBU_CMD_INDEXED_PT_SIZE(gl_point_size_va
);
847 struct pipe_resource
*indexbuf
= NULL
;
848 unsigned index_offset
= 0;
849 struct lima_resource
*res
;
850 if (info
->has_user_indices
) {
851 util_upload_index_buffer(&ctx
->base
, info
, &indexbuf
, &index_offset
, 0x40);
852 res
= lima_resource(indexbuf
);
855 res
= lima_resource(info
->index
.resource
);
857 lima_submit_add_bo(ctx
->gp_submit
, res
->bo
, LIMA_SUBMIT_BO_READ
);
858 PLBU_CMD_INDICES(res
->bo
->va
+ info
->start
* info
->index_size
+ index_offset
);
861 pipe_resource_reference(&indexbuf
, NULL
);
864 /* can this make the attribute info static? */
865 PLBU_CMD_DRAW_ARRAYS(info
->mode
, info
->start
, info
->count
);
868 PLBU_CMD_ARRAYS_SEMAPHORE_END();
870 if (info
->index_size
)
871 PLBU_CMD_DRAW_ELEMENTS(info
->mode
, ctx
->min_index
, info
->count
);
877 lima_blend_func(enum pipe_blend_func pipe
)
882 case PIPE_BLEND_SUBTRACT
:
884 case PIPE_BLEND_REVERSE_SUBTRACT
:
895 lima_blend_factor(enum pipe_blendfactor pipe
)
898 case PIPE_BLENDFACTOR_ONE
:
900 case PIPE_BLENDFACTOR_SRC_COLOR
:
902 case PIPE_BLENDFACTOR_SRC_ALPHA
:
904 case PIPE_BLENDFACTOR_DST_ALPHA
:
906 case PIPE_BLENDFACTOR_DST_COLOR
:
908 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
:
910 case PIPE_BLENDFACTOR_CONST_COLOR
:
912 case PIPE_BLENDFACTOR_CONST_ALPHA
:
914 case PIPE_BLENDFACTOR_ZERO
:
916 case PIPE_BLENDFACTOR_INV_SRC_COLOR
:
918 case PIPE_BLENDFACTOR_INV_SRC_ALPHA
:
920 case PIPE_BLENDFACTOR_INV_DST_ALPHA
:
922 case PIPE_BLENDFACTOR_INV_DST_COLOR
:
924 case PIPE_BLENDFACTOR_INV_CONST_COLOR
:
926 case PIPE_BLENDFACTOR_INV_CONST_ALPHA
:
928 case PIPE_BLENDFACTOR_SRC1_COLOR
:
929 case PIPE_BLENDFACTOR_SRC1_ALPHA
:
930 case PIPE_BLENDFACTOR_INV_SRC1_COLOR
:
931 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA
:
932 return -1; /* not support */
938 lima_calculate_alpha_blend(enum pipe_blend_func rgb_func
, enum pipe_blend_func alpha_func
,
939 enum pipe_blendfactor rgb_src_factor
, enum pipe_blendfactor rgb_dst_factor
,
940 enum pipe_blendfactor alpha_src_factor
, enum pipe_blendfactor alpha_dst_factor
)
942 return lima_blend_func(rgb_func
) |
943 (lima_blend_func(alpha_func
) << 3) |
944 (lima_blend_factor(rgb_src_factor
) << 6) |
945 (lima_blend_factor(rgb_dst_factor
) << 11) |
946 ((lima_blend_factor(alpha_src_factor
) & 0xF) << 16) |
947 ((lima_blend_factor(alpha_dst_factor
) & 0xF) << 20) |
948 0x0C000000; /* need check if this GLESv1 glAlphaFunc */
953 lima_stencil_op(enum pipe_stencil_op pipe
)
956 case PIPE_STENCIL_OP_KEEP
:
958 case PIPE_STENCIL_OP_ZERO
:
960 case PIPE_STENCIL_OP_REPLACE
:
962 case PIPE_STENCIL_OP_INCR
:
964 case PIPE_STENCIL_OP_DECR
:
966 case PIPE_STENCIL_OP_INCR_WRAP
:
968 case PIPE_STENCIL_OP_DECR_WRAP
:
970 case PIPE_STENCIL_OP_INVERT
:
978 lima_calculate_depth_test(struct pipe_depth_state
*depth
, struct pipe_rasterizer_state
*rst
)
980 enum pipe_compare_func func
= (depth
->enabled
? depth
->func
: PIPE_FUNC_ALWAYS
);
982 int offset_scale
= 0;
984 //TODO: implement polygon offset
986 if (rst
->offset_scale
< -32)
988 else if (rst
->offset_scale
> 31)
991 offset_scale
= rst
->offset_scale
* 4;
993 if (offset_scale
< 0)
994 offset_scale
= 0x100 + offset_scale
;
997 return (depth
->enabled
&& depth
->writemask
) |
999 (offset_scale
<< 16) |
1000 0x30; /* find out what is this */
1004 lima_pack_render_state(struct lima_context
*ctx
, const struct pipe_draw_info
*info
)
1006 struct lima_render_state
*render
=
1007 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_pp_plb_rsw
,
1008 sizeof(*render
), true);
1010 /* do hw support RGBA independ blend?
1011 * PIPE_CAP_INDEP_BLEND_ENABLE
1013 * how to handle the no cbuf only zbuf case?
1015 struct pipe_rt_blend_state
*rt
= ctx
->blend
->base
.rt
;
1016 render
->blend_color_bg
= float_to_ubyte(ctx
->blend_color
.color
[2]) |
1017 (float_to_ubyte(ctx
->blend_color
.color
[1]) << 16);
1018 render
->blend_color_ra
= float_to_ubyte(ctx
->blend_color
.color
[0]) |
1019 (float_to_ubyte(ctx
->blend_color
.color
[3]) << 16);
1021 if (rt
->blend_enable
) {
1022 render
->alpha_blend
= lima_calculate_alpha_blend(rt
->rgb_func
, rt
->alpha_func
,
1023 rt
->rgb_src_factor
, rt
->rgb_dst_factor
,
1024 rt
->alpha_src_factor
, rt
->alpha_dst_factor
);
1028 * Special handling for blending disabled.
1029 * Binary driver is generating the same alpha_value,
1030 * as when we would just enable blending, without changing/setting any blend equation/params.
1031 * Normaly in this case mesa would set all rt fields (func/factor) to zero.
1033 render
->alpha_blend
= lima_calculate_alpha_blend(PIPE_BLEND_ADD
, PIPE_BLEND_ADD
,
1034 PIPE_BLENDFACTOR_ONE
, PIPE_BLENDFACTOR_ZERO
,
1035 PIPE_BLENDFACTOR_ONE
, PIPE_BLENDFACTOR_ZERO
);
1038 render
->alpha_blend
|= (rt
->colormask
& PIPE_MASK_RGBA
) << 28;
1040 struct pipe_rasterizer_state
*rst
= &ctx
->rasterizer
->base
;
1041 struct pipe_depth_state
*depth
= &ctx
->zsa
->base
.depth
;
1042 render
->depth_test
= lima_calculate_depth_test(depth
, rst
);
1044 /* overlap with plbu? any place can remove one? */
1045 render
->depth_range
= float_to_ushort(ctx
->viewport
.near
) |
1046 (float_to_ushort(ctx
->viewport
.far
) << 16);
1049 struct pipe_stencil_state
*stencil
= ctx
->zsa
->base
.stencil
;
1050 struct pipe_stencil_ref
*ref
= &ctx
->stencil_ref
;
1051 render
->stencil_front
= stencil
[0].func
|
1052 (lima_stencil_op(stencil
[0].fail_op
) << 3) |
1053 (lima_stencil_op(stencil
[0].zfail_op
) << 6) |
1054 (lima_stencil_op(stencil
[0].zpass_op
) << 9) |
1055 (ref
->ref_value
[0] << 16) |
1056 (stencil
[0].valuemask
<< 24);
1057 render
->stencil_back
= stencil
[1].func
|
1058 (lima_stencil_op(stencil
[1].fail_op
) << 3) |
1059 (lima_stencil_op(stencil
[1].zfail_op
) << 6) |
1060 (lima_stencil_op(stencil
[1].zpass_op
) << 9) |
1061 (ref
->ref_value
[1] << 16) |
1062 (stencil
[1].valuemask
<< 24);
1064 render
->stencil_front
= 0xff000007;
1065 render
->stencil_back
= 0xff000007;
1068 /* seems not correct? */
1069 //struct pipe_alpha_state *alpha = &ctx->zsa->base.alpha;
1070 render
->stencil_test
= 0;
1071 //(stencil->enabled ? 0xFF : 0x00) | (float_to_ubyte(alpha->ref_value) << 16)
1073 /* need more investigation */
1074 if (info
->mode
== PIPE_PRIM_POINTS
)
1075 render
->multi_sample
= 0x0000F007;
1076 else if (info
->mode
< PIPE_PRIM_TRIANGLES
)
1077 render
->multi_sample
= 0x0000F407;
1079 render
->multi_sample
= 0x0000F807;
1080 if (ctx
->framebuffer
.base
.samples
)
1081 render
->multi_sample
|= 0x68;
1083 render
->shader_address
=
1084 ctx
->fs
->bo
->va
| (((uint32_t *)ctx
->fs
->bo
->map
)[0] & 0x1F);
1086 /* seems not needed */
1087 render
->uniforms_address
= 0x00000000;
1089 render
->textures_address
= 0x00000000;
1091 /* more investigation */
1092 render
->aux0
= 0x00000300 | (ctx
->vs
->varying_stride
>> 3);
1093 render
->aux1
= 0x00001000;
1094 if (ctx
->blend
->base
.dither
)
1095 render
->aux1
|= 0x00002000;
1097 if (ctx
->tex_stateobj
.num_samplers
) {
1098 render
->textures_address
=
1099 lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_tex_desc
, LIMA_CTX_BUFF_SUBMIT_PP
);
1100 render
->aux0
|= ctx
->tex_stateobj
.num_samplers
<< 14;
1101 render
->aux0
|= 0x20;
1104 if (ctx
->const_buffer
[PIPE_SHADER_FRAGMENT
].buffer
) {
1105 render
->uniforms_address
=
1106 lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_uniform_array
, LIMA_CTX_BUFF_SUBMIT_PP
);
1107 uint32_t size
= ctx
->buffer_state
[lima_ctx_buff_pp_uniform
].size
;
1110 bits
= util_last_bit(size
>> 3) - 1;
1111 bits
+= size
& u_bit_consecutive(0, bits
+ 3) ? 1 : 0;
1113 render
->uniforms_address
|= bits
> 0xf ? 0xf : bits
;
1115 render
->aux0
|= 0x80;
1116 render
->aux1
|= 0x10000;
1119 if (ctx
->vs
->num_varyings
) {
1120 render
->varying_types
= 0x00000000;
1121 render
->varyings_address
= ctx
->sh_varying
->va
;
1122 lima_submit_add_bo(ctx
->pp_submit
, ctx
->sh_varying
, LIMA_SUBMIT_BO_READ
);
1123 for (int i
= 0, index
= 0; i
< ctx
->vs
->num_outputs
; i
++) {
1126 if (i
== ctx
->vs
->gl_pos_idx
||
1127 i
== ctx
->vs
->point_size_idx
)
1130 struct lima_varying_info
*v
= ctx
->vs
->varying
+ i
;
1131 if (v
->component_size
== 4)
1132 val
= v
->components
> 2 ? 0 : 1;
1134 val
= v
->components
> 2 ? 2 : 3;
1137 render
->varying_types
|= val
<< (3 * index
);
1138 else if (index
== 10) {
1139 render
->varying_types
|= val
<< 30;
1140 render
->varyings_address
|= val
>> 2;
1142 else if (index
== 11)
1143 render
->varyings_address
|= val
<< 1;
1149 render
->varying_types
= 0x00000000;
1150 render
->varyings_address
= 0x00000000;
1153 lima_dump_command_stream_print(
1154 render
, sizeof(*render
), false, "add render state at va %x\n",
1155 lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_plb_rsw
, 0));
1157 lima_dump_rsw_command_stream_print(render
, sizeof(*render
),
1158 lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_plb_rsw
, 0));
1163 lima_update_gp_attribute_info(struct lima_context
*ctx
, const struct pipe_draw_info
*info
)
1165 struct lima_vertex_element_state
*ve
= ctx
->vertex_elements
;
1166 struct lima_context_vertex_buffer
*vb
= &ctx
->vertex_buffers
;
1168 uint32_t *attribute
=
1169 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_gp_attribute_info
,
1170 MAX2(1, ve
->num_elements
) * 8, true);
1173 for (int i
= 0; i
< ve
->num_elements
; i
++) {
1174 struct pipe_vertex_element
*pve
= ve
->pipe
+ i
;
1176 assert(pve
->vertex_buffer_index
< vb
->count
);
1177 assert(vb
->enabled_mask
& (1 << pve
->vertex_buffer_index
));
1179 struct pipe_vertex_buffer
*pvb
= vb
->vb
+ pve
->vertex_buffer_index
;
1180 struct lima_resource
*res
= lima_resource(pvb
->buffer
.resource
);
1182 lima_submit_add_bo(ctx
->gp_submit
, res
->bo
, LIMA_SUBMIT_BO_READ
);
1184 unsigned start
= info
->index_size
? (ctx
->min_index
+ info
->index_bias
) : info
->start
;
1185 attribute
[n
++] = res
->bo
->va
+ pvb
->buffer_offset
+ pve
->src_offset
1186 + start
* pvb
->stride
;
1187 attribute
[n
++] = (pvb
->stride
<< 11) |
1188 (lima_pipe_format_to_attrib_type(pve
->src_format
) << 2) |
1189 (util_format_get_nr_components(pve
->src_format
) - 1);
1192 lima_dump_command_stream_print(
1193 attribute
, n
* 4, false, "update attribute info at va %x\n",
1194 lima_ctx_buff_va(ctx
, lima_ctx_buff_gp_attribute_info
, 0));
1198 lima_update_gp_uniform(struct lima_context
*ctx
)
1200 struct lima_context_constant_buffer
*ccb
=
1201 ctx
->const_buffer
+ PIPE_SHADER_VERTEX
;
1202 struct lima_vs_shader_state
*vs
= ctx
->vs
;
1204 int size
= vs
->uniform_pending_offset
+ vs
->constant_size
+ 32;
1205 void *vs_const_buff
=
1206 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_gp_uniform
, size
, true);
1209 memcpy(vs_const_buff
, ccb
->buffer
, ccb
->size
);
1211 memcpy(vs_const_buff
+ vs
->uniform_pending_offset
,
1212 ctx
->viewport
.transform
.scale
,
1213 sizeof(ctx
->viewport
.transform
.scale
));
1214 memcpy(vs_const_buff
+ vs
->uniform_pending_offset
+ 16,
1215 ctx
->viewport
.transform
.translate
,
1216 sizeof(ctx
->viewport
.transform
.translate
));
1219 memcpy(vs_const_buff
+ vs
->uniform_pending_offset
+ 32,
1220 vs
->constant
, vs
->constant_size
);
1222 lima_dump_command_stream_print(
1223 vs_const_buff
, size
, true,
1224 "update gp uniform at va %x\n",
1225 lima_ctx_buff_va(ctx
, lima_ctx_buff_gp_uniform
, 0));
1229 lima_update_pp_uniform(struct lima_context
*ctx
)
1231 const float *const_buff
= ctx
->const_buffer
[PIPE_SHADER_FRAGMENT
].buffer
;
1232 size_t const_buff_size
= ctx
->const_buffer
[PIPE_SHADER_FRAGMENT
].size
/ sizeof(float);
1237 uint16_t *fp16_const_buff
=
1238 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_pp_uniform
,
1239 const_buff_size
* sizeof(uint16_t), true);
1242 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_pp_uniform_array
, 4, true);
1244 for (int i
= 0; i
< const_buff_size
; i
++)
1245 fp16_const_buff
[i
] = util_float_to_half(const_buff
[i
]);
1247 *array
= lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_uniform
, LIMA_CTX_BUFF_SUBMIT_PP
);
1249 lima_dump_command_stream_print(
1250 fp16_const_buff
, const_buff_size
* 2, false, "add pp uniform data at va %x\n",
1251 lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_uniform
, 0));
1252 lima_dump_command_stream_print(
1253 array
, 4, false, "add pp uniform info at va %x\n",
1254 lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_uniform_array
, 0));
1258 lima_update_varying(struct lima_context
*ctx
, const struct pipe_draw_info
*info
)
1260 struct lima_screen
*screen
= lima_screen(ctx
->base
.screen
);
1261 struct lima_vs_shader_state
*vs
= ctx
->vs
;
1264 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_gp_varying_info
,
1265 vs
->num_outputs
* 8, true);
1268 /* should be LIMA_SUBMIT_BO_WRITE for GP, but each draw will use
1269 * different part of this bo, so no need to set exclusive constraint */
1270 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_sh_gl_pos
,
1271 4 * 4 * info
->count
, false);
1275 for (int i
= 0; i
< vs
->num_outputs
; i
++) {
1276 struct lima_varying_info
*v
= vs
->varying
+ i
;
1278 if (i
== vs
->gl_pos_idx
||
1279 i
== vs
->point_size_idx
)
1282 int size
= v
->component_size
* 4;
1284 /* does component_size == 2 need to be 16 aligned? */
1285 if (v
->component_size
== 4)
1286 offset
= align(offset
, 16);
1292 vs
->varying_stride
= align(offset
, 16);
1294 if (vs
->num_varyings
) {
1295 /* sh_varying can be too large for the suballocators, so create a
1296 * separate bo for it. The bo cache should prevent a performance hit. */
1297 ctx
->sh_varying
= lima_bo_create(screen
,
1298 vs
->varying_stride
* info
->count
, 0);
1299 assert(ctx
->sh_varying
);
1300 lima_submit_add_bo(ctx
->gp_submit
, ctx
->sh_varying
, LIMA_SUBMIT_BO_WRITE
);
1303 for (int i
= 0; i
< vs
->num_outputs
; i
++) {
1304 struct lima_varying_info
*v
= vs
->varying
+ i
;
1306 if (i
== vs
->gl_pos_idx
) {
1309 lima_ctx_buff_va(ctx
, lima_ctx_buff_sh_gl_pos
,
1310 LIMA_CTX_BUFF_SUBMIT_GP
| LIMA_CTX_BUFF_SUBMIT_PP
);
1311 varying
[n
++] = 0x8020;
1312 } else if (i
== vs
->point_size_idx
) {
1314 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_sh_gl_point_size
,
1315 4 * info
->count
, false);
1317 lima_ctx_buff_va(ctx
, lima_ctx_buff_sh_gl_point_size
,
1318 LIMA_CTX_BUFF_SUBMIT_GP
| LIMA_CTX_BUFF_SUBMIT_PP
);
1319 varying
[n
++] = 0x2021;
1322 varying
[n
++] = ctx
->sh_varying
->va
+ v
->offset
;
1323 varying
[n
++] = (vs
->varying_stride
<< 11) | (v
->components
- 1) |
1324 (v
->component_size
== 2 ? 0x0C : 0);
1328 lima_dump_command_stream_print(
1329 varying
, n
* 4, false, "update varying info at va %x\n",
1330 lima_ctx_buff_va(ctx
, lima_ctx_buff_gp_varying_info
, 0));
1334 lima_draw_vbo(struct pipe_context
*pctx
, const struct pipe_draw_info
*info
)
1336 /* check if draw mode and vertex/index count match,
1337 * otherwise gp will hang */
1338 if (!u_trim_pipe_prim(info
->mode
, (unsigned*)&info
->count
)) {
1339 debug_printf("draw mode and vertex/index count mismatch\n");
1343 struct lima_context
*ctx
= lima_context(pctx
);
1345 if (!ctx
->vs
|| !ctx
->fs
) {
1346 debug_warn_once("no shader, skip draw\n");
1350 if (!lima_update_vs_state(ctx
) || !lima_update_fs_state(ctx
))
1353 lima_dump_command_stream_print(
1354 ctx
->vs
->bo
->map
, ctx
->vs
->shader_size
, false,
1355 "add vs at va %x\n", ctx
->vs
->bo
->va
);
1357 lima_dump_command_stream_print(
1358 ctx
->fs
->bo
->map
, ctx
->fs
->shader_size
, false,
1359 "add fs at va %x\n", ctx
->fs
->bo
->va
);
1361 lima_submit_add_bo(ctx
->gp_submit
, ctx
->vs
->bo
, LIMA_SUBMIT_BO_READ
);
1362 lima_submit_add_bo(ctx
->pp_submit
, ctx
->fs
->bo
, LIMA_SUBMIT_BO_READ
);
1364 lima_update_submit_bo(ctx
);
1366 /* Mali Utgard GPU always need min/max index info for index draw,
1367 * compute it if upper layer does not do for us */
1368 if (info
->index_size
&& info
->max_index
== ~0u)
1369 u_vbuf_get_minmax_index(pctx
, info
, &ctx
->min_index
, &ctx
->max_index
);
1371 ctx
->min_index
= info
->min_index
;
1372 ctx
->max_index
= info
->max_index
;
1375 lima_update_gp_attribute_info(ctx
, info
);
1377 if ((ctx
->dirty
& LIMA_CONTEXT_DIRTY_CONST_BUFF
&&
1378 ctx
->const_buffer
[PIPE_SHADER_VERTEX
].dirty
) ||
1379 ctx
->dirty
& LIMA_CONTEXT_DIRTY_VIEWPORT
||
1380 ctx
->dirty
& LIMA_CONTEXT_DIRTY_SHADER_VERT
) {
1381 lima_update_gp_uniform(ctx
);
1382 ctx
->const_buffer
[PIPE_SHADER_VERTEX
].dirty
= false;
1385 lima_update_varying(ctx
, info
);
1387 /* If it's zero scissor, don't build vs cmd list */
1388 if (!lima_is_scissor_zero(ctx
))
1389 lima_pack_vs_cmd(ctx
, info
);
1391 if (ctx
->dirty
& LIMA_CONTEXT_DIRTY_CONST_BUFF
&&
1392 ctx
->const_buffer
[PIPE_SHADER_FRAGMENT
].dirty
) {
1393 lima_update_pp_uniform(ctx
);
1394 ctx
->const_buffer
[PIPE_SHADER_FRAGMENT
].dirty
= false;
1397 if (ctx
->dirty
& LIMA_CONTEXT_DIRTY_TEXTURES
)
1398 lima_update_textures(ctx
);
1400 lima_pack_render_state(ctx
, info
);
1401 lima_pack_plbu_cmd(ctx
, info
);
1403 if (ctx
->sh_varying
) {
1404 lima_bo_unreference(ctx
->sh_varying
); /* held by submit */
1405 ctx
->sh_varying
= NULL
;
1412 lima_finish_plbu_cmd(struct lima_context
*ctx
)
1415 uint32_t *plbu_cmd
= util_dynarray_ensure_cap(&ctx
->plbu_cmd_array
, ctx
->plbu_cmd_array
.size
+ 2 * 4);
1417 plbu_cmd
[i
++] = 0x00000000;
1418 plbu_cmd
[i
++] = 0x50000000; /* END */
1420 ctx
->plbu_cmd_array
.size
+= i
* 4;
1424 lima_pack_wb_zsbuf_reg(struct lima_context
*ctx
, uint32_t *wb_reg
, int wb_idx
)
1426 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
1427 struct lima_resource
*res
= lima_resource(fb
->base
.zsbuf
->texture
);
1428 int level
= fb
->base
.zsbuf
->u
.tex
.level
;
1429 uint32_t format
= lima_format_get_pixel(fb
->base
.zsbuf
->format
);
1431 struct lima_pp_wb_reg
*wb
= (void *)wb_reg
;
1432 wb
[wb_idx
].type
= 0x01; /* 1 for depth, stencil */
1433 wb
[wb_idx
].address
= res
->bo
->va
+ res
->levels
[level
].offset
;
1434 wb
[wb_idx
].pixel_format
= format
;
1436 wb
[wb_idx
].pixel_layout
= 0x2;
1437 wb
[wb_idx
].pitch
= fb
->tiled_w
;
1439 wb
[wb_idx
].pixel_layout
= 0x0;
1440 wb
[wb_idx
].pitch
= res
->levels
[level
].stride
/ 8;
1442 wb
[wb_idx
].mrt_bits
= 0;
1446 lima_pack_wb_cbuf_reg(struct lima_context
*ctx
, uint32_t *wb_reg
, int wb_idx
)
1448 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
1449 struct lima_resource
*res
= lima_resource(fb
->base
.cbufs
[0]->texture
);
1450 int level
= fb
->base
.cbufs
[0]->u
.tex
.level
;
1451 unsigned layer
= fb
->base
.cbufs
[0]->u
.tex
.first_layer
;
1452 uint32_t format
= lima_format_get_pixel(fb
->base
.cbufs
[0]->format
);
1453 bool swap_channels
= lima_format_get_swap_rb(fb
->base
.cbufs
[0]->format
);
1455 struct lima_pp_wb_reg
*wb
= (void *)wb_reg
;
1456 wb
[wb_idx
].type
= 0x02; /* 2 for color buffer */
1457 wb
[wb_idx
].address
= res
->bo
->va
+ res
->levels
[level
].offset
+ layer
* res
->levels
[level
].layer_stride
;
1458 wb
[wb_idx
].pixel_format
= format
;
1460 wb
[wb_idx
].pixel_layout
= 0x2;
1461 wb
[wb_idx
].pitch
= fb
->tiled_w
;
1463 wb
[wb_idx
].pixel_layout
= 0x0;
1464 wb
[wb_idx
].pitch
= res
->levels
[level
].stride
/ 8;
1466 wb
[wb_idx
].mrt_bits
= swap_channels
? 0x4 : 0x0;
1471 lima_pack_pp_frame_reg(struct lima_context
*ctx
, uint32_t *frame_reg
,
1474 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
1475 struct lima_pp_frame_reg
*frame
= (void *)frame_reg
;
1476 struct lima_screen
*screen
= lima_screen(ctx
->base
.screen
);
1479 frame
->render_address
= screen
->pp_buffer
->va
+ pp_frame_rsw_offset
;
1480 frame
->flags
= 0x02;
1481 frame
->clear_value_depth
= ctx
->clear
.depth
;
1482 frame
->clear_value_stencil
= ctx
->clear
.stencil
;
1483 frame
->clear_value_color
= ctx
->clear
.color_8pc
;
1484 frame
->clear_value_color_1
= ctx
->clear
.color_8pc
;
1485 frame
->clear_value_color_2
= ctx
->clear
.color_8pc
;
1486 frame
->clear_value_color_3
= ctx
->clear
.color_8pc
;
1489 frame
->width
= fb
->base
.width
- 1;
1490 frame
->height
= fb
->base
.height
- 1;
1492 /* frame->fragment_stack_address is overwritten per-pp in the kernel
1493 * by the values of pp_frame.fragment_stack_address[i] */
1495 /* These are "stack size" and "stack offset" shifted,
1496 * here they are assumed to be always the same. */
1497 frame
->fragment_stack_size
= ctx
->pp_max_stack_size
<< 16 | ctx
->pp_max_stack_size
;
1499 /* related with MSAA and different value when r4p0/r7p0 */
1500 frame
->supersampled_height
= fb
->base
.height
* 2 - 1;
1501 frame
->scale
= 0xE0C;
1503 frame
->dubya
= 0x77;
1504 frame
->onscreen
= 1;
1505 frame
->blocking
= (fb
->shift_min
<< 28) | (fb
->shift_h
<< 16) | fb
->shift_w
;
1506 frame
->foureight
= 0x8888;
1508 if (fb
->base
.nr_cbufs
)
1509 lima_pack_wb_cbuf_reg(ctx
, wb_reg
, wb_idx
++);
1511 /* Mali4x0 can use on-tile buffer for depth/stencil, so to save some
1512 * memory bandwidth don't write depth/stencil back to memory if we're
1513 * rendering to scanout
1515 if (!lima_is_scanout(ctx
) && fb
->base
.zsbuf
)
1516 lima_pack_wb_zsbuf_reg(ctx
, wb_reg
, wb_idx
++);
1520 _lima_flush(struct lima_context
*ctx
, bool end_of_frame
)
1522 #define pp_stack_pp_size 0x400
1524 lima_finish_plbu_cmd(ctx
);
1526 int vs_cmd_size
= ctx
->vs_cmd_array
.size
;
1527 int plbu_cmd_size
= ctx
->plbu_cmd_array
.size
;
1528 uint32_t vs_cmd_va
= 0;
1529 uint32_t plbu_cmd_va
;
1533 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_gp_vs_cmd
, vs_cmd_size
, true);
1534 memcpy(vs_cmd
, util_dynarray_begin(&ctx
->vs_cmd_array
), vs_cmd_size
);
1535 util_dynarray_clear(&ctx
->vs_cmd_array
);
1536 vs_cmd_va
= lima_ctx_buff_va(ctx
, lima_ctx_buff_gp_vs_cmd
,
1537 LIMA_CTX_BUFF_SUBMIT_GP
);
1539 lima_dump_command_stream_print(
1540 vs_cmd
, vs_cmd_size
, false, "flush vs cmd at va %x\n", vs_cmd_va
);
1541 lima_dump_vs_command_stream_print(vs_cmd
, vs_cmd_size
, vs_cmd_va
);
1545 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_gp_plbu_cmd
, plbu_cmd_size
, true);
1546 memcpy(plbu_cmd
, util_dynarray_begin(&ctx
->plbu_cmd_array
), plbu_cmd_size
);
1547 util_dynarray_clear(&ctx
->plbu_cmd_array
);
1548 plbu_cmd_va
= lima_ctx_buff_va(ctx
, lima_ctx_buff_gp_plbu_cmd
,
1549 LIMA_CTX_BUFF_SUBMIT_GP
);
1551 lima_dump_command_stream_print(
1552 plbu_cmd
, plbu_cmd_size
, false, "flush plbu cmd at va %x\n", plbu_cmd_va
);
1553 lima_dump_plbu_command_stream_print(plbu_cmd
, plbu_cmd_size
, plbu_cmd_va
);
1555 struct lima_screen
*screen
= lima_screen(ctx
->base
.screen
);
1556 struct drm_lima_gp_frame gp_frame
;
1557 struct lima_gp_frame_reg
*gp_frame_reg
= (void *)gp_frame
.frame
;
1558 gp_frame_reg
->vs_cmd_start
= vs_cmd_va
;
1559 gp_frame_reg
->vs_cmd_end
= vs_cmd_va
+ vs_cmd_size
;
1560 gp_frame_reg
->plbu_cmd_start
= plbu_cmd_va
;
1561 gp_frame_reg
->plbu_cmd_end
= plbu_cmd_va
+ plbu_cmd_size
;
1562 gp_frame_reg
->tile_heap_start
= ctx
->gp_tile_heap
[ctx
->plb_index
]->va
;
1563 gp_frame_reg
->tile_heap_end
= ctx
->gp_tile_heap
[ctx
->plb_index
]->va
+ gp_tile_heap_size
;
1565 lima_dump_command_stream_print(
1566 &gp_frame
, sizeof(gp_frame
), false, "add gp frame\n");
1568 if (!lima_submit_start(ctx
->gp_submit
, &gp_frame
, sizeof(gp_frame
)))
1569 fprintf(stderr
, "gp submit error\n");
1571 if (lima_dump_command_stream
) {
1572 if (lima_submit_wait(ctx
->gp_submit
, PIPE_TIMEOUT_INFINITE
)) {
1573 if (ctx
->buffer_state
[lima_ctx_buff_sh_gl_pos
].res
) {
1574 float *pos
= lima_ctx_buff_map(ctx
, lima_ctx_buff_sh_gl_pos
);
1575 lima_dump_command_stream_print(
1576 pos
, 4 * 4 * 16, true, "gl_pos dump at va %x\n",
1577 lima_ctx_buff_va(ctx
, lima_ctx_buff_sh_gl_pos
, 0));
1580 uint32_t *plb
= lima_bo_map(ctx
->plb
[ctx
->plb_index
]);
1581 lima_dump_command_stream_print(
1582 plb
, LIMA_CTX_PLB_BLK_SIZE
, false, "plb dump at va %x\n",
1583 ctx
->plb
[ctx
->plb_index
]->va
);
1586 fprintf(stderr
, "gp submit wait error\n");
1591 uint32_t pp_stack_va
= 0;
1592 if (ctx
->pp_max_stack_size
) {
1593 lima_ctx_buff_alloc(ctx
, lima_ctx_buff_pp_stack
, screen
->num_pp
*
1594 ctx
->pp_max_stack_size
* pp_stack_pp_size
, true);
1595 pp_stack_va
= lima_ctx_buff_va(ctx
, lima_ctx_buff_pp_stack
,
1596 LIMA_CTX_BUFF_SUBMIT_PP
);
1599 struct lima_pp_stream_state
*ps
= &ctx
->pp_stream
;
1600 if (screen
->gpu_type
== DRM_LIMA_PARAM_GPU_ID_MALI400
) {
1601 struct drm_lima_m400_pp_frame pp_frame
= {0};
1602 lima_pack_pp_frame_reg(ctx
, pp_frame
.frame
, pp_frame
.wb
);
1603 pp_frame
.num_pp
= screen
->num_pp
;
1605 for (int i
= 0; i
< screen
->num_pp
; i
++) {
1606 pp_frame
.plbu_array_address
[i
] = ps
->bo
->va
+ ps
->bo_offset
+ ps
->offset
[i
];
1607 if (ctx
->pp_max_stack_size
)
1608 pp_frame
.fragment_stack_address
[i
] = pp_stack_va
+
1609 ctx
->pp_max_stack_size
* pp_stack_pp_size
* i
;
1612 lima_dump_command_stream_print(
1613 &pp_frame
, sizeof(pp_frame
), false, "add pp frame\n");
1615 if (!lima_submit_start(ctx
->pp_submit
, &pp_frame
, sizeof(pp_frame
)))
1616 fprintf(stderr
, "pp submit error\n");
1619 struct drm_lima_m450_pp_frame pp_frame
= {0};
1620 lima_pack_pp_frame_reg(ctx
, pp_frame
.frame
, pp_frame
.wb
);
1621 pp_frame
.num_pp
= screen
->num_pp
;
1623 if (ctx
->pp_max_stack_size
)
1624 for (int i
= 0; i
< screen
->num_pp
; i
++)
1625 pp_frame
.fragment_stack_address
[i
] = pp_stack_va
+
1626 ctx
->pp_max_stack_size
* pp_stack_pp_size
* i
;
1629 for (int i
= 0; i
< screen
->num_pp
; i
++)
1630 pp_frame
.plbu_array_address
[i
] = ps
->bo
->va
+ ps
->bo_offset
+ ps
->offset
[i
];
1633 pp_frame
.use_dlbu
= true;
1635 struct lima_context_framebuffer
*fb
= &ctx
->framebuffer
;
1636 pp_frame
.dlbu_regs
[0] = ctx
->plb
[ctx
->plb_index
]->va
;
1637 pp_frame
.dlbu_regs
[1] = ((fb
->tiled_h
- 1) << 16) | (fb
->tiled_w
- 1);
1638 unsigned s
= util_logbase2(LIMA_CTX_PLB_BLK_SIZE
) - 7;
1639 pp_frame
.dlbu_regs
[2] = (s
<< 28) | (fb
->shift_h
<< 16) | fb
->shift_w
;
1640 pp_frame
.dlbu_regs
[3] = ((fb
->tiled_h
- 1) << 24) | ((fb
->tiled_w
- 1) << 16);
1643 lima_dump_command_stream_print(
1644 &pp_frame
, sizeof(pp_frame
), false, "add pp frame\n");
1646 if (!lima_submit_start(ctx
->pp_submit
, &pp_frame
, sizeof(pp_frame
)))
1647 fprintf(stderr
, "pp submit error\n");
1650 if (lima_dump_command_stream
) {
1651 if (!lima_submit_wait(ctx
->pp_submit
, PIPE_TIMEOUT_INFINITE
)) {
1652 fprintf(stderr
, "pp wait error\n");
1657 ctx
->plb_index
= (ctx
->plb_index
+ 1) % lima_ctx_num_plb
;
1659 if (ctx
->framebuffer
.base
.nr_cbufs
) {
1660 /* Set reload flag for next draw. It'll be unset if buffer is cleared */
1661 struct lima_surface
*surf
= lima_surface(ctx
->framebuffer
.base
.cbufs
[0]);
1662 surf
->reload
= true;
1665 ctx
->pp_max_stack_size
= 0;
1669 lima_flush(struct lima_context
*ctx
)
1671 if (!lima_ctx_dirty(ctx
))
1674 _lima_flush(ctx
, false);
1678 lima_pipe_flush(struct pipe_context
*pctx
, struct pipe_fence_handle
**fence
,
1681 struct lima_context
*ctx
= lima_context(pctx
);
1682 if (lima_ctx_dirty(ctx
))
1683 _lima_flush(ctx
, flags
& PIPE_FLUSH_END_OF_FRAME
);
1687 if (lima_submit_get_out_sync(ctx
->pp_submit
, &fd
))
1688 *fence
= lima_fence_create(fd
);
1693 lima_draw_init(struct lima_context
*ctx
)
1695 ctx
->base
.clear
= lima_clear
;
1696 ctx
->base
.draw_vbo
= lima_draw_vbo
;
1697 ctx
->base
.flush
= lima_pipe_flush
;