lima: put hardware related info to lima_gpu.h
[mesa.git] / src / gallium / drivers / lima / lima_draw.c
1 /*
2 * Copyright (c) 2011-2013 Luc Verhaegen <libv@skynet.be>
3 * Copyright (c) 2017-2019 Lima Project
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include "util/u_math.h"
27 #include "util/format/u_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_half.h"
30 #include "util/u_helpers.h"
31 #include "util/u_inlines.h"
32 #include "util/u_pack_color.h"
33 #include "util/hash_table.h"
34 #include "util/u_split_draw.h"
35 #include "util/u_upload_mgr.h"
36 #include "util/u_prim.h"
37 #include "util/u_vbuf.h"
38
39 #include "lima_context.h"
40 #include "lima_screen.h"
41 #include "lima_resource.h"
42 #include "lima_program.h"
43 #include "lima_bo.h"
44 #include "lima_submit.h"
45 #include "lima_texture.h"
46 #include "lima_util.h"
47 #include "lima_fence.h"
48 #include "lima_format.h"
49 #include "lima_gpu.h"
50
51 #include <xf86drm.h>
52 #include <drm-uapi/lima_drm.h>
53
54 static inline bool
55 lima_ctx_dirty(struct lima_context *ctx)
56 {
57 return !!ctx->resolve;
58 }
59
60 static inline struct lima_damage_region *
61 lima_ctx_get_damage(struct lima_context *ctx)
62 {
63 if (!(ctx->framebuffer.base.nr_cbufs && (ctx->resolve & PIPE_CLEAR_COLOR0)))
64 return NULL;
65
66 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
67 struct lima_resource *res = lima_resource(surf->base.texture);
68 return &res->damage;
69 }
70
71 static bool
72 lima_fb_need_reload(struct lima_context *ctx)
73 {
74 /* Depth buffer is always discarded */
75 if (!(ctx->framebuffer.base.nr_cbufs && (ctx->resolve & PIPE_CLEAR_COLOR0)))
76 return false;
77
78 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
79 struct lima_resource *res = lima_resource(surf->base.texture);
80 if (res->damage.region) {
81 /* for EGL_KHR_partial_update, when EGL_EXT_buffer_age is enabled,
82 * we need to reload damage region, otherwise just want to reload
83 * the region not aligned to tile boundary */
84 //if (!res->damage.aligned)
85 // return true;
86 return true;
87 }
88 else if (surf->reload)
89 return true;
90
91 return false;
92 }
93
94 static void
95 lima_pack_reload_plbu_cmd(struct lima_context *ctx)
96 {
97 #define lima_reload_render_state_offset 0x0000
98 #define lima_reload_gl_pos_offset 0x0040
99 #define lima_reload_varying_offset 0x0080
100 #define lima_reload_tex_desc_offset 0x00c0
101 #define lima_reload_tex_array_offset 0x0100
102 #define lima_reload_buffer_size 0x0140
103
104 void *cpu;
105 unsigned offset;
106 struct pipe_resource *pres = NULL;
107 u_upload_alloc(ctx->uploader, 0, lima_reload_buffer_size,
108 0x40, &offset, &pres, &cpu);
109
110 struct lima_resource *res = lima_resource(pres);
111 uint32_t va = res->bo->va + offset;
112
113 struct lima_screen *screen = lima_screen(ctx->base.screen);
114
115 uint32_t reload_shader_first_instr_size =
116 ((uint32_t *)(screen->pp_buffer->map + pp_reload_program_offset))[0] & 0x1f;
117 uint32_t reload_shader_va = screen->pp_buffer->va + pp_reload_program_offset;
118
119 struct lima_render_state reload_render_state = {
120 .alpha_blend = 0xf03b1ad2,
121 .depth_test = 0x0000000e,
122 .depth_range = 0xffff0000,
123 .stencil_front = 0x00000007,
124 .stencil_back = 0x00000007,
125 .multi_sample = 0x0000f007,
126 .shader_address = reload_shader_va | reload_shader_first_instr_size,
127 .varying_types = 0x00000001,
128 .textures_address = va + lima_reload_tex_array_offset,
129 .aux0 = 0x00004021,
130 .varyings_address = va + lima_reload_varying_offset,
131 };
132 memcpy(cpu + lima_reload_render_state_offset, &reload_render_state,
133 sizeof(reload_render_state));
134
135 struct lima_context_framebuffer *fb = &ctx->framebuffer;
136 lima_tex_desc *td = cpu + lima_reload_tex_desc_offset;
137 memset(td, 0, lima_min_tex_desc_size);
138 lima_texture_desc_set_res(ctx, td, fb->base.cbufs[0]->texture, 0, 0);
139 td->unnorm_coords = 1;
140 td->texture_type = LIMA_TEXTURE_TYPE_2D;
141 td->min_img_filter_nearest = 1;
142 td->mag_img_filter_nearest = 1;
143 td->wrap_s_clamp_to_edge = 1;
144 td->wrap_t_clamp_to_edge = 1;
145 td->unknown_2_2 = 0x1;
146
147 uint32_t *ta = cpu + lima_reload_tex_array_offset;
148 ta[0] = va + lima_reload_tex_desc_offset;
149
150 float reload_gl_pos[] = {
151 fb->base.width, 0, 0, 1,
152 0, 0, 0, 1,
153 0, fb->base.height, 0, 1,
154 };
155 memcpy(cpu + lima_reload_gl_pos_offset, reload_gl_pos,
156 sizeof(reload_gl_pos));
157
158 float reload_varying[] = {
159 fb->base.width, 0, 0, 0,
160 0, fb->base.height, 0, 0,
161 };
162 memcpy(cpu + lima_reload_varying_offset, reload_varying,
163 sizeof(reload_varying));
164
165 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, res->bo, LIMA_SUBMIT_BO_READ);
166 pipe_resource_reference(&pres, NULL);
167
168 PLBU_CMD_BEGIN(&ctx->plbu_cmd_head, 20);
169
170 PLBU_CMD_VIEWPORT_LEFT(0);
171 PLBU_CMD_VIEWPORT_RIGHT(fui(fb->base.width));
172 PLBU_CMD_VIEWPORT_BOTTOM(0);
173 PLBU_CMD_VIEWPORT_TOP(fui(fb->base.height));
174
175 PLBU_CMD_RSW_VERTEX_ARRAY(
176 va + lima_reload_render_state_offset,
177 va + lima_reload_gl_pos_offset);
178
179 PLBU_CMD_UNKNOWN2();
180 PLBU_CMD_UNKNOWN1();
181
182 PLBU_CMD_INDICES(screen->pp_buffer->va + pp_shared_index_offset);
183 PLBU_CMD_INDEXED_DEST(va + lima_reload_gl_pos_offset);
184 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
185
186 PLBU_CMD_END();
187 }
188
189 static void
190 lima_pack_head_plbu_cmd(struct lima_context *ctx)
191 {
192 struct lima_context_framebuffer *fb = &ctx->framebuffer;
193
194 PLBU_CMD_BEGIN(&ctx->plbu_cmd_head, 10);
195
196 PLBU_CMD_UNKNOWN2();
197 PLBU_CMD_BLOCK_STEP(fb->shift_min, fb->shift_h, fb->shift_w);
198 PLBU_CMD_TILED_DIMENSIONS(fb->tiled_w, fb->tiled_h);
199 PLBU_CMD_BLOCK_STRIDE(fb->block_w);
200
201 PLBU_CMD_ARRAY_ADDRESS(
202 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size,
203 fb->block_w * fb->block_h);
204
205 PLBU_CMD_END();
206
207 if (lima_fb_need_reload(ctx))
208 lima_pack_reload_plbu_cmd(ctx);
209 }
210
211 static bool
212 lima_is_scissor_zero(struct lima_context *ctx)
213 {
214 if (!ctx->rasterizer || !ctx->rasterizer->base.scissor)
215 return false;
216
217 struct pipe_scissor_state *scissor = &ctx->scissor;
218 return
219 scissor->minx == scissor->maxx
220 && scissor->miny == scissor->maxy;
221 }
222
223 static void
224 hilbert_rotate(int n, int *x, int *y, int rx, int ry)
225 {
226 if (ry == 0) {
227 if (rx == 1) {
228 *x = n-1 - *x;
229 *y = n-1 - *y;
230 }
231
232 /* Swap x and y */
233 int t = *x;
234 *x = *y;
235 *y = t;
236 }
237 }
238
239 static void
240 hilbert_coords(int n, int d, int *x, int *y)
241 {
242 int rx, ry, i, t=d;
243
244 *x = *y = 0;
245
246 for (i = 0; (1 << i) < n; i++) {
247
248 rx = 1 & (t / 2);
249 ry = 1 & (t ^ rx);
250
251 hilbert_rotate(1 << i, x, y, rx, ry);
252
253 *x += rx << i;
254 *y += ry << i;
255
256 t /= 4;
257 }
258 }
259
260 static int
261 lima_get_pp_stream_size(int num_pp, int tiled_w, int tiled_h, uint32_t *off)
262 {
263 /* carefully calculate each stream start address:
264 * 1. overflow: each stream size may be different due to
265 * fb->tiled_w * fb->tiled_h can't be divided by num_pp,
266 * extra size should be added to the preceeding stream
267 * 2. alignment: each stream address should be 0x20 aligned
268 */
269 int delta = tiled_w * tiled_h / num_pp * 16 + 16;
270 int remain = tiled_w * tiled_h % num_pp;
271 int offset = 0;
272
273 for (int i = 0; i < num_pp; i++) {
274 off[i] = offset;
275
276 offset += delta;
277 if (remain) {
278 offset += 16;
279 remain--;
280 }
281 offset = align(offset, 0x20);
282 }
283
284 return offset;
285 }
286
287 static bool
288 inside_damage_region(int x, int y, struct lima_damage_region *ds)
289 {
290 if (!ds || !ds->region)
291 return true;
292
293 for (int i = 0; i < ds->num_region; i++) {
294 struct pipe_scissor_state *ss = ds->region + i;
295 if (x >= ss->minx && x < ss->maxx &&
296 y >= ss->miny && y < ss->maxy)
297 return true;
298 }
299
300 return false;
301 }
302
303 static void
304 lima_generate_pp_stream(struct lima_context *ctx, int off_x, int off_y,
305 int tiled_w, int tiled_h)
306 {
307 struct lima_pp_stream_state *ps = &ctx->pp_stream;
308 struct lima_context_framebuffer *fb = &ctx->framebuffer;
309 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
310 struct lima_screen *screen = lima_screen(ctx->base.screen);
311 int i, num_pp = screen->num_pp;
312
313 /* use hilbert_coords to generates 1D to 2D relationship.
314 * 1D for pp stream index and 2D for plb block x/y on framebuffer.
315 * if multi pp, interleave the 1D index to make each pp's render target
316 * close enough which should result close workload
317 */
318 int max = MAX2(tiled_w, tiled_h);
319 int index = 0;
320 uint32_t *stream[4];
321 int si[4] = {0};
322 int dim = 0;
323 int count = 0;
324
325 /* Don't update count if we get zero rect. We'll just generate
326 * PP stream with just terminators in it.
327 */
328 if ((tiled_w * tiled_h) != 0) {
329 dim = util_logbase2_ceil(max);
330 count = 1 << (dim + dim);
331 }
332
333 for (i = 0; i < num_pp; i++)
334 stream[i] = ps->bo->map + ps->bo_offset + ps->offset[i];
335
336 for (i = 0; i < count; i++) {
337 int x, y;
338 hilbert_coords(max, i, &x, &y);
339 if (x < tiled_w && y < tiled_h) {
340 x += off_x;
341 y += off_y;
342
343 if (!inside_damage_region(x, y, damage))
344 continue;
345
346 int pp = index % num_pp;
347 int offset = ((y >> fb->shift_h) * fb->block_w +
348 (x >> fb->shift_w)) * LIMA_CTX_PLB_BLK_SIZE;
349 int plb_va = ctx->plb[ctx->plb_index]->va + offset;
350
351 stream[pp][si[pp]++] = 0;
352 stream[pp][si[pp]++] = 0xB8000000 | x | (y << 8);
353 stream[pp][si[pp]++] = 0xE0000002 | ((plb_va >> 3) & ~0xE0000003);
354 stream[pp][si[pp]++] = 0xB0000000;
355
356 index++;
357 }
358 }
359
360 for (i = 0; i < num_pp; i++) {
361 stream[i][si[i]++] = 0;
362 stream[i][si[i]++] = 0xBC000000;
363 stream[i][si[i]++] = 0;
364 stream[i][si[i]++] = 0;
365
366 lima_dump_command_stream_print(
367 stream[i], si[i] * 4, false, "pp plb stream %d at va %x\n",
368 i, ps->bo->va + ps->bo_offset + ps->offset[i]);
369 }
370 }
371
372 static void
373 lima_update_damage_pp_stream(struct lima_context *ctx)
374 {
375 struct lima_damage_region *ds = lima_ctx_get_damage(ctx);
376 struct lima_context_framebuffer *fb = &ctx->framebuffer;
377 struct pipe_scissor_state bound;
378
379 if (ds && ds->region) {
380 struct pipe_scissor_state *dbound = &ds->bound;
381 bound.minx = MAX2(dbound->minx, ctx->damage_rect.minx >> 4);
382 bound.miny = MAX2(dbound->miny, ctx->damage_rect.miny >> 4);
383 bound.maxx = MIN2(dbound->maxx, (ctx->damage_rect.maxx + 0xf) >> 4);
384 bound.maxy = MIN2(dbound->maxy, (ctx->damage_rect.maxy + 0xf) >> 4);
385 } else {
386 bound.minx = ctx->damage_rect.minx >> 4;
387 bound.miny = ctx->damage_rect.miny >> 4;
388 bound.maxx = (ctx->damage_rect.maxx + 0xf) >> 4;
389 bound.maxy = (ctx->damage_rect.maxy + 0xf) >> 4;
390 }
391
392 /* Clamp to FB size */
393 bound.minx = MIN2(bound.minx, fb->tiled_w);
394 bound.miny = MIN2(bound.miny, fb->tiled_h);
395 bound.maxx = MIN2(bound.maxx, fb->tiled_w);
396 bound.maxy = MIN2(bound.maxy, fb->tiled_h);
397
398 int tiled_w = bound.maxx - bound.minx;
399 int tiled_h = bound.maxy - bound.miny;
400
401 struct lima_screen *screen = lima_screen(ctx->base.screen);
402 int size = lima_get_pp_stream_size(
403 screen->num_pp, tiled_w, tiled_h, ctx->pp_stream.offset);
404
405 void *cpu;
406 unsigned offset;
407 struct pipe_resource *pres = NULL;
408 u_upload_alloc(ctx->uploader, 0, size, 0x40, &offset, &pres, &cpu);
409
410 struct lima_resource *res = lima_resource(pres);
411 ctx->pp_stream.bo = res->bo;
412 ctx->pp_stream.bo_offset = offset;
413
414 lima_generate_pp_stream(ctx, bound.minx, bound.miny, tiled_w, tiled_h);
415
416 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, res->bo, LIMA_SUBMIT_BO_READ);
417 pipe_resource_reference(&pres, NULL);
418 }
419
420 static void
421 lima_update_full_pp_stream(struct lima_context *ctx)
422 {
423 struct lima_context_framebuffer *fb = &ctx->framebuffer;
424 struct lima_ctx_plb_pp_stream_key key = {
425 .plb_index = ctx->plb_index,
426 .tiled_w = fb->tiled_w,
427 .tiled_h = fb->tiled_h,
428 };
429
430 struct hash_entry *entry =
431 _mesa_hash_table_search(ctx->plb_pp_stream, &key);
432 struct lima_ctx_plb_pp_stream *s = entry->data;
433
434 if (s->bo) {
435 ctx->pp_stream.bo = s->bo;
436 ctx->pp_stream.bo_offset = 0;
437 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
438 }
439 else {
440 struct lima_screen *screen = lima_screen(ctx->base.screen);
441 int size = lima_get_pp_stream_size(
442 screen->num_pp, fb->tiled_w, fb->tiled_h, s->offset);
443 s->bo = lima_bo_create(screen, size, 0);
444 lima_bo_map(s->bo);
445
446 ctx->pp_stream.bo = s->bo;
447 ctx->pp_stream.bo_offset = 0;
448 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
449
450 lima_generate_pp_stream(ctx, 0, 0, fb->tiled_w, fb->tiled_h);
451 }
452
453 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, s->bo, LIMA_SUBMIT_BO_READ);
454 }
455
456 static bool
457 lima_damage_fullscreen(struct lima_context *ctx)
458 {
459 return ctx->damage_rect.minx == 0 &&
460 ctx->damage_rect.miny == 0 &&
461 ctx->damage_rect.maxx == ctx->framebuffer.base.width &&
462 ctx->damage_rect.maxy == ctx->framebuffer.base.height;
463 }
464
465 static void
466 lima_update_pp_stream(struct lima_context *ctx)
467 {
468 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
469 if ((damage && damage->region) || !lima_damage_fullscreen(ctx))
470 lima_update_damage_pp_stream(ctx);
471 else if (ctx->plb_pp_stream)
472 lima_update_full_pp_stream(ctx);
473 else
474 ctx->pp_stream.bo = NULL;
475 }
476
477 static void
478 lima_update_submit_wb(struct lima_context *ctx, unsigned buffers)
479 {
480 struct lima_context_framebuffer *fb = &ctx->framebuffer;
481
482 /* add to submit when the buffer is dirty and resolve is clear (not added before) */
483 if (fb->base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0) &&
484 !(ctx->resolve & PIPE_CLEAR_COLOR0)) {
485 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
486 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, res->bo, LIMA_SUBMIT_BO_WRITE);
487 }
488
489 /* add to submit when the buffer is dirty and resolve is clear (not added before) */
490 if (fb->base.zsbuf && (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) &&
491 !(ctx->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
492 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
493 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, res->bo, LIMA_SUBMIT_BO_WRITE);
494 }
495
496 ctx->resolve |= buffers;
497 }
498
499 static void
500 lima_update_submit_bo(struct lima_context *ctx)
501 {
502 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->plb_gp_stream,
503 LIMA_SUBMIT_BO_READ);
504 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->plb[ctx->plb_index],
505 LIMA_SUBMIT_BO_WRITE);
506 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->gp_tile_heap[ctx->plb_index],
507 LIMA_SUBMIT_BO_WRITE);
508
509 lima_dump_command_stream_print(
510 ctx->plb_gp_stream->map + ctx->plb_index * ctx->plb_gp_size,
511 ctx->plb_gp_size, false, "gp plb stream at va %x\n",
512 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size);
513
514 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->plb[ctx->plb_index],
515 LIMA_SUBMIT_BO_READ);
516 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->gp_tile_heap[ctx->plb_index],
517 LIMA_SUBMIT_BO_READ);
518
519 struct lima_screen *screen = lima_screen(ctx->base.screen);
520 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, screen->pp_buffer, LIMA_SUBMIT_BO_READ);
521 }
522
523 static void
524 lima_damage_rect_union(struct lima_context *ctx, unsigned minx, unsigned maxx, unsigned miny, unsigned maxy)
525 {
526 ctx->damage_rect.minx = MIN2(ctx->damage_rect.minx, minx);
527 ctx->damage_rect.miny = MIN2(ctx->damage_rect.miny, miny);
528 ctx->damage_rect.maxx = MAX2(ctx->damage_rect.maxx, maxx);
529 ctx->damage_rect.maxy = MAX2(ctx->damage_rect.maxy, maxy);
530 }
531
532 static void
533 lima_clear(struct pipe_context *pctx, unsigned buffers,
534 const union pipe_color_union *color, double depth, unsigned stencil)
535 {
536 struct lima_context *ctx = lima_context(pctx);
537
538 lima_flush(ctx);
539
540 lima_update_submit_wb(ctx, buffers);
541
542 /* no need to reload if cleared */
543 if (ctx->framebuffer.base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0)) {
544 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
545 surf->reload = false;
546 }
547
548 struct lima_context_clear *clear = &ctx->clear;
549 clear->buffers = buffers;
550
551 if (buffers & PIPE_CLEAR_COLOR0) {
552 clear->color_8pc =
553 ((uint32_t)float_to_ubyte(color->f[3]) << 24) |
554 ((uint32_t)float_to_ubyte(color->f[2]) << 16) |
555 ((uint32_t)float_to_ubyte(color->f[1]) << 8) |
556 float_to_ubyte(color->f[0]);
557
558 clear->color_16pc =
559 ((uint64_t)float_to_ushort(color->f[3]) << 48) |
560 ((uint64_t)float_to_ushort(color->f[2]) << 32) |
561 ((uint64_t)float_to_ushort(color->f[1]) << 16) |
562 float_to_ushort(color->f[0]);
563 }
564
565 if (buffers & PIPE_CLEAR_DEPTH)
566 clear->depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
567
568 if (buffers & PIPE_CLEAR_STENCIL)
569 clear->stencil = stencil;
570
571 ctx->dirty |= LIMA_CONTEXT_DIRTY_CLEAR;
572
573 lima_damage_rect_union(ctx, 0, ctx->framebuffer.base.width,
574 0, ctx->framebuffer.base.height);
575 }
576
577 enum lima_attrib_type {
578 LIMA_ATTRIB_FLOAT = 0x000,
579 /* todo: find out what lives here. */
580 LIMA_ATTRIB_I16 = 0x004,
581 LIMA_ATTRIB_U16 = 0x005,
582 LIMA_ATTRIB_I8 = 0x006,
583 LIMA_ATTRIB_U8 = 0x007,
584 LIMA_ATTRIB_I8N = 0x008,
585 LIMA_ATTRIB_U8N = 0x009,
586 LIMA_ATTRIB_I16N = 0x00A,
587 LIMA_ATTRIB_U16N = 0x00B,
588 /* todo: where is the 32 int */
589 /* todo: find out what lives here. */
590 LIMA_ATTRIB_FIXED = 0x101
591 };
592
593 static enum lima_attrib_type
594 lima_pipe_format_to_attrib_type(enum pipe_format format)
595 {
596 const struct util_format_description *desc = util_format_description(format);
597 int i = util_format_get_first_non_void_channel(format);
598 const struct util_format_channel_description *c = desc->channel + i;
599
600 switch (c->type) {
601 case UTIL_FORMAT_TYPE_FLOAT:
602 return LIMA_ATTRIB_FLOAT;
603 case UTIL_FORMAT_TYPE_FIXED:
604 return LIMA_ATTRIB_FIXED;
605 case UTIL_FORMAT_TYPE_SIGNED:
606 if (c->size == 8) {
607 if (c->normalized)
608 return LIMA_ATTRIB_I8N;
609 else
610 return LIMA_ATTRIB_I8;
611 }
612 else if (c->size == 16) {
613 if (c->normalized)
614 return LIMA_ATTRIB_I16N;
615 else
616 return LIMA_ATTRIB_I16;
617 }
618 break;
619 case UTIL_FORMAT_TYPE_UNSIGNED:
620 if (c->size == 8) {
621 if (c->normalized)
622 return LIMA_ATTRIB_U8N;
623 else
624 return LIMA_ATTRIB_U8;
625 }
626 else if (c->size == 16) {
627 if (c->normalized)
628 return LIMA_ATTRIB_U16N;
629 else
630 return LIMA_ATTRIB_U16;
631 }
632 break;
633 }
634
635 return LIMA_ATTRIB_FLOAT;
636 }
637
638 static void
639 lima_pack_vs_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
640 {
641 VS_CMD_BEGIN(&ctx->vs_cmd_array, 24);
642
643 if (!info->index_size) {
644 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1();
645 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2();
646 }
647
648 int uniform_size = ctx->vs->uniform_pending_offset + ctx->vs->constant_size + 32;
649 VS_CMD_UNIFORMS_ADDRESS(
650 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform),
651 align(uniform_size, 16));
652
653 VS_CMD_SHADER_ADDRESS(ctx->vs->bo->va, ctx->vs->shader_size);
654 VS_CMD_SHADER_INFO(ctx->vs->prefetch, ctx->vs->shader_size);
655
656 int num_outputs = ctx->vs->num_outputs;
657 int num_attributes = ctx->vertex_elements->num_elements;
658 VS_CMD_VARYING_ATTRIBUTE_COUNT(num_outputs, MAX2(1, num_attributes));
659
660 VS_CMD_UNKNOWN1();
661
662 VS_CMD_ATTRIBUTES_ADDRESS(
663 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info),
664 MAX2(1, num_attributes));
665
666 VS_CMD_VARYINGS_ADDRESS(
667 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info),
668 num_outputs);
669
670 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
671 VS_CMD_DRAW(num, info->index_size);
672
673 VS_CMD_UNKNOWN2();
674
675 VS_CMD_ARRAYS_SEMAPHORE_END(info->index_size);
676
677 VS_CMD_END();
678 }
679
680 static void
681 lima_pack_plbu_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
682 {
683 struct lima_context_framebuffer *fb = &ctx->framebuffer;
684 struct lima_vs_shader_state *vs = ctx->vs;
685 unsigned minx, maxx, miny, maxy;
686
687 /* If it's zero scissor, we skip adding all other commands */
688 if (lima_is_scissor_zero(ctx))
689 return;
690
691 PLBU_CMD_BEGIN(&ctx->plbu_cmd_array, 32);
692
693 PLBU_CMD_VIEWPORT_LEFT(fui(ctx->viewport.left));
694 PLBU_CMD_VIEWPORT_RIGHT(fui(ctx->viewport.right));
695 PLBU_CMD_VIEWPORT_BOTTOM(fui(ctx->viewport.bottom));
696 PLBU_CMD_VIEWPORT_TOP(fui(ctx->viewport.top));
697
698 if (!info->index_size)
699 PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN();
700
701 int cf = ctx->rasterizer->base.cull_face;
702 int ccw = ctx->rasterizer->base.front_ccw;
703 uint32_t cull = 0;
704 bool force_point_size = false;
705
706 if (cf != PIPE_FACE_NONE) {
707 if (cf & PIPE_FACE_FRONT)
708 cull |= ccw ? 0x00040000 : 0x00020000;
709 if (cf & PIPE_FACE_BACK)
710 cull |= ccw ? 0x00020000 : 0x00040000;
711 }
712
713 /* Specify point size with PLBU command if shader doesn't write */
714 if (info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx == -1)
715 force_point_size = true;
716
717 /* Specify line width with PLBU command for lines */
718 if (info->mode > PIPE_PRIM_POINTS && info->mode < PIPE_PRIM_TRIANGLES)
719 force_point_size = true;
720
721 PLBU_CMD_PRIMITIVE_SETUP(force_point_size, cull, info->index_size);
722
723 PLBU_CMD_RSW_VERTEX_ARRAY(
724 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw),
725 ctx->gp_output->va);
726
727 /* TODO
728 * - we should set it only for the first draw that enabled the scissor and for
729 * latter draw only if scissor is dirty
730 */
731 if (ctx->rasterizer->base.scissor) {
732 struct pipe_scissor_state *scissor = &ctx->scissor;
733 minx = scissor->minx;
734 maxx = scissor->maxx;
735 miny = scissor->miny;
736 maxy = scissor->maxy;
737 } else {
738 minx = 0;
739 maxx = fb->base.width;
740 miny = 0;
741 maxy = fb->base.height;
742 }
743
744 minx = MAX2(minx, ctx->viewport.left);
745 maxx = MIN2(maxx, ctx->viewport.right);
746 miny = MAX2(miny, ctx->viewport.bottom);
747 maxy = MIN2(maxy, ctx->viewport.top);
748
749 PLBU_CMD_SCISSORS(minx, maxx, miny, maxy);
750 lima_damage_rect_union(ctx, minx, maxx, miny, maxy);
751
752 PLBU_CMD_UNKNOWN1();
753
754 PLBU_CMD_DEPTH_RANGE_NEAR(fui(ctx->viewport.near));
755 PLBU_CMD_DEPTH_RANGE_FAR(fui(ctx->viewport.far));
756
757 if ((info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx == -1) ||
758 ((info->mode >= PIPE_PRIM_LINES) && (info->mode < PIPE_PRIM_TRIANGLES)))
759 {
760 uint32_t v = info->mode == PIPE_PRIM_POINTS ?
761 fui(ctx->rasterizer->base.point_size) : fui(ctx->rasterizer->base.line_width);
762 PLBU_CMD_LOW_PRIM_SIZE(v);
763 }
764
765 if (info->index_size) {
766 PLBU_CMD_INDEXED_DEST(ctx->gp_output->va);
767 if (vs->point_size_idx != -1)
768 PLBU_CMD_INDEXED_PT_SIZE(ctx->gp_output->va + ctx->gp_output_point_size_offt);
769
770 PLBU_CMD_INDICES(ctx->index_res->bo->va + info->start * info->index_size + ctx->index_offset);
771 }
772 else {
773 /* can this make the attribute info static? */
774 PLBU_CMD_DRAW_ARRAYS(info->mode, info->start, info->count);
775 }
776
777 PLBU_CMD_ARRAYS_SEMAPHORE_END();
778
779 if (info->index_size)
780 PLBU_CMD_DRAW_ELEMENTS(info->mode, ctx->min_index, info->count);
781
782 PLBU_CMD_END();
783 }
784
785 static int
786 lima_blend_func(enum pipe_blend_func pipe)
787 {
788 switch (pipe) {
789 case PIPE_BLEND_ADD:
790 return 2;
791 case PIPE_BLEND_SUBTRACT:
792 return 0;
793 case PIPE_BLEND_REVERSE_SUBTRACT:
794 return 1;
795 case PIPE_BLEND_MIN:
796 return 4;
797 case PIPE_BLEND_MAX:
798 return 5;
799 }
800 return -1;
801 }
802
803 static int
804 lima_blend_factor_has_alpha(enum pipe_blendfactor pipe)
805 {
806 /* Bit 4 is set if the blendfactor uses alpha */
807 switch (pipe) {
808 case PIPE_BLENDFACTOR_SRC_ALPHA:
809 case PIPE_BLENDFACTOR_DST_ALPHA:
810 case PIPE_BLENDFACTOR_CONST_ALPHA:
811 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
812 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
813 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
814 return 1;
815
816 case PIPE_BLENDFACTOR_SRC_COLOR:
817 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
818 case PIPE_BLENDFACTOR_DST_COLOR:
819 case PIPE_BLENDFACTOR_INV_DST_COLOR:
820 case PIPE_BLENDFACTOR_CONST_COLOR:
821 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
822 case PIPE_BLENDFACTOR_ZERO:
823 case PIPE_BLENDFACTOR_ONE:
824 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
825 return 0;
826
827 case PIPE_BLENDFACTOR_SRC1_COLOR:
828 case PIPE_BLENDFACTOR_SRC1_ALPHA:
829 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
830 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
831 return -1; /* not supported */
832 }
833 return -1;
834 }
835
836 static int
837 lima_blend_factor_is_inv(enum pipe_blendfactor pipe)
838 {
839 /* Bit 3 is set if the blendfactor type is inverted */
840 switch (pipe) {
841 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
842 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
843 case PIPE_BLENDFACTOR_INV_DST_COLOR:
844 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
845 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
846 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
847 case PIPE_BLENDFACTOR_ONE:
848 return 1;
849
850 case PIPE_BLENDFACTOR_SRC_COLOR:
851 case PIPE_BLENDFACTOR_SRC_ALPHA:
852 case PIPE_BLENDFACTOR_DST_COLOR:
853 case PIPE_BLENDFACTOR_DST_ALPHA:
854 case PIPE_BLENDFACTOR_CONST_COLOR:
855 case PIPE_BLENDFACTOR_CONST_ALPHA:
856 case PIPE_BLENDFACTOR_ZERO:
857 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
858 return 0;
859
860 case PIPE_BLENDFACTOR_SRC1_COLOR:
861 case PIPE_BLENDFACTOR_SRC1_ALPHA:
862 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
863 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
864 return -1; /* not supported */
865 }
866 return -1;
867 }
868
869 static int
870 lima_blend_factor(enum pipe_blendfactor pipe)
871 {
872 /* Bits 0-2 indicate the blendfactor type */
873 switch (pipe) {
874 case PIPE_BLENDFACTOR_SRC_COLOR:
875 case PIPE_BLENDFACTOR_SRC_ALPHA:
876 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
877 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
878 return 0;
879
880 case PIPE_BLENDFACTOR_DST_COLOR:
881 case PIPE_BLENDFACTOR_DST_ALPHA:
882 case PIPE_BLENDFACTOR_INV_DST_COLOR:
883 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
884 return 1;
885
886 case PIPE_BLENDFACTOR_CONST_COLOR:
887 case PIPE_BLENDFACTOR_CONST_ALPHA:
888 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
889 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
890 return 2;
891
892 case PIPE_BLENDFACTOR_ZERO:
893 case PIPE_BLENDFACTOR_ONE:
894 return 3;
895
896 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
897 return 4;
898
899 case PIPE_BLENDFACTOR_SRC1_COLOR:
900 case PIPE_BLENDFACTOR_SRC1_ALPHA:
901 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
902 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
903 return -1; /* not supported */
904 }
905 return -1;
906 }
907
908 static int
909 lima_calculate_alpha_blend(enum pipe_blend_func rgb_func, enum pipe_blend_func alpha_func,
910 enum pipe_blendfactor rgb_src_factor, enum pipe_blendfactor rgb_dst_factor,
911 enum pipe_blendfactor alpha_src_factor, enum pipe_blendfactor alpha_dst_factor)
912 {
913 /* PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE has to be changed to PIPE_BLENDFACTOR_ONE
914 * if it is set for alpha_src.
915 */
916 if (alpha_src_factor == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE)
917 alpha_src_factor = PIPE_BLENDFACTOR_ONE;
918
919 return lima_blend_func(rgb_func) |
920 (lima_blend_func(alpha_func) << 3) |
921
922 (lima_blend_factor(rgb_src_factor) << 6) |
923 (lima_blend_factor_is_inv(rgb_src_factor) << 9) |
924 (lima_blend_factor_has_alpha(rgb_src_factor) << 10) |
925
926 (lima_blend_factor(rgb_dst_factor) << 11) |
927 (lima_blend_factor_is_inv(rgb_dst_factor) << 14) |
928 (lima_blend_factor_has_alpha(rgb_dst_factor) << 15) |
929
930 (lima_blend_factor(alpha_src_factor) << 16) |
931 (lima_blend_factor_is_inv(alpha_src_factor) << 19) |
932
933 (lima_blend_factor(alpha_dst_factor) << 20) |
934 (lima_blend_factor_is_inv(alpha_dst_factor) << 23) |
935 0x0C000000; /* need to check if this is GLESv1 glAlphaFunc */
936 }
937
938 static int
939 lima_stencil_op(enum pipe_stencil_op pipe)
940 {
941 switch (pipe) {
942 case PIPE_STENCIL_OP_KEEP:
943 return 0;
944 case PIPE_STENCIL_OP_ZERO:
945 return 2;
946 case PIPE_STENCIL_OP_REPLACE:
947 return 1;
948 case PIPE_STENCIL_OP_INCR:
949 return 6;
950 case PIPE_STENCIL_OP_DECR:
951 return 7;
952 case PIPE_STENCIL_OP_INCR_WRAP:
953 return 4;
954 case PIPE_STENCIL_OP_DECR_WRAP:
955 return 5;
956 case PIPE_STENCIL_OP_INVERT:
957 return 3;
958 }
959 return -1;
960 }
961
962 static unsigned
963 lima_calculate_depth_test(struct pipe_depth_state *depth, struct pipe_rasterizer_state *rst)
964 {
965 int offset_scale = 0, offset_units = 0;
966 enum pipe_compare_func func = (depth->enabled ? depth->func : PIPE_FUNC_ALWAYS);
967
968 offset_scale = CLAMP(rst->offset_scale * 4, -128, 127);
969 if (offset_scale < 0)
970 offset_scale += 0x100;
971
972 offset_units = CLAMP(rst->offset_units * 2, -128, 127);
973 if (offset_units < 0)
974 offset_units += 0x100;
975
976 return (depth->enabled && depth->writemask) |
977 ((int)func << 1) |
978 (offset_scale << 16) |
979 (offset_units << 24) |
980 0x30; /* find out what is this */
981 }
982
983 static void
984 lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *info)
985 {
986 struct lima_fs_shader_state *fs = ctx->fs;
987 struct lima_render_state *render =
988 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_plb_rsw,
989 sizeof(*render));
990 bool early_z = true;
991 bool pixel_kill = true;
992
993 /* do hw support RGBA independ blend?
994 * PIPE_CAP_INDEP_BLEND_ENABLE
995 *
996 * how to handle the no cbuf only zbuf case?
997 */
998 struct pipe_rt_blend_state *rt = ctx->blend->base.rt;
999 render->blend_color_bg = float_to_ubyte(ctx->blend_color.color[2]) |
1000 (float_to_ubyte(ctx->blend_color.color[1]) << 16);
1001 render->blend_color_ra = float_to_ubyte(ctx->blend_color.color[0]) |
1002 (float_to_ubyte(ctx->blend_color.color[3]) << 16);
1003
1004 if (rt->blend_enable) {
1005 render->alpha_blend = lima_calculate_alpha_blend(rt->rgb_func, rt->alpha_func,
1006 rt->rgb_src_factor, rt->rgb_dst_factor,
1007 rt->alpha_src_factor, rt->alpha_dst_factor);
1008 }
1009 else {
1010 /*
1011 * Special handling for blending disabled.
1012 * Binary driver is generating the same alpha_value,
1013 * as when we would just enable blending, without changing/setting any blend equation/params.
1014 * Normaly in this case mesa would set all rt fields (func/factor) to zero.
1015 */
1016 render->alpha_blend = lima_calculate_alpha_blend(PIPE_BLEND_ADD, PIPE_BLEND_ADD,
1017 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO,
1018 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO);
1019 }
1020
1021 render->alpha_blend |= (rt->colormask & PIPE_MASK_RGBA) << 28;
1022
1023 struct pipe_rasterizer_state *rst = &ctx->rasterizer->base;
1024 struct pipe_depth_state *depth = &ctx->zsa->base.depth;
1025 render->depth_test = lima_calculate_depth_test(depth, rst);
1026
1027 ushort far, near;
1028
1029 near = float_to_ushort(ctx->viewport.near);
1030 far = float_to_ushort(ctx->viewport.far);
1031
1032 /* Subtract epsilon from 'near' if far == near. Make sure we don't get overflow */
1033 if ((far == near) && (near != 0))
1034 near--;
1035
1036 /* overlap with plbu? any place can remove one? */
1037 render->depth_range = near | (far << 16);
1038
1039 struct pipe_stencil_state *stencil = ctx->zsa->base.stencil;
1040 struct pipe_stencil_ref *ref = &ctx->stencil_ref;
1041
1042 if (stencil[0].enabled) { /* stencil is enabled */
1043 render->stencil_front = stencil[0].func |
1044 (lima_stencil_op(stencil[0].fail_op) << 3) |
1045 (lima_stencil_op(stencil[0].zfail_op) << 6) |
1046 (lima_stencil_op(stencil[0].zpass_op) << 9) |
1047 (ref->ref_value[0] << 16) |
1048 (stencil[0].valuemask << 24);
1049 render->stencil_back = render->stencil_front;
1050 render->stencil_test = (stencil[0].writemask & 0xff) | (stencil[0].writemask & 0xff) << 8;
1051 if (stencil[1].enabled) { /* two-side is enabled */
1052 render->stencil_back = stencil[1].func |
1053 (lima_stencil_op(stencil[1].fail_op) << 3) |
1054 (lima_stencil_op(stencil[1].zfail_op) << 6) |
1055 (lima_stencil_op(stencil[1].zpass_op) << 9) |
1056 (ref->ref_value[1] << 16) |
1057 (stencil[1].valuemask << 24);
1058 render->stencil_test = (stencil[0].writemask & 0xff) | (stencil[1].writemask & 0xff) << 8;
1059 }
1060 /* TODO: Find out, what (render->stecil_test & 0xffff0000) is.
1061 * 0x00ff0000 is probably (float_to_ubyte(alpha->ref_value) << 16)
1062 * (render->multi_sample & 0x00000007 is probably the compare function
1063 * of glAlphaFunc then.
1064 */
1065 }
1066 else {
1067 /* Default values, when stencil is disabled:
1068 * stencil[0|1].valuemask = 0xff
1069 * stencil[0|1].func = PIPE_FUNC_ALWAYS
1070 * stencil[0|1].writemask = 0xff
1071 */
1072 render->stencil_front = 0xff000007;
1073 render->stencil_back = 0xff000007;
1074 render->stencil_test = 0x0000ffff;
1075 }
1076
1077 /* need more investigation */
1078 if (info->mode == PIPE_PRIM_POINTS)
1079 render->multi_sample = 0x0000F007;
1080 else if (info->mode < PIPE_PRIM_TRIANGLES)
1081 render->multi_sample = 0x0000F407;
1082 else
1083 render->multi_sample = 0x0000F807;
1084 if (ctx->framebuffer.base.samples)
1085 render->multi_sample |= 0x68;
1086
1087 render->shader_address =
1088 ctx->fs->bo->va | (((uint32_t *)ctx->fs->bo->map)[0] & 0x1F);
1089
1090 /* seems not needed */
1091 render->uniforms_address = 0x00000000;
1092
1093 render->textures_address = 0x00000000;
1094
1095 render->aux0 = (ctx->vs->varying_stride >> 3);
1096 render->aux1 = 0x00001000;
1097 if (ctx->blend->base.dither)
1098 render->aux1 |= 0x00002000;
1099
1100 if (fs->uses_discard) {
1101 early_z = false;
1102 pixel_kill = false;
1103 }
1104
1105 if (rt->blend_enable)
1106 pixel_kill = false;
1107
1108 if ((rt->colormask & PIPE_MASK_RGBA) != PIPE_MASK_RGBA)
1109 pixel_kill = false;
1110
1111 if (early_z)
1112 render->aux0 |= 0x300;
1113
1114 if (pixel_kill)
1115 render->aux0 |= 0x1000;
1116
1117 if (ctx->tex_stateobj.num_samplers) {
1118 render->textures_address =
1119 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_tex_desc);
1120 render->aux0 |= ctx->tex_stateobj.num_samplers << 14;
1121 render->aux0 |= 0x20;
1122 }
1123
1124 if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
1125 render->uniforms_address =
1126 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array);
1127 uint32_t size = ctx->buffer_state[lima_ctx_buff_pp_uniform].size;
1128 uint32_t bits = 0;
1129 if (size >= 8) {
1130 bits = util_last_bit(size >> 3) - 1;
1131 bits += size & u_bit_consecutive(0, bits + 3) ? 1 : 0;
1132 }
1133 render->uniforms_address |= bits > 0xf ? 0xf : bits;
1134
1135 render->aux0 |= 0x80;
1136 render->aux1 |= 0x10000;
1137 }
1138
1139 if (ctx->vs->num_varyings) {
1140 render->varying_types = 0x00000000;
1141 render->varyings_address = ctx->gp_output->va +
1142 ctx->gp_output_varyings_offt;
1143 for (int i = 0, index = 0; i < ctx->vs->num_outputs; i++) {
1144 int val;
1145
1146 if (i == ctx->vs->gl_pos_idx ||
1147 i == ctx->vs->point_size_idx)
1148 continue;
1149
1150 struct lima_varying_info *v = ctx->vs->varying + i;
1151 if (v->component_size == 4)
1152 val = v->components > 2 ? 0 : 1;
1153 else
1154 val = v->components > 2 ? 2 : 3;
1155
1156 if (index < 10)
1157 render->varying_types |= val << (3 * index);
1158 else if (index == 10) {
1159 render->varying_types |= val << 30;
1160 render->varyings_address |= val >> 2;
1161 }
1162 else if (index == 11)
1163 render->varyings_address |= val << 1;
1164
1165 index++;
1166 }
1167 }
1168 else {
1169 render->varying_types = 0x00000000;
1170 render->varyings_address = 0x00000000;
1171 }
1172
1173 lima_dump_command_stream_print(
1174 render, sizeof(*render), false, "add render state at va %x\n",
1175 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw));
1176
1177 lima_dump_rsw_command_stream_print(
1178 render, sizeof(*render), lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw));
1179
1180 }
1181
1182 static void
1183 lima_update_gp_attribute_info(struct lima_context *ctx, const struct pipe_draw_info *info)
1184 {
1185 struct lima_vertex_element_state *ve = ctx->vertex_elements;
1186 struct lima_context_vertex_buffer *vb = &ctx->vertex_buffers;
1187
1188 uint32_t *attribute =
1189 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_attribute_info,
1190 MAX2(1, ve->num_elements) * 8);
1191
1192 int n = 0;
1193 for (int i = 0; i < ve->num_elements; i++) {
1194 struct pipe_vertex_element *pve = ve->pipe + i;
1195
1196 assert(pve->vertex_buffer_index < vb->count);
1197 assert(vb->enabled_mask & (1 << pve->vertex_buffer_index));
1198
1199 struct pipe_vertex_buffer *pvb = vb->vb + pve->vertex_buffer_index;
1200 struct lima_resource *res = lima_resource(pvb->buffer.resource);
1201
1202 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, res->bo, LIMA_SUBMIT_BO_READ);
1203
1204 unsigned start = info->index_size ? (ctx->min_index + info->index_bias) : info->start;
1205 attribute[n++] = res->bo->va + pvb->buffer_offset + pve->src_offset
1206 + start * pvb->stride;
1207 attribute[n++] = (pvb->stride << 11) |
1208 (lima_pipe_format_to_attrib_type(pve->src_format) << 2) |
1209 (util_format_get_nr_components(pve->src_format) - 1);
1210 }
1211
1212 lima_dump_command_stream_print(
1213 attribute, n * 4, false, "update attribute info at va %x\n",
1214 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info));
1215 }
1216
1217 static void
1218 lima_update_gp_uniform(struct lima_context *ctx)
1219 {
1220 struct lima_context_constant_buffer *ccb =
1221 ctx->const_buffer + PIPE_SHADER_VERTEX;
1222 struct lima_vs_shader_state *vs = ctx->vs;
1223
1224 int size = vs->uniform_pending_offset + vs->constant_size + 32;
1225 void *vs_const_buff =
1226 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_uniform, size);
1227
1228 if (ccb->buffer)
1229 memcpy(vs_const_buff, ccb->buffer, ccb->size);
1230
1231 memcpy(vs_const_buff + vs->uniform_pending_offset,
1232 ctx->viewport.transform.scale,
1233 sizeof(ctx->viewport.transform.scale));
1234 memcpy(vs_const_buff + vs->uniform_pending_offset + 16,
1235 ctx->viewport.transform.translate,
1236 sizeof(ctx->viewport.transform.translate));
1237
1238 if (vs->constant)
1239 memcpy(vs_const_buff + vs->uniform_pending_offset + 32,
1240 vs->constant, vs->constant_size);
1241
1242 lima_dump_command_stream_print(
1243 vs_const_buff, size, true,
1244 "update gp uniform at va %x\n",
1245 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform));
1246 }
1247
1248 static void
1249 lima_update_pp_uniform(struct lima_context *ctx)
1250 {
1251 const float *const_buff = ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer;
1252 size_t const_buff_size = ctx->const_buffer[PIPE_SHADER_FRAGMENT].size / sizeof(float);
1253
1254 if (!const_buff)
1255 return;
1256
1257 uint16_t *fp16_const_buff =
1258 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform,
1259 const_buff_size * sizeof(uint16_t));
1260
1261 uint32_t *array =
1262 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform_array, 4);
1263
1264 for (int i = 0; i < const_buff_size; i++)
1265 fp16_const_buff[i] = util_float_to_half(const_buff[i]);
1266
1267 *array = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform);
1268
1269 lima_dump_command_stream_print(
1270 fp16_const_buff, const_buff_size * 2, false, "add pp uniform data at va %x\n",
1271 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform));
1272 lima_dump_command_stream_print(
1273 array, 4, false, "add pp uniform info at va %x\n",
1274 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array));
1275 }
1276
1277 static void
1278 lima_update_varying(struct lima_context *ctx, const struct pipe_draw_info *info)
1279 {
1280 struct lima_screen *screen = lima_screen(ctx->base.screen);
1281 struct lima_vs_shader_state *vs = ctx->vs;
1282 uint32_t gp_output_size;
1283 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
1284
1285 uint32_t *varying =
1286 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_varying_info,
1287 vs->num_outputs * 8);
1288 int n = 0;
1289
1290 int offset = 0;
1291
1292 for (int i = 0; i < vs->num_outputs; i++) {
1293 struct lima_varying_info *v = vs->varying + i;
1294
1295 if (i == vs->gl_pos_idx ||
1296 i == vs->point_size_idx)
1297 continue;
1298
1299 int size = v->component_size * 4;
1300
1301 /* does component_size == 2 need to be 16 aligned? */
1302 if (v->component_size == 4)
1303 offset = align(offset, 16);
1304
1305 v->offset = offset;
1306 offset += size;
1307 }
1308
1309 vs->varying_stride = align(offset, 16);
1310
1311 /* gl_Position is always present, allocate space for it */
1312 gp_output_size = align(4 * 4 * num, 0x40);
1313
1314 /* Allocate space for varyings if there're any */
1315 if (vs->num_varyings) {
1316 ctx->gp_output_varyings_offt = gp_output_size;
1317 gp_output_size += align(vs->varying_stride * num, 0x40);
1318 }
1319
1320 /* Allocate space for gl_PointSize if it's there */
1321 if (vs->point_size_idx != -1) {
1322 ctx->gp_output_point_size_offt = gp_output_size;
1323 gp_output_size += 4 * num;
1324 }
1325
1326 /* gp_output can be too large for the suballocator, so create a
1327 * separate bo for it. The bo cache should prevent performance hit.
1328 */
1329 ctx->gp_output = lima_bo_create(screen, gp_output_size, 0);
1330 assert(ctx->gp_output);
1331 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->gp_output, LIMA_SUBMIT_BO_WRITE);
1332 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->gp_output, LIMA_SUBMIT_BO_READ);
1333
1334 for (int i = 0; i < vs->num_outputs; i++) {
1335 struct lima_varying_info *v = vs->varying + i;
1336
1337 if (i == vs->gl_pos_idx) {
1338 /* gl_Position */
1339 varying[n++] = ctx->gp_output->va;
1340 varying[n++] = 0x8020;
1341 } else if (i == vs->point_size_idx) {
1342 /* gl_PointSize */
1343 varying[n++] = ctx->gp_output->va + ctx->gp_output_point_size_offt;
1344 varying[n++] = 0x2021;
1345 } else {
1346 /* Varying */
1347 varying[n++] = ctx->gp_output->va + ctx->gp_output_varyings_offt +
1348 v->offset;
1349 varying[n++] = (vs->varying_stride << 11) | (v->components - 1) |
1350 (v->component_size == 2 ? 0x0C : 0);
1351 }
1352 }
1353
1354 lima_dump_command_stream_print(
1355 varying, n * 4, false, "update varying info at va %x\n",
1356 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info));
1357 }
1358
1359 static void
1360 lima_draw_vbo_update(struct pipe_context *pctx,
1361 const struct pipe_draw_info *info)
1362 {
1363 struct lima_context *ctx = lima_context(pctx);
1364 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1365 unsigned buffers = 0;
1366
1367 if (fb->base.zsbuf) {
1368 if (ctx->zsa->base.depth.enabled)
1369 buffers |= PIPE_CLEAR_DEPTH;
1370 if (ctx->zsa->base.stencil[0].enabled ||
1371 ctx->zsa->base.stencil[1].enabled)
1372 buffers |= PIPE_CLEAR_STENCIL;
1373 }
1374
1375 if (fb->base.nr_cbufs)
1376 buffers |= PIPE_CLEAR_COLOR0;
1377
1378 lima_update_submit_wb(ctx, buffers);
1379
1380 lima_update_gp_attribute_info(ctx, info);
1381
1382 if ((ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1383 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty) ||
1384 ctx->dirty & LIMA_CONTEXT_DIRTY_VIEWPORT ||
1385 ctx->dirty & LIMA_CONTEXT_DIRTY_SHADER_VERT) {
1386 lima_update_gp_uniform(ctx);
1387 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty = false;
1388 }
1389
1390 lima_update_varying(ctx, info);
1391
1392 /* If it's zero scissor, don't build vs cmd list */
1393 if (!lima_is_scissor_zero(ctx))
1394 lima_pack_vs_cmd(ctx, info);
1395
1396 if (ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1397 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty) {
1398 lima_update_pp_uniform(ctx);
1399 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty = false;
1400 }
1401
1402 lima_update_textures(ctx);
1403
1404 lima_pack_render_state(ctx, info);
1405 lima_pack_plbu_cmd(ctx, info);
1406
1407 if (ctx->gp_output) {
1408 lima_bo_unreference(ctx->gp_output); /* held by submit */
1409 ctx->gp_output = NULL;
1410 }
1411
1412 ctx->dirty = 0;
1413 }
1414
1415 static void
1416 lima_draw_vbo_indexed(struct pipe_context *pctx,
1417 const struct pipe_draw_info *info)
1418 {
1419 struct lima_context *ctx = lima_context(pctx);
1420 struct pipe_resource *indexbuf = NULL;
1421
1422 /* Mali Utgard GPU always need min/max index info for index draw,
1423 * compute it if upper layer does not do for us */
1424 if (info->max_index == ~0u)
1425 u_vbuf_get_minmax_index(pctx, info, &ctx->min_index, &ctx->max_index);
1426 else {
1427 ctx->min_index = info->min_index;
1428 ctx->max_index = info->max_index;
1429 }
1430
1431 if (info->has_user_indices) {
1432 util_upload_index_buffer(&ctx->base, info, &indexbuf, &ctx->index_offset, 0x40);
1433 ctx->index_res = lima_resource(indexbuf);
1434 }
1435 else {
1436 ctx->index_res = lima_resource(info->index.resource);
1437 ctx->index_offset = 0;
1438 }
1439
1440 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1441 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1442 lima_draw_vbo_update(pctx, info);
1443
1444 if (indexbuf)
1445 pipe_resource_reference(&indexbuf, NULL);
1446 }
1447
1448 static void
1449 lima_draw_vbo_count(struct pipe_context *pctx,
1450 const struct pipe_draw_info *info)
1451 {
1452 static const uint32_t max_verts = 65535;
1453
1454 struct pipe_draw_info local_info = *info;
1455 unsigned start = info->start;
1456 unsigned count = info->count;
1457
1458 while (count) {
1459 unsigned this_count = count;
1460 unsigned step;
1461
1462 u_split_draw(info, max_verts, &this_count, &step);
1463
1464 local_info.start = start;
1465 local_info.count = this_count;
1466
1467 lima_draw_vbo_update(pctx, &local_info);
1468
1469 count -= step;
1470 start += step;
1471 }
1472 }
1473
1474 static void
1475 lima_draw_vbo(struct pipe_context *pctx,
1476 const struct pipe_draw_info *info)
1477 {
1478 /* check if draw mode and vertex/index count match,
1479 * otherwise gp will hang */
1480 if (!u_trim_pipe_prim(info->mode, (unsigned*)&info->count)) {
1481 debug_printf("draw mode and vertex/index count mismatch\n");
1482 return;
1483 }
1484
1485 struct lima_context *ctx = lima_context(pctx);
1486
1487 if (!ctx->vs || !ctx->fs) {
1488 debug_warn_once("no shader, skip draw\n");
1489 return;
1490 }
1491
1492 if (!lima_update_vs_state(ctx) || !lima_update_fs_state(ctx))
1493 return;
1494
1495 lima_dump_command_stream_print(
1496 ctx->vs->bo->map, ctx->vs->shader_size, false,
1497 "add vs at va %x\n", ctx->vs->bo->va);
1498
1499 lima_dump_command_stream_print(
1500 ctx->fs->bo->map, ctx->fs->shader_size, false,
1501 "add fs at va %x\n", ctx->fs->bo->va);
1502
1503 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->vs->bo, LIMA_SUBMIT_BO_READ);
1504 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->fs->bo, LIMA_SUBMIT_BO_READ);
1505
1506 if (info->index_size)
1507 lima_draw_vbo_indexed(pctx, info);
1508 else
1509 lima_draw_vbo_count(pctx, info);
1510 }
1511
1512 static void
1513 lima_finish_plbu_cmd(struct lima_context *ctx)
1514 {
1515 int i = 0;
1516 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + 2 * 4);
1517
1518 plbu_cmd[i++] = 0x00000000;
1519 plbu_cmd[i++] = 0x50000000; /* END */
1520
1521 ctx->plbu_cmd_array.size += i * 4;
1522 }
1523
1524 static void
1525 lima_pack_wb_zsbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1526 {
1527 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1528 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
1529 int level = fb->base.zsbuf->u.tex.level;
1530 uint32_t format = lima_format_get_pixel(fb->base.zsbuf->format);
1531
1532 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1533 wb[wb_idx].type = 0x01; /* 1 for depth, stencil */
1534 wb[wb_idx].address = res->bo->va + res->levels[level].offset;
1535 wb[wb_idx].pixel_format = format;
1536 if (res->tiled) {
1537 wb[wb_idx].pixel_layout = 0x2;
1538 wb[wb_idx].pitch = fb->tiled_w;
1539 } else {
1540 wb[wb_idx].pixel_layout = 0x0;
1541 wb[wb_idx].pitch = res->levels[level].stride / 8;
1542 }
1543 wb[wb_idx].mrt_bits = 0;
1544 }
1545
1546 static void
1547 lima_pack_wb_cbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1548 {
1549 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1550 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
1551 int level = fb->base.cbufs[0]->u.tex.level;
1552 unsigned layer = fb->base.cbufs[0]->u.tex.first_layer;
1553 uint32_t format = lima_format_get_pixel(fb->base.cbufs[0]->format);
1554 bool swap_channels = lima_format_get_swap_rb(fb->base.cbufs[0]->format);
1555
1556 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1557 wb[wb_idx].type = 0x02; /* 2 for color buffer */
1558 wb[wb_idx].address = res->bo->va + res->levels[level].offset + layer * res->levels[level].layer_stride;
1559 wb[wb_idx].pixel_format = format;
1560 if (res->tiled) {
1561 wb[wb_idx].pixel_layout = 0x2;
1562 wb[wb_idx].pitch = fb->tiled_w;
1563 } else {
1564 wb[wb_idx].pixel_layout = 0x0;
1565 wb[wb_idx].pitch = res->levels[level].stride / 8;
1566 }
1567 wb[wb_idx].mrt_bits = swap_channels ? 0x4 : 0x0;
1568 }
1569
1570
1571 static void
1572 lima_pack_pp_frame_reg(struct lima_context *ctx, uint32_t *frame_reg,
1573 uint32_t *wb_reg)
1574 {
1575 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1576 struct lima_pp_frame_reg *frame = (void *)frame_reg;
1577 struct lima_screen *screen = lima_screen(ctx->base.screen);
1578 int wb_idx = 0;
1579
1580 frame->render_address = screen->pp_buffer->va + pp_frame_rsw_offset;
1581 frame->flags = 0x02;
1582 frame->clear_value_depth = ctx->clear.depth;
1583 frame->clear_value_stencil = ctx->clear.stencil;
1584 frame->clear_value_color = ctx->clear.color_8pc;
1585 frame->clear_value_color_1 = ctx->clear.color_8pc;
1586 frame->clear_value_color_2 = ctx->clear.color_8pc;
1587 frame->clear_value_color_3 = ctx->clear.color_8pc;
1588 frame->one = 1;
1589
1590 frame->width = fb->base.width - 1;
1591 frame->height = fb->base.height - 1;
1592
1593 /* frame->fragment_stack_address is overwritten per-pp in the kernel
1594 * by the values of pp_frame.fragment_stack_address[i] */
1595
1596 /* These are "stack size" and "stack offset" shifted,
1597 * here they are assumed to be always the same. */
1598 frame->fragment_stack_size = ctx->pp_max_stack_size << 16 | ctx->pp_max_stack_size;
1599
1600 /* related with MSAA and different value when r4p0/r7p0 */
1601 frame->supersampled_height = fb->base.height * 2 - 1;
1602 frame->scale = 0xE0C;
1603
1604 frame->dubya = 0x77;
1605 frame->onscreen = 1;
1606 frame->blocking = (fb->shift_min << 28) | (fb->shift_h << 16) | fb->shift_w;
1607 frame->foureight = 0x8888;
1608
1609 if (fb->base.nr_cbufs && (ctx->resolve & PIPE_CLEAR_COLOR0))
1610 lima_pack_wb_cbuf_reg(ctx, wb_reg, wb_idx++);
1611
1612 if (fb->base.zsbuf &&
1613 (ctx->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)))
1614 lima_pack_wb_zsbuf_reg(ctx, wb_reg, wb_idx++);
1615 }
1616
1617 static void
1618 _lima_flush(struct lima_context *ctx, bool end_of_frame)
1619 {
1620 #define pp_stack_pp_size 0x400
1621
1622 lima_pack_head_plbu_cmd(ctx);
1623 lima_finish_plbu_cmd(ctx);
1624
1625 lima_update_submit_bo(ctx);
1626
1627 int vs_cmd_size = ctx->vs_cmd_array.size;
1628 uint32_t vs_cmd_va = 0;
1629
1630 if (vs_cmd_size) {
1631 void *vs_cmd =
1632 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_vs_cmd, vs_cmd_size);
1633 memcpy(vs_cmd, util_dynarray_begin(&ctx->vs_cmd_array), vs_cmd_size);
1634 util_dynarray_clear(&ctx->vs_cmd_array);
1635 vs_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_vs_cmd);
1636
1637 lima_dump_command_stream_print(
1638 vs_cmd, vs_cmd_size, false, "flush vs cmd at va %x\n", vs_cmd_va);
1639 lima_dump_vs_command_stream_print(vs_cmd, vs_cmd_size, vs_cmd_va);
1640 }
1641
1642 int plbu_cmd_size = ctx->plbu_cmd_array.size + ctx->plbu_cmd_head.size;
1643 void *plbu_cmd =
1644 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_plbu_cmd, plbu_cmd_size);
1645 memcpy(plbu_cmd,
1646 util_dynarray_begin(&ctx->plbu_cmd_head),
1647 ctx->plbu_cmd_head.size);
1648 memcpy(plbu_cmd + ctx->plbu_cmd_head.size,
1649 util_dynarray_begin(&ctx->plbu_cmd_array),
1650 ctx->plbu_cmd_array.size);
1651 util_dynarray_clear(&ctx->plbu_cmd_array);
1652 util_dynarray_clear(&ctx->plbu_cmd_head);
1653 uint32_t plbu_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_plbu_cmd);
1654
1655 lima_dump_command_stream_print(
1656 plbu_cmd, plbu_cmd_size, false, "flush plbu cmd at va %x\n", plbu_cmd_va);
1657 lima_dump_plbu_command_stream_print(plbu_cmd, plbu_cmd_size, plbu_cmd_va);
1658
1659 struct lima_screen *screen = lima_screen(ctx->base.screen);
1660 struct drm_lima_gp_frame gp_frame;
1661 struct lima_gp_frame_reg *gp_frame_reg = (void *)gp_frame.frame;
1662 gp_frame_reg->vs_cmd_start = vs_cmd_va;
1663 gp_frame_reg->vs_cmd_end = vs_cmd_va + vs_cmd_size;
1664 gp_frame_reg->plbu_cmd_start = plbu_cmd_va;
1665 gp_frame_reg->plbu_cmd_end = plbu_cmd_va + plbu_cmd_size;
1666 gp_frame_reg->tile_heap_start = ctx->gp_tile_heap[ctx->plb_index]->va;
1667 gp_frame_reg->tile_heap_end = ctx->gp_tile_heap[ctx->plb_index]->va + ctx->gp_tile_heap_size;
1668
1669 lima_dump_command_stream_print(
1670 &gp_frame, sizeof(gp_frame), false, "add gp frame\n");
1671
1672 if (!lima_submit_start(ctx->submit, LIMA_PIPE_GP, &gp_frame, sizeof(gp_frame)))
1673 fprintf(stderr, "gp submit error\n");
1674
1675 if (lima_dump_command_stream) {
1676 if (lima_submit_wait(ctx->submit, LIMA_PIPE_GP, PIPE_TIMEOUT_INFINITE)) {
1677 if (ctx->gp_output) {
1678 float *pos = lima_bo_map(ctx->gp_output);
1679 lima_dump_command_stream_print(
1680 pos, 4 * 4 * 16, true, "gl_pos dump at va %x\n",
1681 ctx->gp_output->va);
1682 }
1683
1684 uint32_t *plb = lima_bo_map(ctx->plb[ctx->plb_index]);
1685 lima_dump_command_stream_print(
1686 plb, LIMA_CTX_PLB_BLK_SIZE, false, "plb dump at va %x\n",
1687 ctx->plb[ctx->plb_index]->va);
1688 }
1689 else {
1690 fprintf(stderr, "gp submit wait error\n");
1691 exit(1);
1692 }
1693 }
1694
1695 uint32_t pp_stack_va = 0;
1696 if (ctx->pp_max_stack_size) {
1697 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_stack, screen->num_pp *
1698 ctx->pp_max_stack_size * pp_stack_pp_size);
1699 pp_stack_va = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_stack);
1700 }
1701
1702 lima_update_pp_stream(ctx);
1703
1704 struct lima_pp_stream_state *ps = &ctx->pp_stream;
1705 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI400) {
1706 struct drm_lima_m400_pp_frame pp_frame = {0};
1707 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1708 pp_frame.num_pp = screen->num_pp;
1709
1710 for (int i = 0; i < screen->num_pp; i++) {
1711 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1712 if (ctx->pp_max_stack_size)
1713 pp_frame.fragment_stack_address[i] = pp_stack_va +
1714 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1715 }
1716
1717 lima_dump_command_stream_print(
1718 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1719
1720 if (!lima_submit_start(ctx->submit, LIMA_PIPE_PP, &pp_frame, sizeof(pp_frame)))
1721 fprintf(stderr, "pp submit error\n");
1722 }
1723 else {
1724 struct drm_lima_m450_pp_frame pp_frame = {0};
1725 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1726 pp_frame.num_pp = screen->num_pp;
1727
1728 if (ctx->pp_max_stack_size)
1729 for (int i = 0; i < screen->num_pp; i++)
1730 pp_frame.fragment_stack_address[i] = pp_stack_va +
1731 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1732
1733 if (ps->bo) {
1734 for (int i = 0; i < screen->num_pp; i++)
1735 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1736 }
1737 else {
1738 pp_frame.use_dlbu = true;
1739
1740 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1741 pp_frame.dlbu_regs[0] = ctx->plb[ctx->plb_index]->va;
1742 pp_frame.dlbu_regs[1] = ((fb->tiled_h - 1) << 16) | (fb->tiled_w - 1);
1743 unsigned s = util_logbase2(LIMA_CTX_PLB_BLK_SIZE) - 7;
1744 pp_frame.dlbu_regs[2] = (s << 28) | (fb->shift_h << 16) | fb->shift_w;
1745 pp_frame.dlbu_regs[3] = ((fb->tiled_h - 1) << 24) | ((fb->tiled_w - 1) << 16);
1746 }
1747
1748 lima_dump_command_stream_print(
1749 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1750
1751 if (!lima_submit_start(ctx->submit, LIMA_PIPE_PP, &pp_frame, sizeof(pp_frame)))
1752 fprintf(stderr, "pp submit error\n");
1753 }
1754
1755 if (lima_dump_command_stream) {
1756 if (!lima_submit_wait(ctx->submit, LIMA_PIPE_PP, PIPE_TIMEOUT_INFINITE)) {
1757 fprintf(stderr, "pp wait error\n");
1758 exit(1);
1759 }
1760 }
1761
1762 ctx->plb_index = (ctx->plb_index + 1) % lima_ctx_num_plb;
1763
1764 if (ctx->framebuffer.base.nr_cbufs && (ctx->resolve & PIPE_CLEAR_COLOR0)) {
1765 /* Set reload flag for next draw. It'll be unset if buffer is cleared */
1766 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
1767 surf->reload = true;
1768 }
1769
1770 ctx->pp_max_stack_size = 0;
1771
1772 ctx->damage_rect.minx = ctx->damage_rect.miny = 0xffff;
1773 ctx->damage_rect.maxx = ctx->damage_rect.maxy = 0;
1774
1775 ctx->resolve = 0;
1776
1777 lima_dump_file_next();
1778 }
1779
1780 void
1781 lima_flush(struct lima_context *ctx)
1782 {
1783 if (!lima_ctx_dirty(ctx))
1784 return;
1785
1786 _lima_flush(ctx, false);
1787 }
1788
1789 static void
1790 lima_pipe_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
1791 unsigned flags)
1792 {
1793 struct lima_context *ctx = lima_context(pctx);
1794 if (lima_ctx_dirty(ctx))
1795 _lima_flush(ctx, flags & PIPE_FLUSH_END_OF_FRAME);
1796
1797 if (fence) {
1798 int drm_fd = lima_screen(ctx->base.screen)->fd;
1799 int fd;
1800
1801 if (!drmSyncobjExportSyncFile(drm_fd, ctx->out_sync[LIMA_PIPE_PP], &fd))
1802 *fence = lima_fence_create(fd);
1803 }
1804 }
1805
1806 void
1807 lima_draw_init(struct lima_context *ctx)
1808 {
1809 ctx->base.clear = lima_clear;
1810 ctx->base.draw_vbo = lima_draw_vbo;
1811 ctx->base.flush = lima_pipe_flush;
1812 }