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lima: fix PP stream terminator size
[mesa.git] / src / gallium / drivers / lima / lima_draw.c
1 /*
2 * Copyright (c) 2011-2013 Luc Verhaegen <libv@skynet.be>
3 * Copyright (c) 2017-2019 Lima Project
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include "util/u_math.h"
27 #include "util/format/u_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_half.h"
30 #include "util/u_helpers.h"
31 #include "util/u_inlines.h"
32 #include "util/u_pack_color.h"
33 #include "util/hash_table.h"
34 #include "util/u_split_draw.h"
35 #include "util/u_upload_mgr.h"
36 #include "util/u_prim.h"
37 #include "util/u_vbuf.h"
38
39 #include "lima_context.h"
40 #include "lima_screen.h"
41 #include "lima_resource.h"
42 #include "lima_program.h"
43 #include "lima_bo.h"
44 #include "lima_submit.h"
45 #include "lima_texture.h"
46 #include "lima_util.h"
47 #include "lima_fence.h"
48 #include "lima_format.h"
49
50 #include <drm-uapi/lima_drm.h>
51
52 struct lima_gp_frame_reg {
53 uint32_t vs_cmd_start;
54 uint32_t vs_cmd_end;
55 uint32_t plbu_cmd_start;
56 uint32_t plbu_cmd_end;
57 uint32_t tile_heap_start;
58 uint32_t tile_heap_end;
59 };
60
61 struct lima_pp_frame_reg {
62 uint32_t plbu_array_address;
63 uint32_t render_address;
64 uint32_t unused_0;
65 uint32_t flags;
66 uint32_t clear_value_depth;
67 uint32_t clear_value_stencil;
68 uint32_t clear_value_color;
69 uint32_t clear_value_color_1;
70 uint32_t clear_value_color_2;
71 uint32_t clear_value_color_3;
72 uint32_t width;
73 uint32_t height;
74 uint32_t fragment_stack_address;
75 uint32_t fragment_stack_size;
76 uint32_t unused_1;
77 uint32_t unused_2;
78 uint32_t one;
79 uint32_t supersampled_height;
80 uint32_t dubya;
81 uint32_t onscreen;
82 uint32_t blocking;
83 uint32_t scale;
84 uint32_t foureight;
85 };
86
87 struct lima_pp_wb_reg {
88 uint32_t type;
89 uint32_t address;
90 uint32_t pixel_format;
91 uint32_t downsample_factor;
92 uint32_t pixel_layout;
93 uint32_t pitch;
94 uint32_t mrt_bits;
95 uint32_t mrt_pitch;
96 uint32_t zero;
97 uint32_t unused0;
98 uint32_t unused1;
99 uint32_t unused2;
100 };
101
102 struct lima_render_state {
103 uint32_t blend_color_bg;
104 uint32_t blend_color_ra;
105 uint32_t alpha_blend;
106 uint32_t depth_test;
107 uint32_t depth_range;
108 uint32_t stencil_front;
109 uint32_t stencil_back;
110 uint32_t stencil_test;
111 uint32_t multi_sample;
112 uint32_t shader_address;
113 uint32_t varying_types;
114 uint32_t uniforms_address;
115 uint32_t textures_address;
116 uint32_t aux0;
117 uint32_t aux1;
118 uint32_t varyings_address;
119 };
120
121
122 /* plbu commands */
123 #define PLBU_CMD_BEGIN(max) { \
124 int i = 0, max_n = max; \
125 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + max_n * 4);
126
127 #define PLBU_CMD_END() \
128 assert(i <= max_n); \
129 ctx->plbu_cmd_array.size += i * 4; \
130 }
131
132 #define PLBU_CMD(v1, v2) \
133 do { \
134 plbu_cmd[i++] = v1; \
135 plbu_cmd[i++] = v2; \
136 } while (0)
137
138 #define PLBU_CMD_BLOCK_STEP(shift_min, shift_h, shift_w) \
139 PLBU_CMD(((shift_min) << 28) | ((shift_h) << 16) | (shift_w), 0x1000010C)
140 #define PLBU_CMD_TILED_DIMENSIONS(tiled_w, tiled_h) \
141 PLBU_CMD((((tiled_w) - 1) << 24) | (((tiled_h) - 1) << 8), 0x10000109)
142 #define PLBU_CMD_BLOCK_STRIDE(block_w) PLBU_CMD((block_w) & 0xff, 0x30000000)
143 #define PLBU_CMD_ARRAY_ADDRESS(gp_stream, block_num) \
144 PLBU_CMD(gp_stream, 0x28000000 | ((block_num) - 1) | 1)
145 #define PLBU_CMD_VIEWPORT_LEFT(v) PLBU_CMD(v, 0x10000107)
146 #define PLBU_CMD_VIEWPORT_RIGHT(v) PLBU_CMD(v, 0x10000108)
147 #define PLBU_CMD_VIEWPORT_BOTTOM(v) PLBU_CMD(v, 0x10000105)
148 #define PLBU_CMD_VIEWPORT_TOP(v) PLBU_CMD(v, 0x10000106)
149 #define PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN() PLBU_CMD(0x00010002, 0x60000000)
150 #define PLBU_CMD_ARRAYS_SEMAPHORE_END() PLBU_CMD(0x00010001, 0x60000000)
151 #define PLBU_CMD_PRIMITIVE_SETUP(prim, cull, index_size) \
152 PLBU_CMD(0x200 | (prim) | (cull) | ((index_size) << 9), 0x1000010B)
153 #define PLBU_CMD_RSW_VERTEX_ARRAY(rsw, gl_pos) \
154 PLBU_CMD(rsw, 0x80000000 | ((gl_pos) >> 4))
155 #define PLBU_CMD_SCISSORS(minx, maxx, miny, maxy) \
156 PLBU_CMD(((minx) << 30) | ((maxy) - 1) << 15 | (miny), \
157 0x70000000 | ((maxx) - 1) << 13 | ((minx) >> 2))
158 #define PLBU_CMD_UNKNOWN1() PLBU_CMD(0x00000000, 0x1000010A)
159 #define PLBU_CMD_UNKNOWN2() PLBU_CMD(0x00000200, 0x1000010B)
160 #define PLBU_CMD_LOW_PRIM_SIZE(v) PLBU_CMD(v, 0x1000010D)
161 #define PLBU_CMD_DEPTH_RANGE_NEAR(v) PLBU_CMD(v, 0x1000010E)
162 #define PLBU_CMD_DEPTH_RANGE_FAR(v) PLBU_CMD(v, 0x1000010F)
163 #define PLBU_CMD_INDEXED_DEST(gl_pos) PLBU_CMD(gl_pos, 0x10000100)
164 #define PLBU_CMD_INDEXED_PT_SIZE(pt_size) PLBU_CMD(pt_size, 0x10000102)
165 #define PLBU_CMD_INDICES(va) PLBU_CMD(va, 0x10000101)
166 #define PLBU_CMD_DRAW_ARRAYS(mode, start, count) \
167 PLBU_CMD(((count) << 24) | (start), (((mode) & 0x1F) << 16) | ((count) >> 8))
168 #define PLBU_CMD_DRAW_ELEMENTS(mode, start, count) \
169 PLBU_CMD(((count) << 24) | (start), \
170 0x00200000 | (((mode) & 0x1F) << 16) | ((count) >> 8))
171
172 /* vs commands */
173 #define VS_CMD_BEGIN(max) { \
174 int i = 0, max_n = max; \
175 uint32_t *vs_cmd = util_dynarray_ensure_cap(&ctx->vs_cmd_array, ctx->vs_cmd_array.size + max_n * 4);
176
177 #define VS_CMD_END() \
178 assert(i <= max_n); \
179 ctx->vs_cmd_array.size += i * 4; \
180 }
181
182 #define VS_CMD(v1, v2) \
183 do { \
184 vs_cmd[i++] = v1; \
185 vs_cmd[i++] = v2; \
186 } while (0)
187
188 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1() VS_CMD(0x00028000, 0x50000000)
189 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2() VS_CMD(0x00000001, 0x50000000)
190 #define VS_CMD_ARRAYS_SEMAPHORE_END(index_draw) \
191 VS_CMD((index_draw) ? 0x00018000 : 0x00000000, 0x50000000)
192 #define VS_CMD_UNIFORMS_ADDRESS(addr, size) \
193 VS_CMD(addr, 0x30000000 | ((size) << 12))
194 #define VS_CMD_SHADER_ADDRESS(addr, size) \
195 VS_CMD(addr, 0x40000000 | ((size) << 12))
196 #define VS_CMD_SHADER_INFO(prefetch, size) \
197 VS_CMD(((prefetch) << 20) | ((((size) >> 4) - 1) << 10), 0x10000040)
198 #define VS_CMD_VARYING_ATTRIBUTE_COUNT(nv, na) \
199 VS_CMD((((nv) - 1) << 8) | (((na) - 1) << 24), 0x10000042)
200 #define VS_CMD_UNKNOWN1() VS_CMD(0x00000003, 0x10000041)
201 #define VS_CMD_UNKNOWN2() VS_CMD(0x00000000, 0x60000000)
202 #define VS_CMD_ATTRIBUTES_ADDRESS(addr, na) \
203 VS_CMD(addr, 0x20000000 | ((na) << 17))
204 #define VS_CMD_VARYINGS_ADDRESS(addr, nv) \
205 VS_CMD(addr, 0x20000008 | ((nv) << 17))
206 #define VS_CMD_DRAW(num, index_draw) \
207 VS_CMD(((num) << 24) | ((index_draw) ? 1 : 0), ((num) >> 8))
208
209 static inline bool
210 lima_ctx_dirty(struct lima_context *ctx)
211 {
212 return ctx->plbu_cmd_array.size;
213 }
214
215 static inline struct lima_damage_region *
216 lima_ctx_get_damage(struct lima_context *ctx)
217 {
218 if (!ctx->framebuffer.base.nr_cbufs)
219 return NULL;
220
221 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
222 struct lima_resource *res = lima_resource(surf->base.texture);
223 return &res->damage;
224 }
225
226 static bool
227 lima_fb_need_reload(struct lima_context *ctx)
228 {
229 /* Depth buffer is always discarded */
230 if (!ctx->framebuffer.base.nr_cbufs)
231 return false;
232
233 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
234 struct lima_resource *res = lima_resource(surf->base.texture);
235 if (res->damage.region) {
236 /* for EGL_KHR_partial_update, when EGL_EXT_buffer_age is enabled,
237 * we need to reload damage region, otherwise just want to reload
238 * the region not aligned to tile boundary */
239 //if (!res->damage.aligned)
240 // return true;
241 return true;
242 }
243 else if (surf->reload)
244 return true;
245
246 return false;
247 }
248
249 static void
250 lima_pack_reload_plbu_cmd(struct lima_context *ctx)
251 {
252 #define lima_reload_render_state_offset 0x0000
253 #define lima_reload_gl_pos_offset 0x0040
254 #define lima_reload_varying_offset 0x0080
255 #define lima_reload_tex_desc_offset 0x00c0
256 #define lima_reload_tex_array_offset 0x0100
257 #define lima_reload_buffer_size 0x0140
258
259 void *cpu;
260 unsigned offset;
261 struct pipe_resource *pres = NULL;
262 u_upload_alloc(ctx->uploader, 0, lima_reload_buffer_size,
263 0x40, &offset, &pres, &cpu);
264
265 struct lima_resource *res = lima_resource(pres);
266 uint32_t va = res->bo->va + offset;
267
268 struct lima_screen *screen = lima_screen(ctx->base.screen);
269
270 uint32_t reload_shader_first_instr_size =
271 ((uint32_t *)(screen->pp_buffer->map + pp_reload_program_offset))[0] & 0x1f;
272 uint32_t reload_shader_va = screen->pp_buffer->va + pp_reload_program_offset;
273
274 struct lima_render_state reload_render_state = {
275 .alpha_blend = 0xf03b1ad2,
276 .depth_test = 0x0000000e,
277 .depth_range = 0xffff0000,
278 .stencil_front = 0x00000007,
279 .stencil_back = 0x00000007,
280 .multi_sample = 0x0000f007,
281 .shader_address = reload_shader_va | reload_shader_first_instr_size,
282 .varying_types = 0x00000001,
283 .textures_address = va + lima_reload_tex_array_offset,
284 .aux0 = 0x00004021,
285 .varyings_address = va + lima_reload_varying_offset,
286 };
287 memcpy(cpu + lima_reload_render_state_offset, &reload_render_state,
288 sizeof(reload_render_state));
289
290 struct lima_context_framebuffer *fb = &ctx->framebuffer;
291 lima_tex_desc *td = cpu + lima_reload_tex_desc_offset;
292 memset(td, 0, lima_min_tex_desc_size);
293 lima_texture_desc_set_res(ctx, td, fb->base.cbufs[0]->texture, 0, 0);
294 td->unnorm_coords = 1;
295 td->texture_type = LIMA_TEXTURE_TYPE_2D;
296 td->min_img_filter_nearest = 1;
297 td->mag_img_filter_nearest = 1;
298 td->wrap_s_clamp_to_edge = 1;
299 td->wrap_t_clamp_to_edge = 1;
300 td->unknown_2_2 = 0x1;
301
302 uint32_t *ta = cpu + lima_reload_tex_array_offset;
303 ta[0] = va + lima_reload_tex_desc_offset;
304
305 float reload_gl_pos[] = {
306 fb->base.width, 0, 0, 1,
307 0, 0, 0, 1,
308 0, fb->base.height, 0, 1,
309 };
310 memcpy(cpu + lima_reload_gl_pos_offset, reload_gl_pos,
311 sizeof(reload_gl_pos));
312
313 float reload_varying[] = {
314 fb->base.width, 0, 0, 0,
315 0, fb->base.height, 0, 0,
316 };
317 memcpy(cpu + lima_reload_varying_offset, reload_varying,
318 sizeof(reload_varying));
319
320 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
321 pipe_resource_reference(&pres, NULL);
322
323 PLBU_CMD_BEGIN(20);
324
325 PLBU_CMD_VIEWPORT_LEFT(0);
326 PLBU_CMD_VIEWPORT_RIGHT(fui(fb->base.width));
327 PLBU_CMD_VIEWPORT_BOTTOM(0);
328 PLBU_CMD_VIEWPORT_TOP(fui(fb->base.height));
329
330 PLBU_CMD_RSW_VERTEX_ARRAY(
331 va + lima_reload_render_state_offset,
332 va + lima_reload_gl_pos_offset);
333
334 PLBU_CMD_UNKNOWN2();
335 PLBU_CMD_UNKNOWN1();
336
337 PLBU_CMD_INDICES(screen->pp_buffer->va + pp_shared_index_offset);
338 PLBU_CMD_INDEXED_DEST(va + lima_reload_gl_pos_offset);
339 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
340
341 PLBU_CMD_END();
342 }
343
344 static void
345 lima_pack_head_plbu_cmd(struct lima_context *ctx)
346 {
347 /* first draw need create a PLBU command header */
348 if (lima_ctx_dirty(ctx))
349 return;
350
351 struct lima_context_framebuffer *fb = &ctx->framebuffer;
352
353 PLBU_CMD_BEGIN(10);
354
355 PLBU_CMD_UNKNOWN2();
356 PLBU_CMD_BLOCK_STEP(fb->shift_min, fb->shift_h, fb->shift_w);
357 PLBU_CMD_TILED_DIMENSIONS(fb->tiled_w, fb->tiled_h);
358 PLBU_CMD_BLOCK_STRIDE(fb->block_w);
359
360 PLBU_CMD_ARRAY_ADDRESS(
361 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size,
362 fb->block_w * fb->block_h);
363
364 PLBU_CMD_END();
365
366 if (lima_fb_need_reload(ctx))
367 lima_pack_reload_plbu_cmd(ctx);
368 }
369
370 static bool
371 lima_is_scissor_zero(struct lima_context *ctx)
372 {
373 if (!ctx->rasterizer || !ctx->rasterizer->base.scissor)
374 return false;
375
376 struct pipe_scissor_state *scissor = &ctx->scissor;
377 return
378 scissor->minx == scissor->maxx
379 && scissor->miny == scissor->maxy;
380 }
381
382 static void
383 hilbert_rotate(int n, int *x, int *y, int rx, int ry)
384 {
385 if (ry == 0) {
386 if (rx == 1) {
387 *x = n-1 - *x;
388 *y = n-1 - *y;
389 }
390
391 /* Swap x and y */
392 int t = *x;
393 *x = *y;
394 *y = t;
395 }
396 }
397
398 static void
399 hilbert_coords(int n, int d, int *x, int *y)
400 {
401 int rx, ry, i, t=d;
402
403 *x = *y = 0;
404
405 for (i = 0; (1 << i) < n; i++) {
406
407 rx = 1 & (t / 2);
408 ry = 1 & (t ^ rx);
409
410 hilbert_rotate(1 << i, x, y, rx, ry);
411
412 *x += rx << i;
413 *y += ry << i;
414
415 t /= 4;
416 }
417 }
418
419 static int
420 lima_get_pp_stream_size(int num_pp, int tiled_w, int tiled_h, uint32_t *off)
421 {
422 /* carefully calculate each stream start address:
423 * 1. overflow: each stream size may be different due to
424 * fb->tiled_w * fb->tiled_h can't be divided by num_pp,
425 * extra size should be added to the preceeding stream
426 * 2. alignment: each stream address should be 0x20 aligned
427 */
428 int delta = tiled_w * tiled_h / num_pp * 16 + 16;
429 int remain = tiled_w * tiled_h % num_pp;
430 int offset = 0;
431
432 for (int i = 0; i < num_pp; i++) {
433 off[i] = offset;
434
435 offset += delta;
436 if (remain) {
437 offset += 16;
438 remain--;
439 }
440 offset = align(offset, 0x20);
441 }
442
443 return offset;
444 }
445
446 static bool
447 inside_damage_region(int x, int y, struct lima_damage_region *ds)
448 {
449 if (!ds || !ds->region)
450 return true;
451
452 for (int i = 0; i < ds->num_region; i++) {
453 struct pipe_scissor_state *ss = ds->region + i;
454 if (x >= ss->minx && x < ss->maxx &&
455 y >= ss->miny && y < ss->maxy)
456 return true;
457 }
458
459 return false;
460 }
461
462 static void
463 lima_generate_pp_stream(struct lima_context *ctx, int off_x, int off_y,
464 int tiled_w, int tiled_h)
465 {
466 struct lima_pp_stream_state *ps = &ctx->pp_stream;
467 struct lima_context_framebuffer *fb = &ctx->framebuffer;
468 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
469 struct lima_screen *screen = lima_screen(ctx->base.screen);
470 int i, num_pp = screen->num_pp;
471
472 /* use hilbert_coords to generates 1D to 2D relationship.
473 * 1D for pp stream index and 2D for plb block x/y on framebuffer.
474 * if multi pp, interleave the 1D index to make each pp's render target
475 * close enough which should result close workload
476 */
477 int max = MAX2(tiled_w, tiled_h);
478 int index = 0;
479 uint32_t *stream[4];
480 int si[4] = {0};
481 int dim = 0;
482 int count = 0;
483
484 /* Don't update count if we get zero rect. We'll just generate
485 * PP stream with just terminators in it.
486 */
487 if ((tiled_w * tiled_h) != 0) {
488 dim = util_logbase2_ceil(max);
489 count = 1 << (dim + dim);
490 }
491
492 for (i = 0; i < num_pp; i++)
493 stream[i] = ps->bo->map + ps->bo_offset + ps->offset[i];
494
495 for (i = 0; i < count; i++) {
496 int x, y;
497 hilbert_coords(max, i, &x, &y);
498 if (x < tiled_w && y < tiled_h) {
499 x += off_x;
500 y += off_y;
501
502 if (!inside_damage_region(x, y, damage))
503 continue;
504
505 int pp = index % num_pp;
506 int offset = ((y >> fb->shift_h) * fb->block_w +
507 (x >> fb->shift_w)) * LIMA_CTX_PLB_BLK_SIZE;
508 int plb_va = ctx->plb[ctx->plb_index]->va + offset;
509
510 stream[pp][si[pp]++] = 0;
511 stream[pp][si[pp]++] = 0xB8000000 | x | (y << 8);
512 stream[pp][si[pp]++] = 0xE0000002 | ((plb_va >> 3) & ~0xE0000003);
513 stream[pp][si[pp]++] = 0xB0000000;
514
515 index++;
516 }
517 }
518
519 for (i = 0; i < num_pp; i++) {
520 stream[i][si[i]++] = 0;
521 stream[i][si[i]++] = 0xBC000000;
522 stream[i][si[i]++] = 0;
523 stream[i][si[i]++] = 0;
524
525 lima_dump_command_stream_print(
526 stream[i], si[i] * 4, false, "pp plb stream %d at va %x\n",
527 i, ps->bo->va + ps->bo_offset + ps->offset[i]);
528 }
529 }
530
531 static void
532 lima_update_damage_pp_stream(struct lima_context *ctx)
533 {
534 struct lima_damage_region *ds = lima_ctx_get_damage(ctx);
535 struct lima_context_framebuffer *fb = &ctx->framebuffer;
536 struct pipe_scissor_state bound;
537
538 if (ds && ds->region) {
539 struct pipe_scissor_state *dbound = &ds->bound;
540 bound.minx = MAX2(dbound->minx, ctx->damage_rect.minx >> 4);
541 bound.miny = MAX2(dbound->miny, ctx->damage_rect.miny >> 4);
542 bound.maxx = MIN2(dbound->maxx, (ctx->damage_rect.maxx + 0xf) >> 4);
543 bound.maxy = MIN2(dbound->maxy, (ctx->damage_rect.maxy + 0xf) >> 4);
544 } else {
545 bound.minx = ctx->damage_rect.minx >> 4;
546 bound.miny = ctx->damage_rect.miny >> 4;
547 bound.maxx = (ctx->damage_rect.maxx + 0xf) >> 4;
548 bound.maxy = (ctx->damage_rect.maxy + 0xf) >> 4;
549 }
550
551 /* Clamp to FB size */
552 bound.minx = MIN2(bound.minx, fb->tiled_w);
553 bound.miny = MIN2(bound.miny, fb->tiled_h);
554 bound.maxx = MIN2(bound.maxx, fb->tiled_w);
555 bound.maxy = MIN2(bound.maxy, fb->tiled_h);
556
557 int tiled_w = bound.maxx - bound.minx;
558 int tiled_h = bound.maxy - bound.miny;
559
560 struct lima_screen *screen = lima_screen(ctx->base.screen);
561 int size = lima_get_pp_stream_size(
562 screen->num_pp, tiled_w, tiled_h, ctx->pp_stream.offset);
563
564 void *cpu;
565 unsigned offset;
566 struct pipe_resource *pres = NULL;
567 u_upload_alloc(ctx->uploader, 0, size, 0x40, &offset, &pres, &cpu);
568
569 struct lima_resource *res = lima_resource(pres);
570 ctx->pp_stream.bo = res->bo;
571 ctx->pp_stream.bo_offset = offset;
572
573 lima_generate_pp_stream(ctx, bound.minx, bound.miny, tiled_w, tiled_h);
574
575 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
576 pipe_resource_reference(&pres, NULL);
577 }
578
579 static void
580 lima_update_full_pp_stream(struct lima_context *ctx)
581 {
582 struct lima_context_framebuffer *fb = &ctx->framebuffer;
583 struct lima_ctx_plb_pp_stream_key key = {
584 .plb_index = ctx->plb_index,
585 .tiled_w = fb->tiled_w,
586 .tiled_h = fb->tiled_h,
587 };
588
589 struct hash_entry *entry =
590 _mesa_hash_table_search(ctx->plb_pp_stream, &key);
591 struct lima_ctx_plb_pp_stream *s = entry->data;
592
593 if (s->bo) {
594 ctx->pp_stream.bo = s->bo;
595 ctx->pp_stream.bo_offset = 0;
596 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
597 }
598 else {
599 struct lima_screen *screen = lima_screen(ctx->base.screen);
600 int size = lima_get_pp_stream_size(
601 screen->num_pp, fb->tiled_w, fb->tiled_h, s->offset);
602 s->bo = lima_bo_create(screen, size, 0);
603 lima_bo_map(s->bo);
604
605 ctx->pp_stream.bo = s->bo;
606 ctx->pp_stream.bo_offset = 0;
607 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
608
609 lima_generate_pp_stream(ctx, 0, 0, fb->tiled_w, fb->tiled_h);
610 }
611
612 lima_submit_add_bo(ctx->pp_submit, s->bo, LIMA_SUBMIT_BO_READ);
613 }
614
615 static bool
616 lima_damage_fullscreen(struct lima_context *ctx)
617 {
618 return ctx->damage_rect.minx == 0 &&
619 ctx->damage_rect.miny == 0 &&
620 ctx->damage_rect.maxx == ctx->framebuffer.base.width &&
621 ctx->damage_rect.maxy == ctx->framebuffer.base.height;
622 }
623
624 static void
625 lima_update_pp_stream(struct lima_context *ctx)
626 {
627 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
628 if ((damage && damage->region) || !lima_damage_fullscreen(ctx))
629 lima_update_damage_pp_stream(ctx);
630 else if (ctx->plb_pp_stream)
631 lima_update_full_pp_stream(ctx);
632 else
633 ctx->pp_stream.bo = NULL;
634 }
635
636 static void
637 lima_update_submit_bo(struct lima_context *ctx)
638 {
639 if (lima_ctx_dirty(ctx))
640 return;
641
642 struct lima_screen *screen = lima_screen(ctx->base.screen);
643 lima_submit_add_bo(ctx->gp_submit, ctx->plb_gp_stream, LIMA_SUBMIT_BO_READ);
644 lima_submit_add_bo(ctx->gp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
645 lima_submit_add_bo(ctx->gp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
646
647 lima_dump_command_stream_print(
648 ctx->plb_gp_stream->map + ctx->plb_index * ctx->plb_gp_size,
649 ctx->plb_gp_size, false, "gp plb stream at va %x\n",
650 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size);
651
652 if (ctx->framebuffer.base.nr_cbufs) {
653 struct lima_resource *res = lima_resource(ctx->framebuffer.base.cbufs[0]->texture);
654 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
655 }
656 if (ctx->framebuffer.base.zsbuf) {
657 struct lima_resource *res = lima_resource(ctx->framebuffer.base.zsbuf->texture);
658 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
659 }
660 lima_submit_add_bo(ctx->pp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_READ);
661 lima_submit_add_bo(ctx->pp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_READ);
662 lima_submit_add_bo(ctx->pp_submit, screen->pp_buffer, LIMA_SUBMIT_BO_READ);
663 }
664
665 static void
666 lima_damage_rect_union(struct lima_context *ctx, unsigned minx, unsigned maxx, unsigned miny, unsigned maxy)
667 {
668 ctx->damage_rect.minx = MIN2(ctx->damage_rect.minx, minx);
669 ctx->damage_rect.miny = MIN2(ctx->damage_rect.miny, miny);
670 ctx->damage_rect.maxx = MAX2(ctx->damage_rect.maxx, maxx);
671 ctx->damage_rect.maxy = MAX2(ctx->damage_rect.maxy, maxy);
672 }
673
674 static void
675 lima_clear(struct pipe_context *pctx, unsigned buffers,
676 const union pipe_color_union *color, double depth, unsigned stencil)
677 {
678 struct lima_context *ctx = lima_context(pctx);
679
680 lima_flush(ctx);
681
682 /* no need to reload if cleared */
683 if (ctx->framebuffer.base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0)) {
684 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
685 surf->reload = false;
686 }
687
688 struct lima_context_clear *clear = &ctx->clear;
689 clear->buffers = buffers;
690
691 if (buffers & PIPE_CLEAR_COLOR0) {
692 clear->color_8pc =
693 ((uint32_t)float_to_ubyte(color->f[3]) << 24) |
694 ((uint32_t)float_to_ubyte(color->f[2]) << 16) |
695 ((uint32_t)float_to_ubyte(color->f[1]) << 8) |
696 float_to_ubyte(color->f[0]);
697
698 clear->color_16pc =
699 ((uint64_t)float_to_ushort(color->f[3]) << 48) |
700 ((uint64_t)float_to_ushort(color->f[2]) << 32) |
701 ((uint64_t)float_to_ushort(color->f[1]) << 16) |
702 float_to_ushort(color->f[0]);
703 }
704
705 if (buffers & PIPE_CLEAR_DEPTH)
706 clear->depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
707
708 if (buffers & PIPE_CLEAR_STENCIL)
709 clear->stencil = stencil;
710
711 lima_update_submit_bo(ctx);
712
713 lima_pack_head_plbu_cmd(ctx);
714
715 ctx->dirty |= LIMA_CONTEXT_DIRTY_CLEAR;
716
717 lima_damage_rect_union(ctx, 0, ctx->framebuffer.base.width,
718 0, ctx->framebuffer.base.height);
719 }
720
721 enum lima_attrib_type {
722 LIMA_ATTRIB_FLOAT = 0x000,
723 /* todo: find out what lives here. */
724 LIMA_ATTRIB_I16 = 0x004,
725 LIMA_ATTRIB_U16 = 0x005,
726 LIMA_ATTRIB_I8 = 0x006,
727 LIMA_ATTRIB_U8 = 0x007,
728 LIMA_ATTRIB_I8N = 0x008,
729 LIMA_ATTRIB_U8N = 0x009,
730 LIMA_ATTRIB_I16N = 0x00A,
731 LIMA_ATTRIB_U16N = 0x00B,
732 /* todo: where is the 32 int */
733 /* todo: find out what lives here. */
734 LIMA_ATTRIB_FIXED = 0x101
735 };
736
737 static enum lima_attrib_type
738 lima_pipe_format_to_attrib_type(enum pipe_format format)
739 {
740 const struct util_format_description *desc = util_format_description(format);
741 int i = util_format_get_first_non_void_channel(format);
742 const struct util_format_channel_description *c = desc->channel + i;
743
744 switch (c->type) {
745 case UTIL_FORMAT_TYPE_FLOAT:
746 return LIMA_ATTRIB_FLOAT;
747 case UTIL_FORMAT_TYPE_FIXED:
748 return LIMA_ATTRIB_FIXED;
749 case UTIL_FORMAT_TYPE_SIGNED:
750 if (c->size == 8) {
751 if (c->normalized)
752 return LIMA_ATTRIB_I8N;
753 else
754 return LIMA_ATTRIB_I8;
755 }
756 else if (c->size == 16) {
757 if (c->normalized)
758 return LIMA_ATTRIB_I16N;
759 else
760 return LIMA_ATTRIB_I16;
761 }
762 break;
763 case UTIL_FORMAT_TYPE_UNSIGNED:
764 if (c->size == 8) {
765 if (c->normalized)
766 return LIMA_ATTRIB_U8N;
767 else
768 return LIMA_ATTRIB_U8;
769 }
770 else if (c->size == 16) {
771 if (c->normalized)
772 return LIMA_ATTRIB_U16N;
773 else
774 return LIMA_ATTRIB_U16;
775 }
776 break;
777 }
778
779 return LIMA_ATTRIB_FLOAT;
780 }
781
782 static void
783 lima_pack_vs_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
784 {
785 VS_CMD_BEGIN(24);
786
787 if (!info->index_size) {
788 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1();
789 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2();
790 }
791
792 int uniform_size = ctx->vs->uniform_pending_offset + ctx->vs->constant_size + 32;
793 VS_CMD_UNIFORMS_ADDRESS(
794 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, LIMA_CTX_BUFF_SUBMIT_GP),
795 align(uniform_size, 16));
796
797 VS_CMD_SHADER_ADDRESS(ctx->vs->bo->va, ctx->vs->shader_size);
798 VS_CMD_SHADER_INFO(ctx->vs->prefetch, ctx->vs->shader_size);
799
800 int num_outputs = ctx->vs->num_outputs;
801 int num_attributes = ctx->vertex_elements->num_elements;
802 VS_CMD_VARYING_ATTRIBUTE_COUNT(num_outputs, MAX2(1, num_attributes));
803
804 VS_CMD_UNKNOWN1();
805
806 VS_CMD_ATTRIBUTES_ADDRESS(
807 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, LIMA_CTX_BUFF_SUBMIT_GP),
808 MAX2(1, num_attributes));
809
810 VS_CMD_VARYINGS_ADDRESS(
811 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, LIMA_CTX_BUFF_SUBMIT_GP),
812 num_outputs);
813
814 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
815 VS_CMD_DRAW(num, info->index_size);
816
817 VS_CMD_UNKNOWN2();
818
819 VS_CMD_ARRAYS_SEMAPHORE_END(info->index_size);
820
821 VS_CMD_END();
822 }
823
824 static void
825 lima_pack_plbu_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
826 {
827 struct lima_context_framebuffer *fb = &ctx->framebuffer;
828 struct lima_vs_shader_state *vs = ctx->vs;
829
830 lima_pack_head_plbu_cmd(ctx);
831
832 /* If it's zero scissor, we skip adding all other commands */
833 if (lima_is_scissor_zero(ctx))
834 return;
835
836 PLBU_CMD_BEGIN(32);
837
838 PLBU_CMD_VIEWPORT_LEFT(fui(ctx->viewport.left));
839 PLBU_CMD_VIEWPORT_RIGHT(fui(ctx->viewport.right));
840 PLBU_CMD_VIEWPORT_BOTTOM(fui(ctx->viewport.bottom));
841 PLBU_CMD_VIEWPORT_TOP(fui(ctx->viewport.top));
842
843 if (!info->index_size)
844 PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN();
845
846 int cf = ctx->rasterizer->base.cull_face;
847 int ccw = ctx->rasterizer->base.front_ccw;
848 uint32_t cull = 0;
849 if (cf != PIPE_FACE_NONE) {
850 if (cf & PIPE_FACE_FRONT)
851 cull |= ccw ? 0x00040000 : 0x00020000;
852 if (cf & PIPE_FACE_BACK)
853 cull |= ccw ? 0x00020000 : 0x00040000;
854 }
855
856 if (info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx != -1)
857 PLBU_CMD_PRIMITIVE_SETUP(0x0000, cull, info->index_size);
858 else if (info->mode < PIPE_PRIM_TRIANGLES)
859 PLBU_CMD_PRIMITIVE_SETUP(0x3000, cull, info->index_size);
860 else
861 PLBU_CMD_PRIMITIVE_SETUP(0x2000, cull, info->index_size);
862
863 PLBU_CMD_RSW_VERTEX_ARRAY(
864 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, LIMA_CTX_BUFF_SUBMIT_PP),
865 ctx->gp_output->va);
866
867 /* TODO
868 * - we should set it only for the first draw that enabled the scissor and for
869 * latter draw only if scissor is dirty
870 */
871 if (ctx->rasterizer->base.scissor) {
872 struct pipe_scissor_state *scissor = &ctx->scissor;
873 PLBU_CMD_SCISSORS(scissor->minx, scissor->maxx, scissor->miny, scissor->maxy);
874 lima_damage_rect_union(ctx, scissor->minx, scissor->maxx,
875 scissor->miny, scissor->maxy);
876 } else {
877 PLBU_CMD_SCISSORS(0, fb->base.width, 0, fb->base.height);
878 lima_damage_rect_union(ctx, 0, fb->base.width, 0, fb->base.height);
879 }
880
881 PLBU_CMD_UNKNOWN1();
882
883 PLBU_CMD_DEPTH_RANGE_NEAR(fui(ctx->viewport.near));
884 PLBU_CMD_DEPTH_RANGE_FAR(fui(ctx->viewport.far));
885
886 if ((info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx == -1) ||
887 ((info->mode >= PIPE_PRIM_LINES) && (info->mode < PIPE_PRIM_TRIANGLES)))
888 {
889 uint32_t v = info->mode == PIPE_PRIM_POINTS ?
890 fui(ctx->rasterizer->base.point_size) : fui(ctx->rasterizer->base.line_width);
891 PLBU_CMD_LOW_PRIM_SIZE(v);
892 }
893
894 if (info->index_size) {
895 PLBU_CMD_INDEXED_DEST(ctx->gp_output->va);
896 if (vs->point_size_idx != -1)
897 PLBU_CMD_INDEXED_PT_SIZE(ctx->gp_output->va + ctx->gp_output_point_size_offt);
898
899 PLBU_CMD_INDICES(ctx->index_res->bo->va + info->start * info->index_size + ctx->index_offset);
900 }
901 else {
902 /* can this make the attribute info static? */
903 PLBU_CMD_DRAW_ARRAYS(info->mode, info->start, info->count);
904 }
905
906 PLBU_CMD_ARRAYS_SEMAPHORE_END();
907
908 if (info->index_size)
909 PLBU_CMD_DRAW_ELEMENTS(info->mode, ctx->min_index, info->count);
910
911 PLBU_CMD_END();
912 }
913
914 static int
915 lima_blend_func(enum pipe_blend_func pipe)
916 {
917 switch (pipe) {
918 case PIPE_BLEND_ADD:
919 return 2;
920 case PIPE_BLEND_SUBTRACT:
921 return 0;
922 case PIPE_BLEND_REVERSE_SUBTRACT:
923 return 1;
924 case PIPE_BLEND_MIN:
925 return 4;
926 case PIPE_BLEND_MAX:
927 return 5;
928 }
929 return -1;
930 }
931
932 static int
933 lima_blend_factor(enum pipe_blendfactor pipe)
934 {
935 switch (pipe) {
936 case PIPE_BLENDFACTOR_ONE:
937 return 11;
938 case PIPE_BLENDFACTOR_SRC_COLOR:
939 return 0;
940 case PIPE_BLENDFACTOR_SRC_ALPHA:
941 return 16;
942 case PIPE_BLENDFACTOR_DST_ALPHA:
943 return 17;
944 case PIPE_BLENDFACTOR_DST_COLOR:
945 return 1;
946 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
947 return 7;
948 case PIPE_BLENDFACTOR_CONST_COLOR:
949 return 2;
950 case PIPE_BLENDFACTOR_CONST_ALPHA:
951 return 18;
952 case PIPE_BLENDFACTOR_ZERO:
953 return 3;
954 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
955 return 8;
956 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
957 return 24;
958 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
959 return 25;
960 case PIPE_BLENDFACTOR_INV_DST_COLOR:
961 return 9;
962 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
963 return 10;
964 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
965 return 26;
966 case PIPE_BLENDFACTOR_SRC1_COLOR:
967 case PIPE_BLENDFACTOR_SRC1_ALPHA:
968 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
969 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
970 return -1; /* not support */
971 }
972 return -1;
973 }
974
975 static int
976 lima_calculate_alpha_blend(enum pipe_blend_func rgb_func, enum pipe_blend_func alpha_func,
977 enum pipe_blendfactor rgb_src_factor, enum pipe_blendfactor rgb_dst_factor,
978 enum pipe_blendfactor alpha_src_factor, enum pipe_blendfactor alpha_dst_factor)
979 {
980 return lima_blend_func(rgb_func) |
981 (lima_blend_func(alpha_func) << 3) |
982 (lima_blend_factor(rgb_src_factor) << 6) |
983 (lima_blend_factor(rgb_dst_factor) << 11) |
984 ((lima_blend_factor(alpha_src_factor) & 0xF) << 16) |
985 ((lima_blend_factor(alpha_dst_factor) & 0xF) << 20) |
986 0x0C000000; /* need check if this GLESv1 glAlphaFunc */
987 }
988
989 #if 0
990 static int
991 lima_stencil_op(enum pipe_stencil_op pipe)
992 {
993 switch (pipe) {
994 case PIPE_STENCIL_OP_KEEP:
995 return 0;
996 case PIPE_STENCIL_OP_ZERO:
997 return 2;
998 case PIPE_STENCIL_OP_REPLACE:
999 return 1;
1000 case PIPE_STENCIL_OP_INCR:
1001 return 6;
1002 case PIPE_STENCIL_OP_DECR:
1003 return 7;
1004 case PIPE_STENCIL_OP_INCR_WRAP:
1005 return 4;
1006 case PIPE_STENCIL_OP_DECR_WRAP:
1007 return 5;
1008 case PIPE_STENCIL_OP_INVERT:
1009 return 3;
1010 }
1011 return -1;
1012 }
1013 #endif
1014
1015 static int
1016 lima_calculate_depth_test(struct pipe_depth_state *depth, struct pipe_rasterizer_state *rst)
1017 {
1018 enum pipe_compare_func func = (depth->enabled ? depth->func : PIPE_FUNC_ALWAYS);
1019
1020 int offset_scale = 0;
1021
1022 //TODO: implement polygon offset
1023 #if 0
1024 if (rst->offset_scale < -32)
1025 offset_scale = -32;
1026 else if (rst->offset_scale > 31)
1027 offset_scale = 31;
1028 else
1029 offset_scale = rst->offset_scale * 4;
1030
1031 if (offset_scale < 0)
1032 offset_scale = 0x100 + offset_scale;
1033 #endif
1034
1035 return (depth->enabled && depth->writemask) |
1036 ((int)func << 1) |
1037 (offset_scale << 16) |
1038 0x30; /* find out what is this */
1039 }
1040
1041 static void
1042 lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *info)
1043 {
1044 struct lima_render_state *render =
1045 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_plb_rsw,
1046 sizeof(*render));
1047
1048 /* do hw support RGBA independ blend?
1049 * PIPE_CAP_INDEP_BLEND_ENABLE
1050 *
1051 * how to handle the no cbuf only zbuf case?
1052 */
1053 struct pipe_rt_blend_state *rt = ctx->blend->base.rt;
1054 render->blend_color_bg = float_to_ubyte(ctx->blend_color.color[2]) |
1055 (float_to_ubyte(ctx->blend_color.color[1]) << 16);
1056 render->blend_color_ra = float_to_ubyte(ctx->blend_color.color[0]) |
1057 (float_to_ubyte(ctx->blend_color.color[3]) << 16);
1058
1059 if (rt->blend_enable) {
1060 render->alpha_blend = lima_calculate_alpha_blend(rt->rgb_func, rt->alpha_func,
1061 rt->rgb_src_factor, rt->rgb_dst_factor,
1062 rt->alpha_src_factor, rt->alpha_dst_factor);
1063 }
1064 else {
1065 /*
1066 * Special handling for blending disabled.
1067 * Binary driver is generating the same alpha_value,
1068 * as when we would just enable blending, without changing/setting any blend equation/params.
1069 * Normaly in this case mesa would set all rt fields (func/factor) to zero.
1070 */
1071 render->alpha_blend = lima_calculate_alpha_blend(PIPE_BLEND_ADD, PIPE_BLEND_ADD,
1072 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO,
1073 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO);
1074 }
1075
1076 render->alpha_blend |= (rt->colormask & PIPE_MASK_RGBA) << 28;
1077
1078 struct pipe_rasterizer_state *rst = &ctx->rasterizer->base;
1079 struct pipe_depth_state *depth = &ctx->zsa->base.depth;
1080 render->depth_test = lima_calculate_depth_test(depth, rst);
1081
1082 /* overlap with plbu? any place can remove one? */
1083 render->depth_range = float_to_ushort(ctx->viewport.near) |
1084 (float_to_ushort(ctx->viewport.far) << 16);
1085
1086 #if 0
1087 struct pipe_stencil_state *stencil = ctx->zsa->base.stencil;
1088 struct pipe_stencil_ref *ref = &ctx->stencil_ref;
1089 render->stencil_front = stencil[0].func |
1090 (lima_stencil_op(stencil[0].fail_op) << 3) |
1091 (lima_stencil_op(stencil[0].zfail_op) << 6) |
1092 (lima_stencil_op(stencil[0].zpass_op) << 9) |
1093 (ref->ref_value[0] << 16) |
1094 (stencil[0].valuemask << 24);
1095 render->stencil_back = stencil[1].func |
1096 (lima_stencil_op(stencil[1].fail_op) << 3) |
1097 (lima_stencil_op(stencil[1].zfail_op) << 6) |
1098 (lima_stencil_op(stencil[1].zpass_op) << 9) |
1099 (ref->ref_value[1] << 16) |
1100 (stencil[1].valuemask << 24);
1101 #else
1102 render->stencil_front = 0xff000007;
1103 render->stencil_back = 0xff000007;
1104 #endif
1105
1106 /* seems not correct? */
1107 //struct pipe_alpha_state *alpha = &ctx->zsa->base.alpha;
1108 render->stencil_test = 0;
1109 //(stencil->enabled ? 0xFF : 0x00) | (float_to_ubyte(alpha->ref_value) << 16)
1110
1111 /* need more investigation */
1112 if (info->mode == PIPE_PRIM_POINTS)
1113 render->multi_sample = 0x0000F007;
1114 else if (info->mode < PIPE_PRIM_TRIANGLES)
1115 render->multi_sample = 0x0000F407;
1116 else
1117 render->multi_sample = 0x0000F807;
1118 if (ctx->framebuffer.base.samples)
1119 render->multi_sample |= 0x68;
1120
1121 render->shader_address =
1122 ctx->fs->bo->va | (((uint32_t *)ctx->fs->bo->map)[0] & 0x1F);
1123
1124 /* seems not needed */
1125 render->uniforms_address = 0x00000000;
1126
1127 render->textures_address = 0x00000000;
1128
1129 /* more investigation */
1130 render->aux0 = 0x00000300 | (ctx->vs->varying_stride >> 3);
1131 render->aux1 = 0x00001000;
1132 if (ctx->blend->base.dither)
1133 render->aux1 |= 0x00002000;
1134
1135 if (ctx->tex_stateobj.num_samplers) {
1136 render->textures_address =
1137 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_tex_desc, LIMA_CTX_BUFF_SUBMIT_PP);
1138 render->aux0 |= ctx->tex_stateobj.num_samplers << 14;
1139 render->aux0 |= 0x20;
1140 }
1141
1142 if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
1143 render->uniforms_address =
1144 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, LIMA_CTX_BUFF_SUBMIT_PP);
1145 uint32_t size = ctx->buffer_state[lima_ctx_buff_pp_uniform].size;
1146 uint32_t bits = 0;
1147 if (size >= 8) {
1148 bits = util_last_bit(size >> 3) - 1;
1149 bits += size & u_bit_consecutive(0, bits + 3) ? 1 : 0;
1150 }
1151 render->uniforms_address |= bits > 0xf ? 0xf : bits;
1152
1153 render->aux0 |= 0x80;
1154 render->aux1 |= 0x10000;
1155 }
1156
1157 if (ctx->vs->num_varyings) {
1158 render->varying_types = 0x00000000;
1159 render->varyings_address = ctx->gp_output->va +
1160 ctx->gp_output_varyings_offt;
1161 for (int i = 0, index = 0; i < ctx->vs->num_outputs; i++) {
1162 int val;
1163
1164 if (i == ctx->vs->gl_pos_idx ||
1165 i == ctx->vs->point_size_idx)
1166 continue;
1167
1168 struct lima_varying_info *v = ctx->vs->varying + i;
1169 if (v->component_size == 4)
1170 val = v->components > 2 ? 0 : 1;
1171 else
1172 val = v->components > 2 ? 2 : 3;
1173
1174 if (index < 10)
1175 render->varying_types |= val << (3 * index);
1176 else if (index == 10) {
1177 render->varying_types |= val << 30;
1178 render->varyings_address |= val >> 2;
1179 }
1180 else if (index == 11)
1181 render->varyings_address |= val << 1;
1182
1183 index++;
1184 }
1185 }
1186 else {
1187 render->varying_types = 0x00000000;
1188 render->varyings_address = 0x00000000;
1189 }
1190
1191 lima_dump_command_stream_print(
1192 render, sizeof(*render), false, "add render state at va %x\n",
1193 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, 0));
1194
1195 lima_dump_rsw_command_stream_print(render, sizeof(*render),
1196 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, 0));
1197
1198 }
1199
1200 static void
1201 lima_update_gp_attribute_info(struct lima_context *ctx, const struct pipe_draw_info *info)
1202 {
1203 struct lima_vertex_element_state *ve = ctx->vertex_elements;
1204 struct lima_context_vertex_buffer *vb = &ctx->vertex_buffers;
1205
1206 uint32_t *attribute =
1207 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_attribute_info,
1208 MAX2(1, ve->num_elements) * 8);
1209
1210 int n = 0;
1211 for (int i = 0; i < ve->num_elements; i++) {
1212 struct pipe_vertex_element *pve = ve->pipe + i;
1213
1214 assert(pve->vertex_buffer_index < vb->count);
1215 assert(vb->enabled_mask & (1 << pve->vertex_buffer_index));
1216
1217 struct pipe_vertex_buffer *pvb = vb->vb + pve->vertex_buffer_index;
1218 struct lima_resource *res = lima_resource(pvb->buffer.resource);
1219
1220 lima_submit_add_bo(ctx->gp_submit, res->bo, LIMA_SUBMIT_BO_READ);
1221
1222 unsigned start = info->index_size ? (ctx->min_index + info->index_bias) : info->start;
1223 attribute[n++] = res->bo->va + pvb->buffer_offset + pve->src_offset
1224 + start * pvb->stride;
1225 attribute[n++] = (pvb->stride << 11) |
1226 (lima_pipe_format_to_attrib_type(pve->src_format) << 2) |
1227 (util_format_get_nr_components(pve->src_format) - 1);
1228 }
1229
1230 lima_dump_command_stream_print(
1231 attribute, n * 4, false, "update attribute info at va %x\n",
1232 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, 0));
1233 }
1234
1235 static void
1236 lima_update_gp_uniform(struct lima_context *ctx)
1237 {
1238 struct lima_context_constant_buffer *ccb =
1239 ctx->const_buffer + PIPE_SHADER_VERTEX;
1240 struct lima_vs_shader_state *vs = ctx->vs;
1241
1242 int size = vs->uniform_pending_offset + vs->constant_size + 32;
1243 void *vs_const_buff =
1244 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_uniform, size);
1245
1246 if (ccb->buffer)
1247 memcpy(vs_const_buff, ccb->buffer, ccb->size);
1248
1249 memcpy(vs_const_buff + vs->uniform_pending_offset,
1250 ctx->viewport.transform.scale,
1251 sizeof(ctx->viewport.transform.scale));
1252 memcpy(vs_const_buff + vs->uniform_pending_offset + 16,
1253 ctx->viewport.transform.translate,
1254 sizeof(ctx->viewport.transform.translate));
1255
1256 if (vs->constant)
1257 memcpy(vs_const_buff + vs->uniform_pending_offset + 32,
1258 vs->constant, vs->constant_size);
1259
1260 lima_dump_command_stream_print(
1261 vs_const_buff, size, true,
1262 "update gp uniform at va %x\n",
1263 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, 0));
1264 }
1265
1266 static void
1267 lima_update_pp_uniform(struct lima_context *ctx)
1268 {
1269 const float *const_buff = ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer;
1270 size_t const_buff_size = ctx->const_buffer[PIPE_SHADER_FRAGMENT].size / sizeof(float);
1271
1272 if (!const_buff)
1273 return;
1274
1275 uint16_t *fp16_const_buff =
1276 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform,
1277 const_buff_size * sizeof(uint16_t));
1278
1279 uint32_t *array =
1280 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform_array, 4);
1281
1282 for (int i = 0; i < const_buff_size; i++)
1283 fp16_const_buff[i] = util_float_to_half(const_buff[i]);
1284
1285 *array = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, LIMA_CTX_BUFF_SUBMIT_PP);
1286
1287 lima_dump_command_stream_print(
1288 fp16_const_buff, const_buff_size * 2, false, "add pp uniform data at va %x\n",
1289 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, 0));
1290 lima_dump_command_stream_print(
1291 array, 4, false, "add pp uniform info at va %x\n",
1292 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, 0));
1293 }
1294
1295 static void
1296 lima_update_varying(struct lima_context *ctx, const struct pipe_draw_info *info)
1297 {
1298 struct lima_screen *screen = lima_screen(ctx->base.screen);
1299 struct lima_vs_shader_state *vs = ctx->vs;
1300 uint32_t gp_output_size;
1301 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
1302
1303 uint32_t *varying =
1304 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_varying_info,
1305 vs->num_outputs * 8);
1306 int n = 0;
1307
1308 int offset = 0;
1309
1310 for (int i = 0; i < vs->num_outputs; i++) {
1311 struct lima_varying_info *v = vs->varying + i;
1312
1313 if (i == vs->gl_pos_idx ||
1314 i == vs->point_size_idx)
1315 continue;
1316
1317 int size = v->component_size * 4;
1318
1319 /* does component_size == 2 need to be 16 aligned? */
1320 if (v->component_size == 4)
1321 offset = align(offset, 16);
1322
1323 v->offset = offset;
1324 offset += size;
1325 }
1326
1327 vs->varying_stride = align(offset, 16);
1328
1329 /* gl_Position is always present, allocate space for it */
1330 gp_output_size = align(4 * 4 * num, 0x40);
1331
1332 /* Allocate space for varyings if there're any */
1333 if (vs->num_varyings) {
1334 ctx->gp_output_varyings_offt = gp_output_size;
1335 gp_output_size += align(vs->varying_stride * num, 0x40);
1336 }
1337
1338 /* Allocate space for gl_PointSize if it's there */
1339 if (vs->point_size_idx != -1) {
1340 ctx->gp_output_point_size_offt = gp_output_size;
1341 gp_output_size += 4 * num;
1342 }
1343
1344 /* gp_output can be too large for the suballocator, so create a
1345 * separate bo for it. The bo cache should prevent performance hit.
1346 */
1347 ctx->gp_output = lima_bo_create(screen, gp_output_size, 0);
1348 assert(ctx->gp_output);
1349 lima_submit_add_bo(ctx->gp_submit, ctx->gp_output, LIMA_SUBMIT_BO_WRITE);
1350 lima_submit_add_bo(ctx->pp_submit, ctx->gp_output, LIMA_SUBMIT_BO_READ);
1351
1352 for (int i = 0; i < vs->num_outputs; i++) {
1353 struct lima_varying_info *v = vs->varying + i;
1354
1355 if (i == vs->gl_pos_idx) {
1356 /* gl_Position */
1357 varying[n++] = ctx->gp_output->va;
1358 varying[n++] = 0x8020;
1359 } else if (i == vs->point_size_idx) {
1360 /* gl_PointSize */
1361 varying[n++] = ctx->gp_output->va + ctx->gp_output_point_size_offt;
1362 varying[n++] = 0x2021;
1363 } else {
1364 /* Varying */
1365 varying[n++] = ctx->gp_output->va + ctx->gp_output_varyings_offt +
1366 v->offset;
1367 varying[n++] = (vs->varying_stride << 11) | (v->components - 1) |
1368 (v->component_size == 2 ? 0x0C : 0);
1369 }
1370 }
1371
1372 lima_dump_command_stream_print(
1373 varying, n * 4, false, "update varying info at va %x\n",
1374 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, 0));
1375 }
1376
1377 static void
1378 lima_draw_vbo_update(struct pipe_context *pctx,
1379 const struct pipe_draw_info *info)
1380 {
1381 struct lima_context *ctx = lima_context(pctx);
1382
1383 lima_update_submit_bo(ctx);
1384
1385 lima_update_gp_attribute_info(ctx, info);
1386
1387 if ((ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1388 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty) ||
1389 ctx->dirty & LIMA_CONTEXT_DIRTY_VIEWPORT ||
1390 ctx->dirty & LIMA_CONTEXT_DIRTY_SHADER_VERT) {
1391 lima_update_gp_uniform(ctx);
1392 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty = false;
1393 }
1394
1395 lima_update_varying(ctx, info);
1396
1397 /* If it's zero scissor, don't build vs cmd list */
1398 if (!lima_is_scissor_zero(ctx))
1399 lima_pack_vs_cmd(ctx, info);
1400
1401 if (ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1402 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty) {
1403 lima_update_pp_uniform(ctx);
1404 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty = false;
1405 }
1406
1407 if (ctx->dirty & LIMA_CONTEXT_DIRTY_TEXTURES)
1408 lima_update_textures(ctx);
1409
1410 lima_pack_render_state(ctx, info);
1411 lima_pack_plbu_cmd(ctx, info);
1412
1413 if (ctx->gp_output) {
1414 lima_bo_unreference(ctx->gp_output); /* held by submit */
1415 ctx->gp_output = NULL;
1416 }
1417
1418 ctx->dirty = 0;
1419 }
1420
1421 static void
1422 lima_draw_vbo_indexed(struct pipe_context *pctx,
1423 const struct pipe_draw_info *info)
1424 {
1425 struct lima_context *ctx = lima_context(pctx);
1426 struct pipe_resource *indexbuf = NULL;
1427
1428 /* Mali Utgard GPU always need min/max index info for index draw,
1429 * compute it if upper layer does not do for us */
1430 if (info->max_index == ~0u)
1431 u_vbuf_get_minmax_index(pctx, info, &ctx->min_index, &ctx->max_index);
1432 else {
1433 ctx->min_index = info->min_index;
1434 ctx->max_index = info->max_index;
1435 }
1436
1437 if (info->has_user_indices) {
1438 util_upload_index_buffer(&ctx->base, info, &indexbuf, &ctx->index_offset, 0x40);
1439 ctx->index_res = lima_resource(indexbuf);
1440 }
1441 else {
1442 ctx->index_res = lima_resource(info->index.resource);
1443 ctx->index_offset = 0;
1444 }
1445
1446 lima_submit_add_bo(ctx->gp_submit, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1447 lima_submit_add_bo(ctx->pp_submit, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1448 lima_draw_vbo_update(pctx, info);
1449
1450 if (indexbuf)
1451 pipe_resource_reference(&indexbuf, NULL);
1452 }
1453
1454 static void
1455 lima_draw_vbo_count(struct pipe_context *pctx,
1456 const struct pipe_draw_info *info)
1457 {
1458 static const uint32_t max_verts = 65535;
1459
1460 struct pipe_draw_info local_info = *info;
1461 unsigned start = info->start;
1462 unsigned count = info->count;
1463
1464 while (count) {
1465 unsigned this_count = count;
1466 unsigned step;
1467
1468 u_split_draw(info, max_verts, &this_count, &step);
1469
1470 local_info.start = start;
1471 local_info.count = this_count;
1472
1473 lima_draw_vbo_update(pctx, &local_info);
1474
1475 count -= step;
1476 start += step;
1477 }
1478 }
1479
1480 static void
1481 lima_draw_vbo(struct pipe_context *pctx,
1482 const struct pipe_draw_info *info)
1483 {
1484 /* check if draw mode and vertex/index count match,
1485 * otherwise gp will hang */
1486 if (!u_trim_pipe_prim(info->mode, (unsigned*)&info->count)) {
1487 debug_printf("draw mode and vertex/index count mismatch\n");
1488 return;
1489 }
1490
1491 struct lima_context *ctx = lima_context(pctx);
1492
1493 if (!ctx->vs || !ctx->fs) {
1494 debug_warn_once("no shader, skip draw\n");
1495 return;
1496 }
1497
1498 if (!lima_update_vs_state(ctx) || !lima_update_fs_state(ctx))
1499 return;
1500
1501 lima_dump_command_stream_print(
1502 ctx->vs->bo->map, ctx->vs->shader_size, false,
1503 "add vs at va %x\n", ctx->vs->bo->va);
1504
1505 lima_dump_command_stream_print(
1506 ctx->fs->bo->map, ctx->fs->shader_size, false,
1507 "add fs at va %x\n", ctx->fs->bo->va);
1508
1509 lima_submit_add_bo(ctx->gp_submit, ctx->vs->bo, LIMA_SUBMIT_BO_READ);
1510 lima_submit_add_bo(ctx->pp_submit, ctx->fs->bo, LIMA_SUBMIT_BO_READ);
1511
1512 if (info->index_size)
1513 lima_draw_vbo_indexed(pctx, info);
1514 else
1515 lima_draw_vbo_count(pctx, info);
1516 }
1517
1518 static void
1519 lima_finish_plbu_cmd(struct lima_context *ctx)
1520 {
1521 int i = 0;
1522 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + 2 * 4);
1523
1524 plbu_cmd[i++] = 0x00000000;
1525 plbu_cmd[i++] = 0x50000000; /* END */
1526
1527 ctx->plbu_cmd_array.size += i * 4;
1528 }
1529
1530 static void
1531 lima_pack_wb_zsbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1532 {
1533 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1534 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
1535 int level = fb->base.zsbuf->u.tex.level;
1536 uint32_t format = lima_format_get_pixel(fb->base.zsbuf->format);
1537
1538 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1539 wb[wb_idx].type = 0x01; /* 1 for depth, stencil */
1540 wb[wb_idx].address = res->bo->va + res->levels[level].offset;
1541 wb[wb_idx].pixel_format = format;
1542 if (res->tiled) {
1543 wb[wb_idx].pixel_layout = 0x2;
1544 wb[wb_idx].pitch = fb->tiled_w;
1545 } else {
1546 wb[wb_idx].pixel_layout = 0x0;
1547 wb[wb_idx].pitch = res->levels[level].stride / 8;
1548 }
1549 wb[wb_idx].mrt_bits = 0;
1550 }
1551
1552 static void
1553 lima_pack_wb_cbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1554 {
1555 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1556 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
1557 int level = fb->base.cbufs[0]->u.tex.level;
1558 unsigned layer = fb->base.cbufs[0]->u.tex.first_layer;
1559 uint32_t format = lima_format_get_pixel(fb->base.cbufs[0]->format);
1560 bool swap_channels = lima_format_get_swap_rb(fb->base.cbufs[0]->format);
1561
1562 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1563 wb[wb_idx].type = 0x02; /* 2 for color buffer */
1564 wb[wb_idx].address = res->bo->va + res->levels[level].offset + layer * res->levels[level].layer_stride;
1565 wb[wb_idx].pixel_format = format;
1566 if (res->tiled) {
1567 wb[wb_idx].pixel_layout = 0x2;
1568 wb[wb_idx].pitch = fb->tiled_w;
1569 } else {
1570 wb[wb_idx].pixel_layout = 0x0;
1571 wb[wb_idx].pitch = res->levels[level].stride / 8;
1572 }
1573 wb[wb_idx].mrt_bits = swap_channels ? 0x4 : 0x0;
1574 }
1575
1576
1577 static void
1578 lima_pack_pp_frame_reg(struct lima_context *ctx, uint32_t *frame_reg,
1579 uint32_t *wb_reg)
1580 {
1581 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1582 struct lima_pp_frame_reg *frame = (void *)frame_reg;
1583 struct lima_screen *screen = lima_screen(ctx->base.screen);
1584 int wb_idx = 0;
1585
1586 frame->render_address = screen->pp_buffer->va + pp_frame_rsw_offset;
1587 frame->flags = 0x02;
1588 frame->clear_value_depth = ctx->clear.depth;
1589 frame->clear_value_stencil = ctx->clear.stencil;
1590 frame->clear_value_color = ctx->clear.color_8pc;
1591 frame->clear_value_color_1 = ctx->clear.color_8pc;
1592 frame->clear_value_color_2 = ctx->clear.color_8pc;
1593 frame->clear_value_color_3 = ctx->clear.color_8pc;
1594 frame->one = 1;
1595
1596 frame->width = fb->base.width - 1;
1597 frame->height = fb->base.height - 1;
1598
1599 /* frame->fragment_stack_address is overwritten per-pp in the kernel
1600 * by the values of pp_frame.fragment_stack_address[i] */
1601
1602 /* These are "stack size" and "stack offset" shifted,
1603 * here they are assumed to be always the same. */
1604 frame->fragment_stack_size = ctx->pp_max_stack_size << 16 | ctx->pp_max_stack_size;
1605
1606 /* related with MSAA and different value when r4p0/r7p0 */
1607 frame->supersampled_height = fb->base.height * 2 - 1;
1608 frame->scale = 0xE0C;
1609
1610 frame->dubya = 0x77;
1611 frame->onscreen = 1;
1612 frame->blocking = (fb->shift_min << 28) | (fb->shift_h << 16) | fb->shift_w;
1613 frame->foureight = 0x8888;
1614
1615 if (fb->base.nr_cbufs)
1616 lima_pack_wb_cbuf_reg(ctx, wb_reg, wb_idx++);
1617
1618 /* Mali4x0 can use on-tile buffer for depth/stencil, so to save some
1619 * memory bandwidth don't write depth/stencil back to memory if we're
1620 * rendering to scanout
1621 */
1622 if (!lima_is_scanout(ctx) && fb->base.zsbuf)
1623 lima_pack_wb_zsbuf_reg(ctx, wb_reg, wb_idx++);
1624 }
1625
1626 static void
1627 _lima_flush(struct lima_context *ctx, bool end_of_frame)
1628 {
1629 #define pp_stack_pp_size 0x400
1630
1631 lima_finish_plbu_cmd(ctx);
1632
1633 int vs_cmd_size = ctx->vs_cmd_array.size;
1634 int plbu_cmd_size = ctx->plbu_cmd_array.size;
1635 uint32_t vs_cmd_va = 0;
1636 uint32_t plbu_cmd_va;
1637
1638 if (vs_cmd_size) {
1639 void *vs_cmd =
1640 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_vs_cmd, vs_cmd_size);
1641 memcpy(vs_cmd, util_dynarray_begin(&ctx->vs_cmd_array), vs_cmd_size);
1642 util_dynarray_clear(&ctx->vs_cmd_array);
1643 vs_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_vs_cmd,
1644 LIMA_CTX_BUFF_SUBMIT_GP);
1645
1646 lima_dump_command_stream_print(
1647 vs_cmd, vs_cmd_size, false, "flush vs cmd at va %x\n", vs_cmd_va);
1648 lima_dump_vs_command_stream_print(vs_cmd, vs_cmd_size, vs_cmd_va);
1649 }
1650
1651 void *plbu_cmd =
1652 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_plbu_cmd, plbu_cmd_size);
1653 memcpy(plbu_cmd, util_dynarray_begin(&ctx->plbu_cmd_array), plbu_cmd_size);
1654 util_dynarray_clear(&ctx->plbu_cmd_array);
1655 plbu_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_plbu_cmd,
1656 LIMA_CTX_BUFF_SUBMIT_GP);
1657
1658 lima_dump_command_stream_print(
1659 plbu_cmd, plbu_cmd_size, false, "flush plbu cmd at va %x\n", plbu_cmd_va);
1660 lima_dump_plbu_command_stream_print(plbu_cmd, plbu_cmd_size, plbu_cmd_va);
1661
1662 struct lima_screen *screen = lima_screen(ctx->base.screen);
1663 struct drm_lima_gp_frame gp_frame;
1664 struct lima_gp_frame_reg *gp_frame_reg = (void *)gp_frame.frame;
1665 gp_frame_reg->vs_cmd_start = vs_cmd_va;
1666 gp_frame_reg->vs_cmd_end = vs_cmd_va + vs_cmd_size;
1667 gp_frame_reg->plbu_cmd_start = plbu_cmd_va;
1668 gp_frame_reg->plbu_cmd_end = plbu_cmd_va + plbu_cmd_size;
1669 gp_frame_reg->tile_heap_start = ctx->gp_tile_heap[ctx->plb_index]->va;
1670 gp_frame_reg->tile_heap_end = ctx->gp_tile_heap[ctx->plb_index]->va + gp_tile_heap_size;
1671
1672 lima_dump_command_stream_print(
1673 &gp_frame, sizeof(gp_frame), false, "add gp frame\n");
1674
1675 if (!lima_submit_start(ctx->gp_submit, &gp_frame, sizeof(gp_frame)))
1676 fprintf(stderr, "gp submit error\n");
1677
1678 if (lima_dump_command_stream) {
1679 if (lima_submit_wait(ctx->gp_submit, PIPE_TIMEOUT_INFINITE)) {
1680 if (ctx->gp_output) {
1681 float *pos = lima_bo_map(ctx->gp_output);
1682 lima_dump_command_stream_print(
1683 pos, 4 * 4 * 16, true, "gl_pos dump at va %x\n",
1684 ctx->gp_output->va);
1685 }
1686
1687 uint32_t *plb = lima_bo_map(ctx->plb[ctx->plb_index]);
1688 lima_dump_command_stream_print(
1689 plb, LIMA_CTX_PLB_BLK_SIZE, false, "plb dump at va %x\n",
1690 ctx->plb[ctx->plb_index]->va);
1691 }
1692 else {
1693 fprintf(stderr, "gp submit wait error\n");
1694 exit(1);
1695 }
1696 }
1697
1698 uint32_t pp_stack_va = 0;
1699 if (ctx->pp_max_stack_size) {
1700 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_stack, screen->num_pp *
1701 ctx->pp_max_stack_size * pp_stack_pp_size);
1702 pp_stack_va = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_stack,
1703 LIMA_CTX_BUFF_SUBMIT_PP);
1704 }
1705
1706 lima_update_pp_stream(ctx);
1707
1708 struct lima_pp_stream_state *ps = &ctx->pp_stream;
1709 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI400) {
1710 struct drm_lima_m400_pp_frame pp_frame = {0};
1711 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1712 pp_frame.num_pp = screen->num_pp;
1713
1714 for (int i = 0; i < screen->num_pp; i++) {
1715 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1716 if (ctx->pp_max_stack_size)
1717 pp_frame.fragment_stack_address[i] = pp_stack_va +
1718 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1719 }
1720
1721 lima_dump_command_stream_print(
1722 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1723
1724 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1725 fprintf(stderr, "pp submit error\n");
1726 }
1727 else {
1728 struct drm_lima_m450_pp_frame pp_frame = {0};
1729 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1730 pp_frame.num_pp = screen->num_pp;
1731
1732 if (ctx->pp_max_stack_size)
1733 for (int i = 0; i < screen->num_pp; i++)
1734 pp_frame.fragment_stack_address[i] = pp_stack_va +
1735 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1736
1737 if (ps->bo) {
1738 for (int i = 0; i < screen->num_pp; i++)
1739 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1740 }
1741 else {
1742 pp_frame.use_dlbu = true;
1743
1744 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1745 pp_frame.dlbu_regs[0] = ctx->plb[ctx->plb_index]->va;
1746 pp_frame.dlbu_regs[1] = ((fb->tiled_h - 1) << 16) | (fb->tiled_w - 1);
1747 unsigned s = util_logbase2(LIMA_CTX_PLB_BLK_SIZE) - 7;
1748 pp_frame.dlbu_regs[2] = (s << 28) | (fb->shift_h << 16) | fb->shift_w;
1749 pp_frame.dlbu_regs[3] = ((fb->tiled_h - 1) << 24) | ((fb->tiled_w - 1) << 16);
1750 }
1751
1752 lima_dump_command_stream_print(
1753 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1754
1755 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1756 fprintf(stderr, "pp submit error\n");
1757 }
1758
1759 if (lima_dump_command_stream) {
1760 if (!lima_submit_wait(ctx->pp_submit, PIPE_TIMEOUT_INFINITE)) {
1761 fprintf(stderr, "pp wait error\n");
1762 exit(1);
1763 }
1764 }
1765
1766 ctx->plb_index = (ctx->plb_index + 1) % lima_ctx_num_plb;
1767
1768 if (ctx->framebuffer.base.nr_cbufs) {
1769 /* Set reload flag for next draw. It'll be unset if buffer is cleared */
1770 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
1771 surf->reload = true;
1772 }
1773
1774 ctx->pp_max_stack_size = 0;
1775
1776 ctx->damage_rect.minx = ctx->damage_rect.miny = 0xffff;
1777 ctx->damage_rect.maxx = ctx->damage_rect.maxy = 0;
1778
1779 lima_dump_file_next();
1780 }
1781
1782 void
1783 lima_flush(struct lima_context *ctx)
1784 {
1785 if (!lima_ctx_dirty(ctx))
1786 return;
1787
1788 _lima_flush(ctx, false);
1789 }
1790
1791 static void
1792 lima_pipe_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
1793 unsigned flags)
1794 {
1795 struct lima_context *ctx = lima_context(pctx);
1796 if (lima_ctx_dirty(ctx))
1797 _lima_flush(ctx, flags & PIPE_FLUSH_END_OF_FRAME);
1798
1799 if (fence) {
1800 int fd;
1801 if (lima_submit_get_out_sync(ctx->pp_submit, &fd))
1802 *fence = lima_fence_create(fd);
1803 }
1804 }
1805
1806 void
1807 lima_draw_init(struct lima_context *ctx)
1808 {
1809 ctx->base.clear = lima_clear;
1810 ctx->base.draw_vbo = lima_draw_vbo;
1811 ctx->base.flush = lima_pipe_flush;
1812 }