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lima: implement EGL_KHR_partial_update
[mesa.git] / src / gallium / drivers / lima / lima_draw.c
1 /*
2 * Copyright (c) 2011-2013 Luc Verhaegen <libv@skynet.be>
3 * Copyright (c) 2017-2019 Lima Project
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include "util/u_math.h"
27 #include "util/u_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_half.h"
30 #include "util/u_helpers.h"
31 #include "util/u_inlines.h"
32 #include "util/u_pack_color.h"
33 #include "util/hash_table.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36 #include "util/u_vbuf.h"
37
38 #include "lima_context.h"
39 #include "lima_screen.h"
40 #include "lima_resource.h"
41 #include "lima_program.h"
42 #include "lima_bo.h"
43 #include "lima_submit.h"
44 #include "lima_texture.h"
45 #include "lima_util.h"
46 #include "lima_fence.h"
47 #include "lima_format.h"
48
49 #include <drm-uapi/lima_drm.h>
50
51 struct lima_gp_frame_reg {
52 uint32_t vs_cmd_start;
53 uint32_t vs_cmd_end;
54 uint32_t plbu_cmd_start;
55 uint32_t plbu_cmd_end;
56 uint32_t tile_heap_start;
57 uint32_t tile_heap_end;
58 };
59
60 struct lima_pp_frame_reg {
61 uint32_t plbu_array_address;
62 uint32_t render_address;
63 uint32_t unused_0;
64 uint32_t flags;
65 uint32_t clear_value_depth;
66 uint32_t clear_value_stencil;
67 uint32_t clear_value_color;
68 uint32_t clear_value_color_1;
69 uint32_t clear_value_color_2;
70 uint32_t clear_value_color_3;
71 uint32_t width;
72 uint32_t height;
73 uint32_t fragment_stack_address;
74 uint32_t fragment_stack_size;
75 uint32_t unused_1;
76 uint32_t unused_2;
77 uint32_t one;
78 uint32_t supersampled_height;
79 uint32_t dubya;
80 uint32_t onscreen;
81 uint32_t blocking;
82 uint32_t scale;
83 uint32_t foureight;
84 };
85
86 struct lima_pp_wb_reg {
87 uint32_t type;
88 uint32_t address;
89 uint32_t pixel_format;
90 uint32_t downsample_factor;
91 uint32_t pixel_layout;
92 uint32_t pitch;
93 uint32_t mrt_bits;
94 uint32_t mrt_pitch;
95 uint32_t zero;
96 uint32_t unused0;
97 uint32_t unused1;
98 uint32_t unused2;
99 };
100
101 struct lima_render_state {
102 uint32_t blend_color_bg;
103 uint32_t blend_color_ra;
104 uint32_t alpha_blend;
105 uint32_t depth_test;
106 uint32_t depth_range;
107 uint32_t stencil_front;
108 uint32_t stencil_back;
109 uint32_t stencil_test;
110 uint32_t multi_sample;
111 uint32_t shader_address;
112 uint32_t varying_types;
113 uint32_t uniforms_address;
114 uint32_t textures_address;
115 uint32_t aux0;
116 uint32_t aux1;
117 uint32_t varyings_address;
118 };
119
120
121 /* plbu commands */
122 #define PLBU_CMD_BEGIN(max) { \
123 int i = 0, max_n = max; \
124 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + max_n * 4);
125
126 #define PLBU_CMD_END() \
127 assert(i <= max_n); \
128 ctx->plbu_cmd_array.size += i * 4; \
129 }
130
131 #define PLBU_CMD(v1, v2) \
132 do { \
133 plbu_cmd[i++] = v1; \
134 plbu_cmd[i++] = v2; \
135 } while (0)
136
137 #define PLBU_CMD_BLOCK_STEP(shift_min, shift_h, shift_w) \
138 PLBU_CMD(((shift_min) << 28) | ((shift_h) << 16) | (shift_w), 0x1000010C)
139 #define PLBU_CMD_TILED_DIMENSIONS(tiled_w, tiled_h) \
140 PLBU_CMD((((tiled_w) - 1) << 24) | (((tiled_h) - 1) << 8), 0x10000109)
141 #define PLBU_CMD_BLOCK_STRIDE(block_w) PLBU_CMD((block_w) & 0xff, 0x30000000)
142 #define PLBU_CMD_ARRAY_ADDRESS(gp_stream, block_num) \
143 PLBU_CMD(gp_stream, 0x28000000 | ((block_num) - 1) | 1)
144 #define PLBU_CMD_VIEWPORT_LEFT(v) PLBU_CMD(v, 0x10000107)
145 #define PLBU_CMD_VIEWPORT_RIGHT(v) PLBU_CMD(v, 0x10000108)
146 #define PLBU_CMD_VIEWPORT_BOTTOM(v) PLBU_CMD(v, 0x10000105)
147 #define PLBU_CMD_VIEWPORT_TOP(v) PLBU_CMD(v, 0x10000106)
148 #define PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN() PLBU_CMD(0x00010002, 0x60000000)
149 #define PLBU_CMD_ARRAYS_SEMAPHORE_END() PLBU_CMD(0x00010001, 0x60000000)
150 #define PLBU_CMD_PRIMITIVE_SETUP(low_prim, cull, index_size) \
151 PLBU_CMD(((low_prim) ? 0x00003200 : 0x00002200) | (cull) | ((index_size) << 9), 0x1000010B)
152 #define PLBU_CMD_RSW_VERTEX_ARRAY(rsw, gl_pos) \
153 PLBU_CMD(rsw, 0x80000000 | ((gl_pos) >> 4))
154 #define PLBU_CMD_SCISSORS(minx, maxx, miny, maxy) \
155 PLBU_CMD(((minx) << 30) | ((maxy) - 1) << 15 | (miny), \
156 0x70000000 | ((maxx) - 1) << 13 | ((minx) >> 2))
157 #define PLBU_CMD_UNKNOWN1() PLBU_CMD(0x00000000, 0x1000010A)
158 #define PLBU_CMD_UNKNOWN2() PLBU_CMD(0x00000200, 0x1000010B)
159 #define PLBU_CMD_LOW_PRIM_SIZE(v) PLBU_CMD(v, 0x1000010D)
160 #define PLBU_CMD_DEPTH_RANGE_NEAR(v) PLBU_CMD(v, 0x1000010E)
161 #define PLBU_CMD_DEPTH_RANGE_FAR(v) PLBU_CMD(v, 0x1000010F)
162 #define PLBU_CMD_INDEXED_DEST(gl_pos) PLBU_CMD(gl_pos, 0x10000100)
163 #define PLBU_CMD_INDICES(va) PLBU_CMD(va, 0x10000101)
164 #define PLBU_CMD_DRAW_ARRAYS(mode, start, count) \
165 PLBU_CMD(((count) << 24) | (start), (((mode) & 0x1F) << 16) | ((count) >> 8))
166 #define PLBU_CMD_DRAW_ELEMENTS(mode, start, count) \
167 PLBU_CMD(((count) << 24) | (start), \
168 0x00200000 | (((mode) & 0x1F) << 16) | ((count) >> 8))
169
170 /* vs commands */
171 #define VS_CMD_BEGIN(max) { \
172 int i = 0, max_n = max; \
173 uint32_t *vs_cmd = util_dynarray_ensure_cap(&ctx->vs_cmd_array, ctx->vs_cmd_array.size + max_n * 4);
174
175 #define VS_CMD_END() \
176 assert(i <= max_n); \
177 ctx->vs_cmd_array.size += i * 4; \
178 }
179
180 #define VS_CMD(v1, v2) \
181 do { \
182 vs_cmd[i++] = v1; \
183 vs_cmd[i++] = v2; \
184 } while (0)
185
186 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1() VS_CMD(0x00028000, 0x50000000)
187 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2() VS_CMD(0x00000001, 0x50000000)
188 #define VS_CMD_ARRAYS_SEMAPHORE_END(index_draw) \
189 VS_CMD((index_draw) ? 0x00018000 : 0x00000000, 0x50000000)
190 #define VS_CMD_UNIFORMS_ADDRESS(addr, size) \
191 VS_CMD(addr, 0x30000000 | ((size) << 12))
192 #define VS_CMD_SHADER_ADDRESS(addr, size) \
193 VS_CMD(addr, 0x40000000 | ((size) << 12))
194 #define VS_CMD_SHADER_INFO(prefetch, size) \
195 VS_CMD(((prefetch) << 20) | ((((size) >> 4) - 1) << 10), 0x10000040)
196 #define VS_CMD_VARYING_ATTRIBUTE_COUNT(nv, na) \
197 VS_CMD((((nv) - 1) << 8) | (((na) - 1) << 24), 0x10000042)
198 #define VS_CMD_UNKNOWN1() VS_CMD(0x00000003, 0x10000041)
199 #define VS_CMD_UNKNOWN2() VS_CMD(0x00000000, 0x60000000)
200 #define VS_CMD_ATTRIBUTES_ADDRESS(addr, na) \
201 VS_CMD(addr, 0x20000000 | ((na) << 17))
202 #define VS_CMD_VARYINGS_ADDRESS(addr, nv) \
203 VS_CMD(addr, 0x20000008 | ((nv) << 17))
204 #define VS_CMD_DRAW(num, index_draw) \
205 VS_CMD(((num) << 24) | ((index_draw) ? 1 : 0), ((num) >> 8))
206
207 static inline bool
208 lima_ctx_dirty(struct lima_context *ctx)
209 {
210 return ctx->plbu_cmd_array.size;
211 }
212
213 static inline struct lima_damage_region *
214 lima_ctx_get_damage(struct lima_context *ctx)
215 {
216 if (!ctx->framebuffer.base.nr_cbufs)
217 return NULL;
218
219 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
220 struct lima_resource *res = lima_resource(surf->base.texture);
221 return &res->damage;
222 }
223
224 static bool
225 lima_fb_need_reload(struct lima_context *ctx)
226 {
227 /* Depth buffer is always discarded */
228 if (!ctx->framebuffer.base.nr_cbufs)
229 return false;
230
231 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
232 struct lima_resource *res = lima_resource(surf->base.texture);
233 if (res->damage.region) {
234 /* for EGL_KHR_partial_update, when EGL_EXT_buffer_age is enabled,
235 * we need to reload damage region, otherwise just want to reload
236 * the region not aligned to tile boundary */
237 //if (!res->damage.aligned)
238 // return true;
239 return true;
240 }
241 else if (surf->reload)
242 return true;
243
244 return false;
245 }
246
247 static void
248 lima_pack_reload_plbu_cmd(struct lima_context *ctx)
249 {
250 #define lima_reload_render_state_offset 0x0000
251 #define lima_reload_gl_pos_offset 0x0040
252 #define lima_reload_varying_offset 0x0080
253 #define lima_reload_tex_desc_offset 0x00c0
254 #define lima_reload_tex_array_offset 0x0100
255 #define lima_reload_buffer_size 0x0140
256
257 void *cpu;
258 unsigned offset;
259 struct pipe_resource *pres = NULL;
260 u_upload_alloc(ctx->uploader, 0, lima_reload_buffer_size,
261 0x40, &offset, &pres, &cpu);
262
263 struct lima_resource *res = lima_resource(pres);
264 uint32_t va = res->bo->va + offset;
265
266 struct lima_screen *screen = lima_screen(ctx->base.screen);
267
268 uint32_t reload_shader_first_instr_size =
269 ((uint32_t *)(screen->pp_buffer->map + pp_reload_program_offset))[0] & 0x1f;
270 uint32_t reload_shader_va = screen->pp_buffer->va + pp_reload_program_offset;
271
272 struct lima_render_state reload_render_state = {
273 .alpha_blend = 0xf03b1ad2,
274 .depth_test = 0x0000000e,
275 .depth_range = 0xffff0000,
276 .stencil_front = 0x00000007,
277 .stencil_back = 0x00000007,
278 .multi_sample = 0x0000f007,
279 .shader_address = reload_shader_va | reload_shader_first_instr_size,
280 .varying_types = 0x00000001,
281 .textures_address = va + lima_reload_tex_array_offset,
282 .aux0 = 0x00004021,
283 .varyings_address = va + lima_reload_varying_offset,
284 };
285 memcpy(cpu + lima_reload_render_state_offset, &reload_render_state,
286 sizeof(reload_render_state));
287
288 struct lima_context_framebuffer *fb = &ctx->framebuffer;
289 lima_tex_desc *td = cpu + lima_reload_tex_desc_offset;
290 memset(td, 0, lima_min_tex_desc_size);
291 lima_texture_desc_set_res(ctx, td, fb->base.cbufs[0]->texture, 0, 0);
292 td->unknown_1_1 = 0x80;
293 td->texture_2d = 1;
294 td->min_img_filter_nearest = 1;
295 td->mag_img_filter_nearest = 1;
296 td->wrap_s_clamp_to_edge = 1;
297 td->wrap_t_clamp_to_edge = 1;
298 td->unknown_2_2 = 0x1;
299
300 uint32_t *ta = cpu + lima_reload_tex_array_offset;
301 ta[0] = va + lima_reload_tex_desc_offset;
302
303 float reload_gl_pos[] = {
304 fb->base.width, 0, 0, 1,
305 0, 0, 0, 1,
306 0, fb->base.height, 0, 1,
307 };
308 memcpy(cpu + lima_reload_gl_pos_offset, reload_gl_pos,
309 sizeof(reload_gl_pos));
310
311 float reload_varying[] = {
312 fb->base.width, 0, 0, 0,
313 0, fb->base.height, 0, 0,
314 };
315 memcpy(cpu + lima_reload_varying_offset, reload_varying,
316 sizeof(reload_varying));
317
318 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
319 pipe_resource_reference(&pres, NULL);
320
321 PLBU_CMD_BEGIN(20);
322
323 PLBU_CMD_VIEWPORT_LEFT(0);
324 PLBU_CMD_VIEWPORT_RIGHT(fui(fb->base.width));
325 PLBU_CMD_VIEWPORT_BOTTOM(0);
326 PLBU_CMD_VIEWPORT_TOP(fui(fb->base.height));
327
328 PLBU_CMD_RSW_VERTEX_ARRAY(
329 va + lima_reload_render_state_offset,
330 va + lima_reload_gl_pos_offset);
331
332 PLBU_CMD_UNKNOWN2();
333 PLBU_CMD_UNKNOWN1();
334
335 PLBU_CMD_INDICES(screen->pp_buffer->va + pp_shared_index_offset);
336 PLBU_CMD_INDEXED_DEST(va + lima_reload_gl_pos_offset);
337 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
338
339 PLBU_CMD_END();
340 }
341
342 static void
343 lima_pack_clear_plbu_cmd(struct lima_context *ctx)
344 {
345 #define lima_clear_render_state_offset 0x0000
346 #define lima_clear_shader_offset 0x0040
347 #define lima_clear_buffer_size 0x0080
348
349 void *cpu;
350 unsigned offset;
351 struct pipe_resource *pres = NULL;
352 u_upload_alloc(ctx->uploader, 0, lima_clear_buffer_size,
353 0x40, &offset, &pres, &cpu);
354
355 struct lima_resource *res = lima_resource(pres);
356 uint32_t va = res->bo->va + offset;
357
358 struct lima_screen *screen = lima_screen(ctx->base.screen);
359 uint32_t gl_pos_va = screen->pp_buffer->va + pp_clear_gl_pos_offset;
360
361 /* const0 clear_color, mov.v1 $0 ^const0.xxxx, stop */
362 uint32_t clear_shader[] = {
363 0x00021025, 0x0000000c,
364 (ctx->clear.color_16pc << 12) | 0x000007cf,
365 ctx->clear.color_16pc >> 12,
366 ctx->clear.color_16pc >> 44,
367 };
368 memcpy(cpu + lima_clear_shader_offset, &clear_shader,
369 sizeof(clear_shader));
370
371 uint32_t clear_shader_va = va + lima_clear_shader_offset;
372 uint32_t clear_shader_first_instr_size = clear_shader[0] & 0x1f;
373
374 struct lima_render_state clear_render_state = {
375 .blend_color_bg = 0x00800080,
376 .blend_color_ra = 0x00ff0080,
377 .alpha_blend = 0xfc321892,
378 .depth_test = 0x0000003e,
379 .depth_range = 0xffff0000,
380 .stencil_front = 0x00000007,
381 .stencil_back = 0x00000007,
382 .multi_sample = 0x0000f007,
383 .shader_address = clear_shader_va | clear_shader_first_instr_size,
384 };
385 memcpy(cpu + lima_clear_render_state_offset, &clear_render_state,
386 sizeof(clear_render_state));
387
388 PLBU_CMD_BEGIN(22);
389
390 PLBU_CMD_VIEWPORT_LEFT(0);
391 PLBU_CMD_VIEWPORT_RIGHT(0x45800000);
392 PLBU_CMD_VIEWPORT_TOP(0);
393 PLBU_CMD_VIEWPORT_BOTTOM(0x45800000);
394
395 struct pipe_scissor_state *scissor = &ctx->scissor;
396 PLBU_CMD_SCISSORS(scissor->minx, scissor->maxx, scissor->miny, scissor->maxy);
397
398 PLBU_CMD_RSW_VERTEX_ARRAY(va + lima_clear_render_state_offset, gl_pos_va);
399
400 PLBU_CMD_UNKNOWN2();
401 PLBU_CMD_UNKNOWN1();
402
403 PLBU_CMD_INDICES(screen->pp_buffer->va + pp_shared_index_offset);
404 PLBU_CMD_INDEXED_DEST(gl_pos_va);
405 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
406
407 PLBU_CMD_END();
408 }
409
410 static void
411 lima_pack_head_plbu_cmd(struct lima_context *ctx)
412 {
413 /* first draw need create a PLBU command header */
414 if (lima_ctx_dirty(ctx))
415 return;
416
417 struct lima_context_framebuffer *fb = &ctx->framebuffer;
418
419 PLBU_CMD_BEGIN(10);
420
421 PLBU_CMD_UNKNOWN2();
422 PLBU_CMD_BLOCK_STEP(fb->shift_min, fb->shift_h, fb->shift_w);
423 PLBU_CMD_TILED_DIMENSIONS(fb->tiled_w, fb->tiled_h);
424 PLBU_CMD_BLOCK_STRIDE(fb->block_w);
425
426 PLBU_CMD_ARRAY_ADDRESS(
427 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size,
428 fb->block_w * fb->block_h);
429
430 PLBU_CMD_END();
431
432 if (lima_fb_need_reload(ctx))
433 lima_pack_reload_plbu_cmd(ctx);
434 }
435
436 static bool
437 lima_is_scissor_zero(struct lima_context *ctx)
438 {
439 if (!ctx->rasterizer || !ctx->rasterizer->base.scissor)
440 return false;
441
442 struct pipe_scissor_state *scissor = &ctx->scissor;
443 return
444 scissor->minx == scissor->maxx
445 && scissor->miny == scissor->maxy;
446 }
447
448 static bool
449 lima_is_scissor_full_fb(struct lima_context *ctx)
450 {
451 if (!ctx->rasterizer || !ctx->rasterizer->base.scissor)
452 return true;
453
454 struct pipe_scissor_state *scissor = &ctx->scissor;
455 struct lima_context_framebuffer *fb = &ctx->framebuffer;
456 return
457 scissor->minx == 0 && scissor->maxx == fb->base.width &&
458 scissor->miny == 0 && scissor->maxy == fb->base.height;
459 }
460
461 static void
462 hilbert_rotate(int n, int *x, int *y, int rx, int ry)
463 {
464 if (ry == 0) {
465 if (rx == 1) {
466 *x = n-1 - *x;
467 *y = n-1 - *y;
468 }
469
470 /* Swap x and y */
471 int t = *x;
472 *x = *y;
473 *y = t;
474 }
475 }
476
477 static void
478 hilbert_coords(int n, int d, int *x, int *y)
479 {
480 int rx, ry, i, t=d;
481
482 *x = *y = 0;
483
484 for (i = 0; (1 << i) < n; i++) {
485
486 rx = 1 & (t / 2);
487 ry = 1 & (t ^ rx);
488
489 hilbert_rotate(1 << i, x, y, rx, ry);
490
491 *x += rx << i;
492 *y += ry << i;
493
494 t /= 4;
495 }
496 }
497
498 static int
499 lima_get_pp_stream_size(int num_pp, int tiled_w, int tiled_h, uint32_t *off)
500 {
501 /* carefully calculate each stream start address:
502 * 1. overflow: each stream size may be different due to
503 * fb->tiled_w * fb->tiled_h can't be divided by num_pp,
504 * extra size should be added to the preceeding stream
505 * 2. alignment: each stream address should be 0x20 aligned
506 */
507 int delta = tiled_w * tiled_h / num_pp * 16 + 8;
508 int remain = tiled_w * tiled_h % num_pp;
509 int offset = 0;
510
511 for (int i = 0; i < num_pp; i++) {
512 off[i] = offset;
513
514 offset += delta;
515 if (remain) {
516 offset += 16;
517 remain--;
518 }
519 offset = align(offset, 0x20);
520 }
521
522 return offset;
523 }
524
525 static bool
526 inside_damage_region(int x, int y, struct lima_damage_region *ds)
527 {
528 if (!ds || !ds->region)
529 return true;
530
531 for (int i = 0; i < ds->num_region; i++) {
532 struct pipe_scissor_state *ss = ds->region + i;
533 if (x >= ss->minx && x < ss->maxx &&
534 y >= ss->miny && y < ss->maxy)
535 return true;
536 }
537
538 return false;
539 }
540
541 static void
542 lima_update_pp_stream(struct lima_context *ctx, int off_x, int off_y,
543 int tiled_w, int tiled_h)
544 {
545 struct lima_pp_stream_state *ps = &ctx->pp_stream;
546 struct lima_context_framebuffer *fb = &ctx->framebuffer;
547 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
548 struct lima_screen *screen = lima_screen(ctx->base.screen);
549 int i, num_pp = screen->num_pp;
550
551 /* use hilbert_coords to generates 1D to 2D relationship.
552 * 1D for pp stream index and 2D for plb block x/y on framebuffer.
553 * if multi pp, interleave the 1D index to make each pp's render target
554 * close enough which should result close workload
555 */
556 int max = MAX2(tiled_w, tiled_h);
557 int dim = util_logbase2_ceil(max);
558 int count = 1 << (dim + dim);
559 int index = 0;
560 uint32_t *stream[4];
561 int si[4] = {0};
562
563 for (i = 0; i < num_pp; i++)
564 stream[i] = ps->bo->map + ps->bo_offset + ps->offset[i];
565
566 for (i = 0; i < count; i++) {
567 int x, y;
568 hilbert_coords(max, i, &x, &y);
569 if (x < tiled_w && y < tiled_h) {
570 x += off_x;
571 y += off_y;
572
573 if (!inside_damage_region(x, y, damage))
574 continue;
575
576 int pp = index % num_pp;
577 int offset = ((y >> fb->shift_h) * fb->block_w +
578 (x >> fb->shift_w)) * LIMA_CTX_PLB_BLK_SIZE;
579 int plb_va = ctx->plb[ctx->plb_index]->va + offset;
580
581 stream[pp][si[pp]++] = 0;
582 stream[pp][si[pp]++] = 0xB8000000 | x | (y << 8);
583 stream[pp][si[pp]++] = 0xE0000002 | ((plb_va >> 3) & ~0xE0000003);
584 stream[pp][si[pp]++] = 0xB0000000;
585
586 index++;
587 }
588 }
589
590 for (i = 0; i < num_pp; i++) {
591 stream[i][si[i]++] = 0;
592 stream[i][si[i]++] = 0xBC000000;
593
594 lima_dump_command_stream_print(
595 stream[i], si[i] * 4, false, "pp plb stream %d at va %x\n",
596 i, ps->bo->va + ps->bo_offset + ps->offset[i]);
597 }
598 }
599
600 static void
601 lima_update_damage_pp_stream(struct lima_context *ctx)
602 {
603 struct lima_damage_region *ds = lima_ctx_get_damage(ctx);
604 struct pipe_scissor_state max = ds->region[0];
605
606 /* find a max region to cover all the damage region */
607 for (int i = 1; i < ds->num_region; i++) {
608 struct pipe_scissor_state *ss = ds->region + i;
609 max.minx = MIN2(max.minx, ss->minx);
610 max.miny = MIN2(max.miny, ss->miny);
611 max.maxx = MAX2(max.maxx, ss->maxx);
612 max.maxy = MAX2(max.maxy, ss->maxy);
613 }
614
615 int tiled_w = max.maxx - max.minx;
616 int tiled_h = max.maxy - max.miny;
617 struct lima_screen *screen = lima_screen(ctx->base.screen);
618 int size = lima_get_pp_stream_size(
619 screen->num_pp, tiled_w, tiled_h, ctx->pp_stream.offset);
620
621 void *cpu;
622 unsigned offset;
623 struct pipe_resource *pres = NULL;
624 u_upload_alloc(ctx->uploader, 0, size, 0x40, &offset, &pres, &cpu);
625
626 struct lima_resource *res = lima_resource(pres);
627 ctx->pp_stream.bo = res->bo;
628 ctx->pp_stream.bo_offset = offset;
629
630 lima_update_pp_stream(ctx, max.minx, max.miny, tiled_w, tiled_h);
631
632 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
633 pipe_resource_reference(&pres, NULL);
634 }
635
636 static void
637 lima_update_full_pp_stream(struct lima_context *ctx)
638 {
639 struct lima_context_framebuffer *fb = &ctx->framebuffer;
640 struct lima_ctx_plb_pp_stream_key key = {
641 .plb_index = ctx->plb_index,
642 .tiled_w = fb->tiled_w,
643 .tiled_h = fb->tiled_h,
644 };
645
646 struct hash_entry *entry =
647 _mesa_hash_table_search(ctx->plb_pp_stream, &key);
648 struct lima_ctx_plb_pp_stream *s = entry->data;
649
650 if (s->bo) {
651 ctx->pp_stream.bo = s->bo;
652 ctx->pp_stream.bo_offset = 0;
653 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
654 }
655 else {
656 struct lima_screen *screen = lima_screen(ctx->base.screen);
657 int size = lima_get_pp_stream_size(
658 screen->num_pp, fb->tiled_w, fb->tiled_h, s->offset);
659 s->bo = lima_bo_create(screen, size, 0);
660 lima_bo_map(s->bo);
661
662 ctx->pp_stream.bo = s->bo;
663 ctx->pp_stream.bo_offset = 0;
664 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
665
666 lima_update_pp_stream(ctx, 0, 0, fb->tiled_w, fb->tiled_h);
667 }
668
669 lima_submit_add_bo(ctx->pp_submit, s->bo, LIMA_SUBMIT_BO_READ);
670 }
671
672 static void
673 lima_update_submit_bo(struct lima_context *ctx)
674 {
675 if (lima_ctx_dirty(ctx))
676 return;
677
678 struct lima_screen *screen = lima_screen(ctx->base.screen);
679 lima_submit_add_bo(ctx->gp_submit, ctx->plb_gp_stream, LIMA_SUBMIT_BO_READ);
680 lima_submit_add_bo(ctx->gp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
681 lima_submit_add_bo(ctx->gp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
682
683 lima_dump_command_stream_print(
684 ctx->plb_gp_stream->map + ctx->plb_index * ctx->plb_gp_size,
685 ctx->plb_gp_size, false, "gp plb stream at va %x\n",
686 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size);
687
688 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
689 if (damage && damage->region)
690 lima_update_damage_pp_stream(ctx);
691 else if (ctx->plb_pp_stream)
692 lima_update_full_pp_stream(ctx);
693 else
694 ctx->pp_stream.bo = NULL;
695
696 if (ctx->framebuffer.base.nr_cbufs) {
697 struct lima_resource *res = lima_resource(ctx->framebuffer.base.cbufs[0]->texture);
698 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
699 }
700 if (ctx->framebuffer.base.zsbuf) {
701 struct lima_resource *res = lima_resource(ctx->framebuffer.base.zsbuf->texture);
702 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
703 }
704 lima_submit_add_bo(ctx->pp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_READ);
705 lima_submit_add_bo(ctx->pp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_READ);
706 lima_submit_add_bo(ctx->pp_submit, screen->pp_buffer, LIMA_SUBMIT_BO_READ);
707 }
708
709 static void
710 lima_clear(struct pipe_context *pctx, unsigned buffers,
711 const union pipe_color_union *color, double depth, unsigned stencil)
712 {
713 struct lima_context *ctx = lima_context(pctx);
714 bool full_fb_clear = lima_is_scissor_full_fb(ctx);
715
716 if (full_fb_clear) {
717 lima_flush(ctx);
718
719 /* no need to reload if cleared */
720 if (ctx->framebuffer.base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0)) {
721 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
722 surf->reload = false;
723 }
724 }
725
726 struct lima_context_clear *clear = &ctx->clear;
727 clear->buffers = buffers;
728
729 if (buffers & PIPE_CLEAR_COLOR0) {
730 clear->color_8pc =
731 ((uint32_t)float_to_ubyte(color->f[3]) << 24) |
732 ((uint32_t)float_to_ubyte(color->f[2]) << 16) |
733 ((uint32_t)float_to_ubyte(color->f[1]) << 8) |
734 float_to_ubyte(color->f[0]);
735
736 clear->color_16pc =
737 ((uint64_t)float_to_ushort(color->f[3]) << 48) |
738 ((uint64_t)float_to_ushort(color->f[2]) << 32) |
739 ((uint64_t)float_to_ushort(color->f[1]) << 16) |
740 float_to_ushort(color->f[0]);
741 }
742
743 if (buffers & PIPE_CLEAR_DEPTH)
744 clear->depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
745
746 if (buffers & PIPE_CLEAR_STENCIL)
747 clear->stencil = stencil;
748
749 lima_update_submit_bo(ctx);
750
751 lima_pack_head_plbu_cmd(ctx);
752
753 /* partial clear */
754 if (!full_fb_clear)
755 lima_pack_clear_plbu_cmd(ctx);
756
757 ctx->dirty |= LIMA_CONTEXT_DIRTY_CLEAR;
758 }
759
760 enum lima_attrib_type {
761 LIMA_ATTRIB_FLOAT = 0x000,
762 /* todo: find out what lives here. */
763 LIMA_ATTRIB_I16 = 0x004,
764 LIMA_ATTRIB_U16 = 0x005,
765 LIMA_ATTRIB_I8 = 0x006,
766 LIMA_ATTRIB_U8 = 0x007,
767 LIMA_ATTRIB_I8N = 0x008,
768 LIMA_ATTRIB_U8N = 0x009,
769 LIMA_ATTRIB_I16N = 0x00A,
770 LIMA_ATTRIB_U16N = 0x00B,
771 /* todo: where is the 32 int */
772 /* todo: find out what lives here. */
773 LIMA_ATTRIB_FIXED = 0x101
774 };
775
776 static enum lima_attrib_type
777 lima_pipe_format_to_attrib_type(enum pipe_format format)
778 {
779 const struct util_format_description *desc = util_format_description(format);
780 int i = util_format_get_first_non_void_channel(format);
781 const struct util_format_channel_description *c = desc->channel + i;
782
783 switch (c->type) {
784 case UTIL_FORMAT_TYPE_FLOAT:
785 return LIMA_ATTRIB_FLOAT;
786 case UTIL_FORMAT_TYPE_FIXED:
787 return LIMA_ATTRIB_FIXED;
788 case UTIL_FORMAT_TYPE_SIGNED:
789 if (c->size == 8) {
790 if (c->normalized)
791 return LIMA_ATTRIB_I8N;
792 else
793 return LIMA_ATTRIB_I8;
794 }
795 else if (c->size == 16) {
796 if (c->normalized)
797 return LIMA_ATTRIB_I16N;
798 else
799 return LIMA_ATTRIB_I16;
800 }
801 break;
802 case UTIL_FORMAT_TYPE_UNSIGNED:
803 if (c->size == 8) {
804 if (c->normalized)
805 return LIMA_ATTRIB_U8N;
806 else
807 return LIMA_ATTRIB_U8;
808 }
809 else if (c->size == 16) {
810 if (c->normalized)
811 return LIMA_ATTRIB_U16N;
812 else
813 return LIMA_ATTRIB_U16;
814 }
815 break;
816 }
817
818 return LIMA_ATTRIB_FLOAT;
819 }
820
821 static void
822 lima_pack_vs_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
823 {
824 VS_CMD_BEGIN(24);
825
826 if (!info->index_size) {
827 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1();
828 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2();
829 }
830
831 int uniform_size = ctx->vs->uniform_pending_offset + ctx->vs->constant_size + 32;
832 VS_CMD_UNIFORMS_ADDRESS(
833 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, LIMA_CTX_BUFF_SUBMIT_GP),
834 align(uniform_size, 16));
835
836 VS_CMD_SHADER_ADDRESS(ctx->vs->bo->va, ctx->vs->shader_size);
837 VS_CMD_SHADER_INFO(ctx->vs->prefetch, ctx->vs->shader_size);
838
839 int num_varryings = ctx->vs->num_varying;
840 int num_attributes = ctx->vertex_elements->num_elements;
841 VS_CMD_VARYING_ATTRIBUTE_COUNT(num_varryings, num_attributes);
842
843 VS_CMD_UNKNOWN1();
844
845 VS_CMD_ATTRIBUTES_ADDRESS(
846 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, LIMA_CTX_BUFF_SUBMIT_GP),
847 num_attributes);
848
849 VS_CMD_VARYINGS_ADDRESS(
850 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, LIMA_CTX_BUFF_SUBMIT_GP),
851 num_varryings);
852
853 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
854 VS_CMD_DRAW(num, info->index_size);
855
856 VS_CMD_UNKNOWN2();
857
858 VS_CMD_ARRAYS_SEMAPHORE_END(info->index_size);
859
860 VS_CMD_END();
861 }
862
863 static void
864 lima_pack_plbu_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
865 {
866 struct lima_context_framebuffer *fb = &ctx->framebuffer;
867
868 lima_pack_head_plbu_cmd(ctx);
869
870 /* If it's zero scissor, we skip adding all other commands */
871 if (lima_is_scissor_zero(ctx))
872 return;
873
874 PLBU_CMD_BEGIN(30);
875
876 PLBU_CMD_VIEWPORT_LEFT(fui(ctx->viewport.left));
877 PLBU_CMD_VIEWPORT_RIGHT(fui(ctx->viewport.right));
878 PLBU_CMD_VIEWPORT_BOTTOM(fui(ctx->viewport.bottom));
879 PLBU_CMD_VIEWPORT_TOP(fui(ctx->viewport.top));
880
881 if (!info->index_size)
882 PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN();
883
884 bool low_prim = info->mode < PIPE_PRIM_TRIANGLES;
885 int cf = ctx->rasterizer->base.cull_face;
886 int ccw = ctx->rasterizer->base.front_ccw;
887 uint32_t cull = 0;
888 if (cf != PIPE_FACE_NONE) {
889 if (cf & PIPE_FACE_FRONT)
890 cull |= ccw ? 0x00040000 : 0x00020000;
891 if (cf & PIPE_FACE_BACK)
892 cull |= ccw ? 0x00020000 : 0x00040000;
893 }
894 PLBU_CMD_PRIMITIVE_SETUP(low_prim, cull, info->index_size);
895
896 uint32_t gl_position_va =
897 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos,
898 LIMA_CTX_BUFF_SUBMIT_GP | LIMA_CTX_BUFF_SUBMIT_PP);
899 PLBU_CMD_RSW_VERTEX_ARRAY(
900 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, LIMA_CTX_BUFF_SUBMIT_PP),
901 gl_position_va);
902
903 /* TODO
904 * - we should set it only for the first draw that enabled the scissor and for
905 * latter draw only if scissor is dirty
906 */
907 if (ctx->rasterizer->base.scissor) {
908 struct pipe_scissor_state *scissor = &ctx->scissor;
909 PLBU_CMD_SCISSORS(scissor->minx, scissor->maxx, scissor->miny, scissor->maxy);
910 } else {
911 PLBU_CMD_SCISSORS(0, fb->base.width, 0, fb->base.height);
912 }
913
914 PLBU_CMD_UNKNOWN1();
915
916 PLBU_CMD_DEPTH_RANGE_NEAR(fui(ctx->viewport.near));
917 PLBU_CMD_DEPTH_RANGE_FAR(fui(ctx->viewport.far));
918
919 if (low_prim) {
920 uint32_t v = info->mode == PIPE_PRIM_POINTS ?
921 fui(ctx->rasterizer->base.point_size) : fui(ctx->rasterizer->base.line_width);
922 PLBU_CMD_LOW_PRIM_SIZE(v);
923 }
924
925 if (info->index_size) {
926 PLBU_CMD_INDEXED_DEST(gl_position_va);
927
928 struct pipe_resource *indexbuf = NULL;
929 unsigned index_offset = 0;
930 struct lima_resource *res;
931 if (info->has_user_indices) {
932 util_upload_index_buffer(&ctx->base, info, &indexbuf, &index_offset);
933 res = lima_resource(indexbuf);
934 }
935 else
936 res = lima_resource(info->index.resource);
937
938 lima_submit_add_bo(ctx->gp_submit, res->bo, LIMA_SUBMIT_BO_READ);
939 PLBU_CMD_INDICES(res->bo->va + info->start * info->index_size + index_offset);
940
941 if (indexbuf)
942 pipe_resource_reference(&indexbuf, NULL);
943 }
944 else {
945 /* can this make the attribute info static? */
946 PLBU_CMD_DRAW_ARRAYS(info->mode, info->start, info->count);
947 }
948
949 PLBU_CMD_ARRAYS_SEMAPHORE_END();
950
951 if (info->index_size)
952 PLBU_CMD_DRAW_ELEMENTS(info->mode, ctx->min_index, info->count);
953
954 PLBU_CMD_END();
955 }
956
957 static int
958 lima_blend_func(enum pipe_blend_func pipe)
959 {
960 switch (pipe) {
961 case PIPE_BLEND_ADD:
962 return 2;
963 case PIPE_BLEND_SUBTRACT:
964 return 0;
965 case PIPE_BLEND_REVERSE_SUBTRACT:
966 return 1;
967 case PIPE_BLEND_MIN:
968 return 4;
969 case PIPE_BLEND_MAX:
970 return 5;
971 }
972 return -1;
973 }
974
975 static int
976 lima_blend_factor(enum pipe_blendfactor pipe)
977 {
978 switch (pipe) {
979 case PIPE_BLENDFACTOR_ONE:
980 return 11;
981 case PIPE_BLENDFACTOR_SRC_COLOR:
982 return 0;
983 case PIPE_BLENDFACTOR_SRC_ALPHA:
984 return 16;
985 case PIPE_BLENDFACTOR_DST_ALPHA:
986 return 17;
987 case PIPE_BLENDFACTOR_DST_COLOR:
988 return 1;
989 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
990 return 7;
991 case PIPE_BLENDFACTOR_CONST_COLOR:
992 return 2;
993 case PIPE_BLENDFACTOR_CONST_ALPHA:
994 return 18;
995 case PIPE_BLENDFACTOR_ZERO:
996 return 3;
997 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
998 return 8;
999 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
1000 return 24;
1001 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
1002 return 25;
1003 case PIPE_BLENDFACTOR_INV_DST_COLOR:
1004 return 9;
1005 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
1006 return 10;
1007 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
1008 return 26;
1009 case PIPE_BLENDFACTOR_SRC1_COLOR:
1010 case PIPE_BLENDFACTOR_SRC1_ALPHA:
1011 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
1012 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
1013 return -1; /* not support */
1014 }
1015 return -1;
1016 }
1017
1018 static int
1019 lima_calculate_alpha_blend(enum pipe_blend_func rgb_func, enum pipe_blend_func alpha_func,
1020 enum pipe_blendfactor rgb_src_factor, enum pipe_blendfactor rgb_dst_factor,
1021 enum pipe_blendfactor alpha_src_factor, enum pipe_blendfactor alpha_dst_factor)
1022 {
1023 return lima_blend_func(rgb_func) |
1024 (lima_blend_func(alpha_func) << 3) |
1025 (lima_blend_factor(rgb_src_factor) << 6) |
1026 (lima_blend_factor(rgb_dst_factor) << 11) |
1027 ((lima_blend_factor(alpha_src_factor) & 0xF) << 16) |
1028 ((lima_blend_factor(alpha_dst_factor) & 0xF) << 20) |
1029 0x0C000000; /* need check if this GLESv1 glAlphaFunc */
1030 }
1031
1032 #if 0
1033 static int
1034 lima_stencil_op(enum pipe_stencil_op pipe)
1035 {
1036 switch (pipe) {
1037 case PIPE_STENCIL_OP_KEEP:
1038 return 0;
1039 case PIPE_STENCIL_OP_ZERO:
1040 return 2;
1041 case PIPE_STENCIL_OP_REPLACE:
1042 return 1;
1043 case PIPE_STENCIL_OP_INCR:
1044 return 6;
1045 case PIPE_STENCIL_OP_DECR:
1046 return 7;
1047 case PIPE_STENCIL_OP_INCR_WRAP:
1048 return 4;
1049 case PIPE_STENCIL_OP_DECR_WRAP:
1050 return 5;
1051 case PIPE_STENCIL_OP_INVERT:
1052 return 3;
1053 }
1054 return -1;
1055 }
1056 #endif
1057
1058 static int
1059 lima_calculate_depth_test(struct pipe_depth_state *depth, struct pipe_rasterizer_state *rst)
1060 {
1061 enum pipe_compare_func func = (depth->enabled ? depth->func : PIPE_FUNC_ALWAYS);
1062
1063 int offset_scale = 0;
1064
1065 //TODO: implement polygon offset
1066 #if 0
1067 if (rst->offset_scale < -32)
1068 offset_scale = -32;
1069 else if (rst->offset_scale > 31)
1070 offset_scale = 31;
1071 else
1072 offset_scale = rst->offset_scale * 4;
1073
1074 if (offset_scale < 0)
1075 offset_scale = 0x100 + offset_scale;
1076 #endif
1077
1078 return (depth->enabled && depth->writemask) |
1079 ((int)func << 1) |
1080 (offset_scale << 16) |
1081 0x30; /* find out what is this */
1082 }
1083
1084 static void
1085 lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *info)
1086 {
1087 struct lima_render_state *render =
1088 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_plb_rsw,
1089 sizeof(*render), true);
1090
1091 /* do hw support RGBA independ blend?
1092 * PIPE_CAP_INDEP_BLEND_ENABLE
1093 *
1094 * how to handle the no cbuf only zbuf case?
1095 */
1096 struct pipe_rt_blend_state *rt = ctx->blend->base.rt;
1097 render->blend_color_bg = float_to_ubyte(ctx->blend_color.color[2]) |
1098 (float_to_ubyte(ctx->blend_color.color[1]) << 16);
1099 render->blend_color_ra = float_to_ubyte(ctx->blend_color.color[0]) |
1100 (float_to_ubyte(ctx->blend_color.color[3]) << 16);
1101
1102 if (rt->blend_enable) {
1103 render->alpha_blend = lima_calculate_alpha_blend(rt->rgb_func, rt->alpha_func,
1104 rt->rgb_src_factor, rt->rgb_dst_factor,
1105 rt->alpha_src_factor, rt->alpha_dst_factor);
1106 }
1107 else {
1108 /*
1109 * Special handling for blending disabled.
1110 * Binary driver is generating the same alpha_value,
1111 * as when we would just enable blending, without changing/setting any blend equation/params.
1112 * Normaly in this case mesa would set all rt fields (func/factor) to zero.
1113 */
1114 render->alpha_blend = lima_calculate_alpha_blend(PIPE_BLEND_ADD, PIPE_BLEND_ADD,
1115 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO,
1116 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO);
1117 }
1118
1119 render->alpha_blend |= (rt->colormask & PIPE_MASK_RGBA) << 28;
1120
1121 struct pipe_rasterizer_state *rst = &ctx->rasterizer->base;
1122 struct pipe_depth_state *depth = &ctx->zsa->base.depth;
1123 render->depth_test = lima_calculate_depth_test(depth, rst);
1124
1125 /* overlap with plbu? any place can remove one? */
1126 render->depth_range = float_to_ushort(ctx->viewport.near) |
1127 (float_to_ushort(ctx->viewport.far) << 16);
1128
1129 #if 0
1130 struct pipe_stencil_state *stencil = ctx->zsa->base.stencil;
1131 struct pipe_stencil_ref *ref = &ctx->stencil_ref;
1132 render->stencil_front = stencil[0].func |
1133 (lima_stencil_op(stencil[0].fail_op) << 3) |
1134 (lima_stencil_op(stencil[0].zfail_op) << 6) |
1135 (lima_stencil_op(stencil[0].zpass_op) << 9) |
1136 (ref->ref_value[0] << 16) |
1137 (stencil[0].valuemask << 24);
1138 render->stencil_back = stencil[1].func |
1139 (lima_stencil_op(stencil[1].fail_op) << 3) |
1140 (lima_stencil_op(stencil[1].zfail_op) << 6) |
1141 (lima_stencil_op(stencil[1].zpass_op) << 9) |
1142 (ref->ref_value[1] << 16) |
1143 (stencil[1].valuemask << 24);
1144 #else
1145 render->stencil_front = 0xff000007;
1146 render->stencil_back = 0xff000007;
1147 #endif
1148
1149 /* seems not correct? */
1150 //struct pipe_alpha_state *alpha = &ctx->zsa->base.alpha;
1151 render->stencil_test = 0;
1152 //(stencil->enabled ? 0xFF : 0x00) | (float_to_ubyte(alpha->ref_value) << 16)
1153
1154 /* need more investigation */
1155 if (info->mode == PIPE_PRIM_POINTS)
1156 render->multi_sample = 0x0000F007;
1157 else if (info->mode < PIPE_PRIM_TRIANGLES)
1158 render->multi_sample = 0x0000F407;
1159 else
1160 render->multi_sample = 0x0000F807;
1161 if (ctx->framebuffer.base.samples)
1162 render->multi_sample |= 0x68;
1163
1164 render->shader_address =
1165 ctx->fs->bo->va | (((uint32_t *)ctx->fs->bo->map)[0] & 0x1F);
1166
1167 /* seems not needed */
1168 render->uniforms_address = 0x00000000;
1169
1170 render->textures_address = 0x00000000;
1171
1172 /* more investigation */
1173 render->aux0 = 0x00000300 | (ctx->vs->varying_stride >> 3);
1174 render->aux1 = 0x00003000;
1175
1176 if (ctx->tex_stateobj.num_samplers) {
1177 render->textures_address =
1178 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_tex_desc, LIMA_CTX_BUFF_SUBMIT_PP);
1179 render->aux0 |= ctx->tex_stateobj.num_samplers << 14;
1180 render->aux0 |= 0x20;
1181 }
1182
1183 if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
1184 render->uniforms_address =
1185 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, LIMA_CTX_BUFF_SUBMIT_PP);
1186 render->uniforms_address |= ((ctx->buffer_state[lima_ctx_buff_pp_uniform].size) / 4 - 1);
1187 render->aux0 |= 0x80;
1188 render->aux1 |= 0x10000;
1189 }
1190
1191 if (ctx->vs->num_varying > 1) {
1192 render->varying_types = 0x00000000;
1193 render->varyings_address =
1194 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_varying, LIMA_CTX_BUFF_SUBMIT_PP);
1195 for (int i = 1; i < ctx->vs->num_varying; i++) {
1196 int val;
1197
1198 struct lima_varying_info *v = ctx->vs->varying + i;
1199 if (v->component_size == 4)
1200 val = v->components > 2 ? 0 : 1;
1201 else
1202 val = v->components > 2 ? 2 : 3;
1203
1204 int index = i - 1;
1205 if (index < 10)
1206 render->varying_types |= val << (3 * index);
1207 else if (index == 10) {
1208 render->varying_types |= val << 30;
1209 render->varyings_address |= val >> 2;
1210 }
1211 else if (index == 11)
1212 render->varyings_address |= val << 1;
1213 }
1214 }
1215 else {
1216 render->varying_types = 0x00000000;
1217 render->varyings_address = 0x00000000;
1218 }
1219
1220 lima_dump_command_stream_print(
1221 render, sizeof(*render), false, "add render state at va %x\n",
1222 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, 0));
1223 }
1224
1225 static void
1226 lima_update_gp_attribute_info(struct lima_context *ctx, const struct pipe_draw_info *info)
1227 {
1228 struct lima_vertex_element_state *ve = ctx->vertex_elements;
1229 struct lima_context_vertex_buffer *vb = &ctx->vertex_buffers;
1230
1231 uint32_t *attribute =
1232 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_attribute_info,
1233 ve->num_elements * 8, true);
1234
1235 int n = 0;
1236 for (int i = 0; i < ve->num_elements; i++) {
1237 struct pipe_vertex_element *pve = ve->pipe + i;
1238
1239 assert(pve->vertex_buffer_index < vb->count);
1240 assert(vb->enabled_mask & (1 << pve->vertex_buffer_index));
1241
1242 struct pipe_vertex_buffer *pvb = vb->vb + pve->vertex_buffer_index;
1243 struct lima_resource *res = lima_resource(pvb->buffer.resource);
1244
1245 lima_submit_add_bo(ctx->gp_submit, res->bo, LIMA_SUBMIT_BO_READ);
1246
1247 unsigned start = info->index_size ? ctx->min_index : info->start;
1248 attribute[n++] = res->bo->va + pvb->buffer_offset + pve->src_offset
1249 + start * pvb->stride;
1250 attribute[n++] = (pvb->stride << 11) |
1251 (lima_pipe_format_to_attrib_type(pve->src_format) << 2) |
1252 (util_format_get_nr_components(pve->src_format) - 1);
1253 }
1254
1255 lima_dump_command_stream_print(
1256 attribute, n * 4, false, "update attribute info at va %x\n",
1257 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, 0));
1258 }
1259
1260 static void
1261 lima_update_gp_uniform(struct lima_context *ctx)
1262 {
1263 struct lima_context_constant_buffer *ccb =
1264 ctx->const_buffer + PIPE_SHADER_VERTEX;
1265 struct lima_vs_shader_state *vs = ctx->vs;
1266
1267 int size = vs->uniform_pending_offset + vs->constant_size + 32;
1268 void *vs_const_buff =
1269 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_uniform, size, true);
1270
1271 if (ccb->buffer)
1272 memcpy(vs_const_buff, ccb->buffer, ccb->size);
1273
1274 memcpy(vs_const_buff + vs->uniform_pending_offset,
1275 ctx->viewport.transform.scale,
1276 sizeof(ctx->viewport.transform.scale));
1277 memcpy(vs_const_buff + vs->uniform_pending_offset + 16,
1278 ctx->viewport.transform.translate,
1279 sizeof(ctx->viewport.transform.translate));
1280
1281 if (vs->constant)
1282 memcpy(vs_const_buff + vs->uniform_pending_offset + 32,
1283 vs->constant, vs->constant_size);
1284
1285 lima_dump_command_stream_print(
1286 vs_const_buff, size, true,
1287 "update gp uniform at va %x\n",
1288 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, 0));
1289 }
1290
1291 static void
1292 lima_update_pp_uniform(struct lima_context *ctx)
1293 {
1294 const float *const_buff = ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer;
1295 size_t const_buff_size = ctx->const_buffer[PIPE_SHADER_FRAGMENT].size / sizeof(float);
1296
1297 if (!const_buff)
1298 return;
1299
1300 uint16_t *fp16_const_buff =
1301 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform,
1302 const_buff_size * sizeof(uint16_t), true);
1303
1304 uint32_t *array =
1305 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform_array, 4, true);
1306
1307 for (int i = 0; i < const_buff_size; i++)
1308 fp16_const_buff[i] = util_float_to_half(const_buff[i]);
1309
1310 *array = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, LIMA_CTX_BUFF_SUBMIT_PP);
1311
1312 lima_dump_command_stream_print(
1313 fp16_const_buff, const_buff_size * 2, false, "add pp uniform data at va %x\n",
1314 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, 0));
1315 lima_dump_command_stream_print(
1316 array, 4, false, "add pp uniform info at va %x\n",
1317 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, 0));
1318 }
1319
1320 static void
1321 lima_update_varying(struct lima_context *ctx, const struct pipe_draw_info *info)
1322 {
1323 struct lima_vs_shader_state *vs = ctx->vs;
1324
1325 uint32_t *varying =
1326 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_varying_info,
1327 vs->num_varying * 8, true);
1328 int n = 0;
1329
1330 /* should be LIMA_SUBMIT_BO_WRITE for GP, but each draw will use
1331 * different part of this bo, so no need to set exclusive constraint */
1332 lima_ctx_buff_alloc(ctx, lima_ctx_buff_sh_gl_pos,
1333 4 * 4 * info->count, false);
1334
1335 /* for gl_Position */
1336 varying[n++] =
1337 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos,
1338 LIMA_CTX_BUFF_SUBMIT_GP | LIMA_CTX_BUFF_SUBMIT_PP);
1339 varying[n++] = 0x8020;
1340
1341 int offset = 0;
1342 for (int i = 1; i < vs->num_varying; i++) {
1343 struct lima_varying_info *v = vs->varying + i;
1344 int size = v->component_size * 4;
1345
1346 /* does component_size == 2 need to be 16 aligned? */
1347 if (v->component_size == 4)
1348 offset = align(offset, 16);
1349
1350 v->offset = offset;
1351 offset += size;
1352 }
1353 vs->varying_stride = align(offset, 16);
1354
1355 if (vs->num_varying > 1)
1356 lima_ctx_buff_alloc(ctx, lima_ctx_buff_sh_varying,
1357 vs->varying_stride * info->count, false);
1358
1359 for (int i = 1; i < vs->num_varying; i++) {
1360 struct lima_varying_info *v = vs->varying + i;
1361 varying[n++] =
1362 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_varying, LIMA_CTX_BUFF_SUBMIT_GP) +
1363 v->offset;
1364 varying[n++] = (vs->varying_stride << 11) | (v->components - 1) |
1365 (v->component_size == 2 ? 0x0C : 0);
1366 }
1367
1368 lima_dump_command_stream_print(
1369 varying, n * 4, false, "update varying info at va %x\n",
1370 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, 0));
1371 }
1372
1373 static void
1374 lima_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
1375 {
1376 /* check if draw mode and vertex/index count match,
1377 * otherwise gp will hang */
1378 if (!u_trim_pipe_prim(info->mode, (unsigned*)&info->count)) {
1379 debug_printf("draw mode and vertex/index count mismatch\n");
1380 return;
1381 }
1382
1383 struct lima_context *ctx = lima_context(pctx);
1384
1385 if (!ctx->vs || !ctx->fs) {
1386 debug_warn_once("no shader, skip draw\n");
1387 return;
1388 }
1389
1390 if (!lima_update_vs_state(ctx) || !lima_update_fs_state(ctx))
1391 return;
1392
1393 lima_dump_command_stream_print(
1394 ctx->vs->bo->map, ctx->vs->shader_size, false,
1395 "add vs at va %x\n", ctx->vs->bo->va);
1396
1397 lima_dump_command_stream_print(
1398 ctx->fs->bo->map, ctx->fs->shader_size, false,
1399 "add fs at va %x\n", ctx->fs->bo->va);
1400
1401 lima_submit_add_bo(ctx->gp_submit, ctx->vs->bo, LIMA_SUBMIT_BO_READ);
1402 lima_submit_add_bo(ctx->pp_submit, ctx->fs->bo, LIMA_SUBMIT_BO_READ);
1403
1404 lima_update_submit_bo(ctx);
1405
1406 /* Mali Utgard GPU always need min/max index info for index draw,
1407 * compute it if upper layer does not do for us */
1408 if (info->index_size && info->max_index == ~0u)
1409 u_vbuf_get_minmax_index(pctx, info, &ctx->min_index, &ctx->max_index);
1410 else {
1411 ctx->min_index = info->min_index;
1412 ctx->max_index = info->max_index;
1413 }
1414
1415 lima_update_gp_attribute_info(ctx, info);
1416
1417 if ((ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1418 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty) ||
1419 ctx->dirty & LIMA_CONTEXT_DIRTY_VIEWPORT ||
1420 ctx->dirty & LIMA_CONTEXT_DIRTY_SHADER_VERT) {
1421 lima_update_gp_uniform(ctx);
1422 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty = false;
1423 }
1424
1425 lima_update_varying(ctx, info);
1426
1427 /* If it's zero scissor, don't build vs cmd list */
1428 if (!lima_is_scissor_zero(ctx))
1429 lima_pack_vs_cmd(ctx, info);
1430
1431 if (ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1432 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty) {
1433 lima_update_pp_uniform(ctx);
1434 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty = false;
1435 }
1436
1437 if (ctx->dirty & LIMA_CONTEXT_DIRTY_TEXTURES)
1438 lima_update_textures(ctx);
1439
1440 lima_pack_render_state(ctx, info);
1441 lima_pack_plbu_cmd(ctx, info);
1442
1443 ctx->dirty = 0;
1444 }
1445
1446 static void
1447 lima_finish_plbu_cmd(struct lima_context *ctx)
1448 {
1449 int i = 0;
1450 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + 2 * 4);
1451
1452 plbu_cmd[i++] = 0x00000000;
1453 plbu_cmd[i++] = 0x50000000; /* END */
1454
1455 ctx->plbu_cmd_array.size += i * 4;
1456 }
1457
1458 static void
1459 lima_pack_wb_zsbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1460 {
1461 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1462 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
1463 int level = fb->base.zsbuf->u.tex.level;
1464 uint32_t format = lima_format_get_pixel(fb->base.zsbuf->format);
1465
1466 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1467 wb[wb_idx].type = 0x01; /* 1 for depth, stencil */
1468 wb[wb_idx].address = res->bo->va + res->levels[level].offset;
1469 wb[wb_idx].pixel_format = format;
1470 if (res->tiled) {
1471 wb[wb_idx].pixel_layout = 0x2;
1472 wb[wb_idx].pitch = fb->tiled_w;
1473 } else {
1474 wb[wb_idx].pixel_layout = 0x0;
1475 wb[wb_idx].pitch = res->levels[level].stride / 8;
1476 }
1477 wb[wb_idx].mrt_bits = 0;
1478 }
1479
1480 static void
1481 lima_pack_wb_cbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1482 {
1483 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1484 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
1485 int level = fb->base.cbufs[0]->u.tex.level;
1486 uint32_t format = lima_format_get_pixel(fb->base.cbufs[0]->format);
1487 bool swap_channels = lima_format_get_swap_rb(fb->base.cbufs[0]->format);
1488
1489 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1490 wb[wb_idx].type = 0x02; /* 2 for color buffer */
1491 wb[wb_idx].address = res->bo->va + res->levels[level].offset;
1492 wb[wb_idx].pixel_format = format;
1493 if (res->tiled) {
1494 wb[wb_idx].pixel_layout = 0x2;
1495 wb[wb_idx].pitch = fb->tiled_w;
1496 } else {
1497 wb[wb_idx].pixel_layout = 0x0;
1498 wb[wb_idx].pitch = res->levels[level].stride / 8;
1499 }
1500 wb[wb_idx].mrt_bits = swap_channels ? 0x4 : 0x0;
1501 }
1502
1503
1504 static void
1505 lima_pack_pp_frame_reg(struct lima_context *ctx, uint32_t *frame_reg,
1506 uint32_t *wb_reg)
1507 {
1508 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1509 struct lima_pp_frame_reg *frame = (void *)frame_reg;
1510 struct lima_screen *screen = lima_screen(ctx->base.screen);
1511 int wb_idx = 0;
1512
1513 frame->render_address = screen->pp_buffer->va + pp_frame_rsw_offset;
1514 frame->flags = 0x02;
1515 frame->clear_value_depth = ctx->clear.depth;
1516 frame->clear_value_stencil = ctx->clear.stencil;
1517 frame->clear_value_color = ctx->clear.color_8pc;
1518 frame->clear_value_color_1 = ctx->clear.color_8pc;
1519 frame->clear_value_color_2 = ctx->clear.color_8pc;
1520 frame->clear_value_color_3 = ctx->clear.color_8pc;
1521 frame->one = 1;
1522
1523 frame->width = fb->base.width - 1;
1524 frame->height = fb->base.height - 1;
1525
1526 /* frame->fragment_stack_address is overwritten per-pp in the kernel
1527 * by the values of pp_frame.fragment_stack_address[i] */
1528
1529 /* These are "stack size" and "stack offset" shifted,
1530 * here they are assumed to be always the same. */
1531 uint32_t fs_stack_size = ctx->fs ? ctx->fs->stack_size : 0;
1532 frame->fragment_stack_size = fs_stack_size << 16 | fs_stack_size;
1533
1534 /* related with MSAA and different value when r4p0/r7p0 */
1535 frame->supersampled_height = fb->base.height * 2 - 1;
1536 frame->scale = 0xE0C;
1537
1538 frame->dubya = 0x77;
1539 frame->onscreen = 1;
1540 frame->blocking = (fb->shift_min << 28) | (fb->shift_h << 16) | fb->shift_w;
1541 frame->foureight = 0x8888;
1542
1543 if (fb->base.nr_cbufs)
1544 lima_pack_wb_cbuf_reg(ctx, wb_reg, wb_idx++);
1545
1546 /* Mali4x0 can use on-tile buffer for depth/stencil, so to save some
1547 * memory bandwidth don't write depth/stencil back to memory if we're
1548 * rendering to scanout
1549 */
1550 if (!lima_is_scanout(ctx) && fb->base.zsbuf)
1551 lima_pack_wb_zsbuf_reg(ctx, wb_reg, wb_idx++);
1552 }
1553
1554 static void
1555 _lima_flush(struct lima_context *ctx, bool end_of_frame)
1556 {
1557 #define pp_stack_pp_size 0x400
1558
1559 lima_finish_plbu_cmd(ctx);
1560
1561 int vs_cmd_size = ctx->vs_cmd_array.size;
1562 int plbu_cmd_size = ctx->plbu_cmd_array.size;
1563 uint32_t vs_cmd_va = 0;
1564 uint32_t plbu_cmd_va;
1565
1566 if (vs_cmd_size) {
1567 void *vs_cmd =
1568 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_vs_cmd, vs_cmd_size, true);
1569 memcpy(vs_cmd, util_dynarray_begin(&ctx->vs_cmd_array), vs_cmd_size);
1570 util_dynarray_clear(&ctx->vs_cmd_array);
1571 vs_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_vs_cmd,
1572 LIMA_CTX_BUFF_SUBMIT_GP);
1573
1574 lima_dump_command_stream_print(
1575 vs_cmd, vs_cmd_size, false, "flush vs cmd at va %x\n", vs_cmd_va);
1576 }
1577
1578 void *plbu_cmd =
1579 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_plbu_cmd, plbu_cmd_size, true);
1580 memcpy(plbu_cmd, util_dynarray_begin(&ctx->plbu_cmd_array), plbu_cmd_size);
1581 util_dynarray_clear(&ctx->plbu_cmd_array);
1582 plbu_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_plbu_cmd,
1583 LIMA_CTX_BUFF_SUBMIT_GP);
1584
1585 lima_dump_command_stream_print(
1586 plbu_cmd, plbu_cmd_size, false, "flush plbu cmd at va %x\n", plbu_cmd_va);
1587
1588 struct lima_screen *screen = lima_screen(ctx->base.screen);
1589 struct drm_lima_gp_frame gp_frame;
1590 struct lima_gp_frame_reg *gp_frame_reg = (void *)gp_frame.frame;
1591 gp_frame_reg->vs_cmd_start = vs_cmd_va;
1592 gp_frame_reg->vs_cmd_end = vs_cmd_va + vs_cmd_size;
1593 gp_frame_reg->plbu_cmd_start = plbu_cmd_va;
1594 gp_frame_reg->plbu_cmd_end = plbu_cmd_va + plbu_cmd_size;
1595 gp_frame_reg->tile_heap_start = ctx->gp_tile_heap[ctx->plb_index]->va;
1596 gp_frame_reg->tile_heap_end = ctx->gp_tile_heap[ctx->plb_index]->va + gp_tile_heap_size;
1597
1598 lima_dump_command_stream_print(
1599 &gp_frame, sizeof(gp_frame), false, "add gp frame\n");
1600
1601 if (!lima_submit_start(ctx->gp_submit, &gp_frame, sizeof(gp_frame)))
1602 fprintf(stderr, "gp submit error\n");
1603
1604 if (lima_dump_command_stream) {
1605 if (lima_submit_wait(ctx->gp_submit, PIPE_TIMEOUT_INFINITE)) {
1606 if (ctx->buffer_state[lima_ctx_buff_sh_gl_pos].res) {
1607 float *pos = lima_ctx_buff_map(ctx, lima_ctx_buff_sh_gl_pos);
1608 lima_dump_command_stream_print(
1609 pos, 4 * 4 * 16, true, "gl_pos dump at va %x\n",
1610 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos, 0));
1611 }
1612
1613 uint32_t *plb = lima_bo_map(ctx->plb[ctx->plb_index]);
1614 lima_dump_command_stream_print(
1615 plb, LIMA_CTX_PLB_BLK_SIZE, false, "plb dump at va %x\n",
1616 ctx->plb[ctx->plb_index]->va);
1617 }
1618 else {
1619 fprintf(stderr, "gp submit wait error\n");
1620 exit(1);
1621 }
1622 }
1623
1624 uint32_t pp_stack_va = 0;
1625 if (ctx->pp_max_stack_size) {
1626 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_stack, screen->num_pp *
1627 ctx->pp_max_stack_size * pp_stack_pp_size, true);
1628 pp_stack_va = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_stack,
1629 LIMA_CTX_BUFF_SUBMIT_PP);
1630 }
1631
1632 struct lima_pp_stream_state *ps = &ctx->pp_stream;
1633 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI400) {
1634 struct drm_lima_m400_pp_frame pp_frame = {0};
1635 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1636 pp_frame.num_pp = screen->num_pp;
1637
1638 for (int i = 0; i < screen->num_pp; i++) {
1639 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1640 if (ctx->pp_max_stack_size)
1641 pp_frame.fragment_stack_address[i] = pp_stack_va +
1642 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1643 }
1644
1645 lima_dump_command_stream_print(
1646 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1647
1648 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1649 fprintf(stderr, "pp submit error\n");
1650 }
1651 else {
1652 struct drm_lima_m450_pp_frame pp_frame = {0};
1653 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1654 pp_frame.num_pp = screen->num_pp;
1655
1656 if (ctx->pp_max_stack_size)
1657 for (int i = 0; i < screen->num_pp; i++)
1658 pp_frame.fragment_stack_address[i] = pp_stack_va +
1659 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1660
1661 if (ps->bo) {
1662 for (int i = 0; i < screen->num_pp; i++)
1663 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1664 }
1665 else {
1666 pp_frame.use_dlbu = true;
1667
1668 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1669 pp_frame.dlbu_regs[0] = ctx->plb[ctx->plb_index]->va;
1670 pp_frame.dlbu_regs[1] = ((fb->tiled_h - 1) << 16) | (fb->tiled_w - 1);
1671 unsigned s = util_logbase2(LIMA_CTX_PLB_BLK_SIZE) - 7;
1672 pp_frame.dlbu_regs[2] = (s << 28) | (fb->shift_h << 16) | fb->shift_w;
1673 pp_frame.dlbu_regs[3] = ((fb->tiled_h - 1) << 24) | ((fb->tiled_w - 1) << 16);
1674 }
1675
1676 lima_dump_command_stream_print(
1677 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1678
1679 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1680 fprintf(stderr, "pp submit error\n");
1681 }
1682
1683 if (lima_dump_command_stream) {
1684 if (!lima_submit_wait(ctx->pp_submit, PIPE_TIMEOUT_INFINITE)) {
1685 fprintf(stderr, "pp wait error\n");
1686 exit(1);
1687 }
1688 }
1689
1690 ctx->plb_index = (ctx->plb_index + 1) % lima_ctx_num_plb;
1691
1692 if (ctx->framebuffer.base.nr_cbufs) {
1693 /* Set reload flag for next draw. It'll be unset if buffer is cleared */
1694 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
1695 surf->reload = true;
1696 }
1697
1698 ctx->pp_max_stack_size = 0;
1699 }
1700
1701 void
1702 lima_flush(struct lima_context *ctx)
1703 {
1704 if (!lima_ctx_dirty(ctx))
1705 return;
1706
1707 _lima_flush(ctx, false);
1708 }
1709
1710 static void
1711 lima_pipe_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
1712 unsigned flags)
1713 {
1714 struct lima_context *ctx = lima_context(pctx);
1715 if (lima_ctx_dirty(ctx))
1716 _lima_flush(ctx, flags & PIPE_FLUSH_END_OF_FRAME);
1717
1718 if (fence) {
1719 int fd;
1720 if (lima_submit_get_out_sync(ctx->pp_submit, &fd))
1721 *fence = lima_fence_create(fd);
1722 }
1723 }
1724
1725 void
1726 lima_draw_init(struct lima_context *ctx)
1727 {
1728 ctx->base.clear = lima_clear;
1729 ctx->base.draw_vbo = lima_draw_vbo;
1730 ctx->base.flush = lima_pipe_flush;
1731 }