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[mesa.git] / src / gallium / drivers / lima / lima_draw.c
1 /*
2 * Copyright (c) 2011-2013 Luc Verhaegen <libv@skynet.be>
3 * Copyright (c) 2017-2019 Lima Project
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include "util/u_math.h"
27 #include "util/u_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_half.h"
30 #include "util/u_helpers.h"
31 #include "util/u_inlines.h"
32 #include "util/u_pack_color.h"
33 #include "util/hash_table.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36 #include "util/u_vbuf.h"
37
38 #include "lima_context.h"
39 #include "lima_screen.h"
40 #include "lima_resource.h"
41 #include "lima_program.h"
42 #include "lima_bo.h"
43 #include "lima_submit.h"
44 #include "lima_texture.h"
45 #include "lima_util.h"
46 #include "lima_fence.h"
47 #include "lima_format.h"
48
49 #include <drm-uapi/lima_drm.h>
50
51 struct lima_gp_frame_reg {
52 uint32_t vs_cmd_start;
53 uint32_t vs_cmd_end;
54 uint32_t plbu_cmd_start;
55 uint32_t plbu_cmd_end;
56 uint32_t tile_heap_start;
57 uint32_t tile_heap_end;
58 };
59
60 struct lima_pp_frame_reg {
61 uint32_t plbu_array_address;
62 uint32_t render_address;
63 uint32_t unused_0;
64 uint32_t flags;
65 uint32_t clear_value_depth;
66 uint32_t clear_value_stencil;
67 uint32_t clear_value_color;
68 uint32_t clear_value_color_1;
69 uint32_t clear_value_color_2;
70 uint32_t clear_value_color_3;
71 uint32_t width;
72 uint32_t height;
73 uint32_t fragment_stack_address;
74 uint32_t fragment_stack_size;
75 uint32_t unused_1;
76 uint32_t unused_2;
77 uint32_t one;
78 uint32_t supersampled_height;
79 uint32_t dubya;
80 uint32_t onscreen;
81 uint32_t blocking;
82 uint32_t scale;
83 uint32_t foureight;
84 };
85
86 struct lima_pp_wb_reg {
87 uint32_t type;
88 uint32_t address;
89 uint32_t pixel_format;
90 uint32_t downsample_factor;
91 uint32_t pixel_layout;
92 uint32_t pitch;
93 uint32_t mrt_bits;
94 uint32_t mrt_pitch;
95 uint32_t zero;
96 uint32_t unused0;
97 uint32_t unused1;
98 uint32_t unused2;
99 };
100
101 struct lima_render_state {
102 uint32_t blend_color_bg;
103 uint32_t blend_color_ra;
104 uint32_t alpha_blend;
105 uint32_t depth_test;
106 uint32_t depth_range;
107 uint32_t stencil_front;
108 uint32_t stencil_back;
109 uint32_t stencil_test;
110 uint32_t multi_sample;
111 uint32_t shader_address;
112 uint32_t varying_types;
113 uint32_t uniforms_address;
114 uint32_t textures_address;
115 uint32_t aux0;
116 uint32_t aux1;
117 uint32_t varyings_address;
118 };
119
120
121 /* plbu commands */
122 #define PLBU_CMD_BEGIN(max) { \
123 int i = 0, max_n = max; \
124 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + max_n * 4);
125
126 #define PLBU_CMD_END() \
127 assert(i <= max_n); \
128 ctx->plbu_cmd_array.size += i * 4; \
129 }
130
131 #define PLBU_CMD(v1, v2) \
132 do { \
133 plbu_cmd[i++] = v1; \
134 plbu_cmd[i++] = v2; \
135 } while (0)
136
137 #define PLBU_CMD_BLOCK_STEP(shift_min, shift_h, shift_w) \
138 PLBU_CMD(((shift_min) << 28) | ((shift_h) << 16) | (shift_w), 0x1000010C)
139 #define PLBU_CMD_TILED_DIMENSIONS(tiled_w, tiled_h) \
140 PLBU_CMD((((tiled_w) - 1) << 24) | (((tiled_h) - 1) << 8), 0x10000109)
141 #define PLBU_CMD_BLOCK_STRIDE(block_w) PLBU_CMD((block_w) & 0xff, 0x30000000)
142 #define PLBU_CMD_ARRAY_ADDRESS(gp_stream, block_num) \
143 PLBU_CMD(gp_stream, 0x28000000 | ((block_num) - 1) | 1)
144 #define PLBU_CMD_VIEWPORT_LEFT(v) PLBU_CMD(v, 0x10000107)
145 #define PLBU_CMD_VIEWPORT_RIGHT(v) PLBU_CMD(v, 0x10000108)
146 #define PLBU_CMD_VIEWPORT_BOTTOM(v) PLBU_CMD(v, 0x10000105)
147 #define PLBU_CMD_VIEWPORT_TOP(v) PLBU_CMD(v, 0x10000106)
148 #define PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN() PLBU_CMD(0x00010002, 0x60000000)
149 #define PLBU_CMD_ARRAYS_SEMAPHORE_END() PLBU_CMD(0x00010001, 0x60000000)
150 #define PLBU_CMD_PRIMITIVE_SETUP(low_prim, cull, index_size) \
151 PLBU_CMD(((low_prim) ? 0x00003200 : 0x00002200) | (cull) | ((index_size) << 9), 0x1000010B)
152 #define PLBU_CMD_RSW_VERTEX_ARRAY(rsw, gl_pos) \
153 PLBU_CMD(rsw, 0x80000000 | ((gl_pos) >> 4))
154 #define PLBU_CMD_SCISSORS(minx, maxx, miny, maxy) \
155 PLBU_CMD(((minx) << 30) | ((maxy) - 1) << 15 | (miny), \
156 0x70000000 | ((maxx) - 1) << 13 | ((minx) >> 2))
157 #define PLBU_CMD_UNKNOWN1() PLBU_CMD(0x00000000, 0x1000010A)
158 #define PLBU_CMD_UNKNOWN2() PLBU_CMD(0x00000200, 0x1000010B)
159 #define PLBU_CMD_LOW_PRIM_SIZE(v) PLBU_CMD(v, 0x1000010D)
160 #define PLBU_CMD_DEPTH_RANGE_NEAR(v) PLBU_CMD(v, 0x1000010E)
161 #define PLBU_CMD_DEPTH_RANGE_FAR(v) PLBU_CMD(v, 0x1000010F)
162 #define PLBU_CMD_INDEXED_DEST(gl_pos) PLBU_CMD(gl_pos, 0x10000100)
163 #define PLBU_CMD_INDICES(va) PLBU_CMD(va, 0x10000101)
164 #define PLBU_CMD_DRAW_ARRAYS(mode, start, count) \
165 PLBU_CMD(((count) << 24) | (start), (((mode) & 0x1F) << 16) | ((count) >> 8))
166 #define PLBU_CMD_DRAW_ELEMENTS(mode, start, count) \
167 PLBU_CMD(((count) << 24) | (start), \
168 0x00200000 | (((mode) & 0x1F) << 16) | ((count) >> 8))
169
170 /* vs commands */
171 #define VS_CMD_BEGIN(max) { \
172 int i = 0, max_n = max; \
173 uint32_t *vs_cmd = util_dynarray_ensure_cap(&ctx->vs_cmd_array, ctx->vs_cmd_array.size + max_n * 4);
174
175 #define VS_CMD_END() \
176 assert(i <= max_n); \
177 ctx->vs_cmd_array.size += i * 4; \
178 }
179
180 #define VS_CMD(v1, v2) \
181 do { \
182 vs_cmd[i++] = v1; \
183 vs_cmd[i++] = v2; \
184 } while (0)
185
186 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1() VS_CMD(0x00028000, 0x50000000)
187 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2() VS_CMD(0x00000001, 0x50000000)
188 #define VS_CMD_ARRAYS_SEMAPHORE_END(index_draw) \
189 VS_CMD((index_draw) ? 0x00018000 : 0x00000000, 0x50000000)
190 #define VS_CMD_UNIFORMS_ADDRESS(addr, size) \
191 VS_CMD(addr, 0x30000000 | ((size) << 12))
192 #define VS_CMD_SHADER_ADDRESS(addr, size) \
193 VS_CMD(addr, 0x40000000 | ((size) << 12))
194 #define VS_CMD_SHADER_INFO(prefetch, size) \
195 VS_CMD(((prefetch) << 20) | ((((size) >> 4) - 1) << 10), 0x10000040)
196 #define VS_CMD_VARYING_ATTRIBUTE_COUNT(nv, na) \
197 VS_CMD((((nv) - 1) << 8) | (((na) - 1) << 24), 0x10000042)
198 #define VS_CMD_UNKNOWN1() VS_CMD(0x00000003, 0x10000041)
199 #define VS_CMD_UNKNOWN2() VS_CMD(0x00000000, 0x60000000)
200 #define VS_CMD_ATTRIBUTES_ADDRESS(addr, na) \
201 VS_CMD(addr, 0x20000000 | ((na) << 17))
202 #define VS_CMD_VARYINGS_ADDRESS(addr, nv) \
203 VS_CMD(addr, 0x20000008 | ((nv) << 17))
204 #define VS_CMD_DRAW(num, index_draw) \
205 VS_CMD(((num) << 24) | ((index_draw) ? 1 : 0), ((num) >> 8))
206
207 static inline bool
208 lima_ctx_dirty(struct lima_context *ctx)
209 {
210 return ctx->plbu_cmd_array.size;
211 }
212
213 static inline struct lima_damage_region *
214 lima_ctx_get_damage(struct lima_context *ctx)
215 {
216 if (!ctx->framebuffer.base.nr_cbufs)
217 return NULL;
218
219 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
220 struct lima_resource *res = lima_resource(surf->base.texture);
221 return &res->damage;
222 }
223
224 static bool
225 lima_fb_need_reload(struct lima_context *ctx)
226 {
227 /* Depth buffer is always discarded */
228 if (!ctx->framebuffer.base.nr_cbufs)
229 return false;
230
231 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
232 struct lima_resource *res = lima_resource(surf->base.texture);
233 if (res->damage.region) {
234 /* for EGL_KHR_partial_update, when EGL_EXT_buffer_age is enabled,
235 * we need to reload damage region, otherwise just want to reload
236 * the region not aligned to tile boundary */
237 //if (!res->damage.aligned)
238 // return true;
239 return true;
240 }
241 else if (surf->reload)
242 return true;
243
244 return false;
245 }
246
247 static void
248 lima_pack_reload_plbu_cmd(struct lima_context *ctx)
249 {
250 #define lima_reload_render_state_offset 0x0000
251 #define lima_reload_gl_pos_offset 0x0040
252 #define lima_reload_varying_offset 0x0080
253 #define lima_reload_tex_desc_offset 0x00c0
254 #define lima_reload_tex_array_offset 0x0100
255 #define lima_reload_buffer_size 0x0140
256
257 void *cpu;
258 unsigned offset;
259 struct pipe_resource *pres = NULL;
260 u_upload_alloc(ctx->uploader, 0, lima_reload_buffer_size,
261 0x40, &offset, &pres, &cpu);
262
263 struct lima_resource *res = lima_resource(pres);
264 uint32_t va = res->bo->va + offset;
265
266 struct lima_screen *screen = lima_screen(ctx->base.screen);
267
268 uint32_t reload_shader_first_instr_size =
269 ((uint32_t *)(screen->pp_buffer->map + pp_reload_program_offset))[0] & 0x1f;
270 uint32_t reload_shader_va = screen->pp_buffer->va + pp_reload_program_offset;
271
272 struct lima_render_state reload_render_state = {
273 .alpha_blend = 0xf03b1ad2,
274 .depth_test = 0x0000000e,
275 .depth_range = 0xffff0000,
276 .stencil_front = 0x00000007,
277 .stencil_back = 0x00000007,
278 .multi_sample = 0x0000f007,
279 .shader_address = reload_shader_va | reload_shader_first_instr_size,
280 .varying_types = 0x00000001,
281 .textures_address = va + lima_reload_tex_array_offset,
282 .aux0 = 0x00004021,
283 .varyings_address = va + lima_reload_varying_offset,
284 };
285 memcpy(cpu + lima_reload_render_state_offset, &reload_render_state,
286 sizeof(reload_render_state));
287
288 struct lima_context_framebuffer *fb = &ctx->framebuffer;
289 lima_tex_desc *td = cpu + lima_reload_tex_desc_offset;
290 memset(td, 0, lima_min_tex_desc_size);
291 lima_texture_desc_set_res(ctx, td, fb->base.cbufs[0]->texture, 0, 0);
292 td->unnorm_coords = 1;
293 td->texture_type = LIMA_TEXTURE_TYPE_2D;
294 td->min_img_filter_nearest = 1;
295 td->mag_img_filter_nearest = 1;
296 td->wrap_s_clamp_to_edge = 1;
297 td->wrap_t_clamp_to_edge = 1;
298 td->unknown_2_2 = 0x1;
299
300 uint32_t *ta = cpu + lima_reload_tex_array_offset;
301 ta[0] = va + lima_reload_tex_desc_offset;
302
303 float reload_gl_pos[] = {
304 fb->base.width, 0, 0, 1,
305 0, 0, 0, 1,
306 0, fb->base.height, 0, 1,
307 };
308 memcpy(cpu + lima_reload_gl_pos_offset, reload_gl_pos,
309 sizeof(reload_gl_pos));
310
311 float reload_varying[] = {
312 fb->base.width, 0, 0, 0,
313 0, fb->base.height, 0, 0,
314 };
315 memcpy(cpu + lima_reload_varying_offset, reload_varying,
316 sizeof(reload_varying));
317
318 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
319 pipe_resource_reference(&pres, NULL);
320
321 PLBU_CMD_BEGIN(20);
322
323 PLBU_CMD_VIEWPORT_LEFT(0);
324 PLBU_CMD_VIEWPORT_RIGHT(fui(fb->base.width));
325 PLBU_CMD_VIEWPORT_BOTTOM(0);
326 PLBU_CMD_VIEWPORT_TOP(fui(fb->base.height));
327
328 PLBU_CMD_RSW_VERTEX_ARRAY(
329 va + lima_reload_render_state_offset,
330 va + lima_reload_gl_pos_offset);
331
332 PLBU_CMD_UNKNOWN2();
333 PLBU_CMD_UNKNOWN1();
334
335 PLBU_CMD_INDICES(screen->pp_buffer->va + pp_shared_index_offset);
336 PLBU_CMD_INDEXED_DEST(va + lima_reload_gl_pos_offset);
337 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
338
339 PLBU_CMD_END();
340 }
341
342 static void
343 lima_pack_head_plbu_cmd(struct lima_context *ctx)
344 {
345 /* first draw need create a PLBU command header */
346 if (lima_ctx_dirty(ctx))
347 return;
348
349 struct lima_context_framebuffer *fb = &ctx->framebuffer;
350
351 PLBU_CMD_BEGIN(10);
352
353 PLBU_CMD_UNKNOWN2();
354 PLBU_CMD_BLOCK_STEP(fb->shift_min, fb->shift_h, fb->shift_w);
355 PLBU_CMD_TILED_DIMENSIONS(fb->tiled_w, fb->tiled_h);
356 PLBU_CMD_BLOCK_STRIDE(fb->block_w);
357
358 PLBU_CMD_ARRAY_ADDRESS(
359 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size,
360 fb->block_w * fb->block_h);
361
362 PLBU_CMD_END();
363
364 if (lima_fb_need_reload(ctx))
365 lima_pack_reload_plbu_cmd(ctx);
366 }
367
368 static bool
369 lima_is_scissor_zero(struct lima_context *ctx)
370 {
371 if (!ctx->rasterizer || !ctx->rasterizer->base.scissor)
372 return false;
373
374 struct pipe_scissor_state *scissor = &ctx->scissor;
375 return
376 scissor->minx == scissor->maxx
377 && scissor->miny == scissor->maxy;
378 }
379
380 static void
381 hilbert_rotate(int n, int *x, int *y, int rx, int ry)
382 {
383 if (ry == 0) {
384 if (rx == 1) {
385 *x = n-1 - *x;
386 *y = n-1 - *y;
387 }
388
389 /* Swap x and y */
390 int t = *x;
391 *x = *y;
392 *y = t;
393 }
394 }
395
396 static void
397 hilbert_coords(int n, int d, int *x, int *y)
398 {
399 int rx, ry, i, t=d;
400
401 *x = *y = 0;
402
403 for (i = 0; (1 << i) < n; i++) {
404
405 rx = 1 & (t / 2);
406 ry = 1 & (t ^ rx);
407
408 hilbert_rotate(1 << i, x, y, rx, ry);
409
410 *x += rx << i;
411 *y += ry << i;
412
413 t /= 4;
414 }
415 }
416
417 static int
418 lima_get_pp_stream_size(int num_pp, int tiled_w, int tiled_h, uint32_t *off)
419 {
420 /* carefully calculate each stream start address:
421 * 1. overflow: each stream size may be different due to
422 * fb->tiled_w * fb->tiled_h can't be divided by num_pp,
423 * extra size should be added to the preceeding stream
424 * 2. alignment: each stream address should be 0x20 aligned
425 */
426 int delta = tiled_w * tiled_h / num_pp * 16 + 8;
427 int remain = tiled_w * tiled_h % num_pp;
428 int offset = 0;
429
430 for (int i = 0; i < num_pp; i++) {
431 off[i] = offset;
432
433 offset += delta;
434 if (remain) {
435 offset += 16;
436 remain--;
437 }
438 offset = align(offset, 0x20);
439 }
440
441 return offset;
442 }
443
444 static bool
445 inside_damage_region(int x, int y, struct lima_damage_region *ds)
446 {
447 if (!ds || !ds->region)
448 return true;
449
450 for (int i = 0; i < ds->num_region; i++) {
451 struct pipe_scissor_state *ss = ds->region + i;
452 if (x >= ss->minx && x < ss->maxx &&
453 y >= ss->miny && y < ss->maxy)
454 return true;
455 }
456
457 return false;
458 }
459
460 static void
461 lima_update_pp_stream(struct lima_context *ctx, int off_x, int off_y,
462 int tiled_w, int tiled_h)
463 {
464 struct lima_pp_stream_state *ps = &ctx->pp_stream;
465 struct lima_context_framebuffer *fb = &ctx->framebuffer;
466 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
467 struct lima_screen *screen = lima_screen(ctx->base.screen);
468 int i, num_pp = screen->num_pp;
469
470 /* use hilbert_coords to generates 1D to 2D relationship.
471 * 1D for pp stream index and 2D for plb block x/y on framebuffer.
472 * if multi pp, interleave the 1D index to make each pp's render target
473 * close enough which should result close workload
474 */
475 int max = MAX2(tiled_w, tiled_h);
476 int dim = util_logbase2_ceil(max);
477 int count = 1 << (dim + dim);
478 int index = 0;
479 uint32_t *stream[4];
480 int si[4] = {0};
481
482 for (i = 0; i < num_pp; i++)
483 stream[i] = ps->bo->map + ps->bo_offset + ps->offset[i];
484
485 for (i = 0; i < count; i++) {
486 int x, y;
487 hilbert_coords(max, i, &x, &y);
488 if (x < tiled_w && y < tiled_h) {
489 x += off_x;
490 y += off_y;
491
492 if (!inside_damage_region(x, y, damage))
493 continue;
494
495 int pp = index % num_pp;
496 int offset = ((y >> fb->shift_h) * fb->block_w +
497 (x >> fb->shift_w)) * LIMA_CTX_PLB_BLK_SIZE;
498 int plb_va = ctx->plb[ctx->plb_index]->va + offset;
499
500 stream[pp][si[pp]++] = 0;
501 stream[pp][si[pp]++] = 0xB8000000 | x | (y << 8);
502 stream[pp][si[pp]++] = 0xE0000002 | ((plb_va >> 3) & ~0xE0000003);
503 stream[pp][si[pp]++] = 0xB0000000;
504
505 index++;
506 }
507 }
508
509 for (i = 0; i < num_pp; i++) {
510 stream[i][si[i]++] = 0;
511 stream[i][si[i]++] = 0xBC000000;
512
513 lima_dump_command_stream_print(
514 stream[i], si[i] * 4, false, "pp plb stream %d at va %x\n",
515 i, ps->bo->va + ps->bo_offset + ps->offset[i]);
516 }
517 }
518
519 static void
520 lima_update_damage_pp_stream(struct lima_context *ctx)
521 {
522 struct lima_damage_region *ds = lima_ctx_get_damage(ctx);
523 struct pipe_scissor_state *bound = &ds->bound;
524
525 int tiled_w = bound->maxx - bound->minx;
526 int tiled_h = bound->maxy - bound->miny;
527 struct lima_screen *screen = lima_screen(ctx->base.screen);
528 int size = lima_get_pp_stream_size(
529 screen->num_pp, tiled_w, tiled_h, ctx->pp_stream.offset);
530
531 void *cpu;
532 unsigned offset;
533 struct pipe_resource *pres = NULL;
534 u_upload_alloc(ctx->uploader, 0, size, 0x40, &offset, &pres, &cpu);
535
536 struct lima_resource *res = lima_resource(pres);
537 ctx->pp_stream.bo = res->bo;
538 ctx->pp_stream.bo_offset = offset;
539
540 lima_update_pp_stream(ctx, bound->minx, bound->miny, tiled_w, tiled_h);
541
542 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
543 pipe_resource_reference(&pres, NULL);
544 }
545
546 static void
547 lima_update_full_pp_stream(struct lima_context *ctx)
548 {
549 struct lima_context_framebuffer *fb = &ctx->framebuffer;
550 struct lima_ctx_plb_pp_stream_key key = {
551 .plb_index = ctx->plb_index,
552 .tiled_w = fb->tiled_w,
553 .tiled_h = fb->tiled_h,
554 };
555
556 struct hash_entry *entry =
557 _mesa_hash_table_search(ctx->plb_pp_stream, &key);
558 struct lima_ctx_plb_pp_stream *s = entry->data;
559
560 if (s->bo) {
561 ctx->pp_stream.bo = s->bo;
562 ctx->pp_stream.bo_offset = 0;
563 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
564 }
565 else {
566 struct lima_screen *screen = lima_screen(ctx->base.screen);
567 int size = lima_get_pp_stream_size(
568 screen->num_pp, fb->tiled_w, fb->tiled_h, s->offset);
569 s->bo = lima_bo_create(screen, size, 0);
570 lima_bo_map(s->bo);
571
572 ctx->pp_stream.bo = s->bo;
573 ctx->pp_stream.bo_offset = 0;
574 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
575
576 lima_update_pp_stream(ctx, 0, 0, fb->tiled_w, fb->tiled_h);
577 }
578
579 lima_submit_add_bo(ctx->pp_submit, s->bo, LIMA_SUBMIT_BO_READ);
580 }
581
582 static void
583 lima_update_submit_bo(struct lima_context *ctx)
584 {
585 if (lima_ctx_dirty(ctx))
586 return;
587
588 struct lima_screen *screen = lima_screen(ctx->base.screen);
589 lima_submit_add_bo(ctx->gp_submit, ctx->plb_gp_stream, LIMA_SUBMIT_BO_READ);
590 lima_submit_add_bo(ctx->gp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
591 lima_submit_add_bo(ctx->gp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
592
593 lima_dump_command_stream_print(
594 ctx->plb_gp_stream->map + ctx->plb_index * ctx->plb_gp_size,
595 ctx->plb_gp_size, false, "gp plb stream at va %x\n",
596 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size);
597
598 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
599 if (damage && damage->region)
600 lima_update_damage_pp_stream(ctx);
601 else if (ctx->plb_pp_stream)
602 lima_update_full_pp_stream(ctx);
603 else
604 ctx->pp_stream.bo = NULL;
605
606 if (ctx->framebuffer.base.nr_cbufs) {
607 struct lima_resource *res = lima_resource(ctx->framebuffer.base.cbufs[0]->texture);
608 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
609 }
610 if (ctx->framebuffer.base.zsbuf) {
611 struct lima_resource *res = lima_resource(ctx->framebuffer.base.zsbuf->texture);
612 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
613 }
614 lima_submit_add_bo(ctx->pp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_READ);
615 lima_submit_add_bo(ctx->pp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_READ);
616 lima_submit_add_bo(ctx->pp_submit, screen->pp_buffer, LIMA_SUBMIT_BO_READ);
617 }
618
619 static void
620 lima_clear(struct pipe_context *pctx, unsigned buffers,
621 const union pipe_color_union *color, double depth, unsigned stencil)
622 {
623 struct lima_context *ctx = lima_context(pctx);
624
625 lima_flush(ctx);
626
627 /* no need to reload if cleared */
628 if (ctx->framebuffer.base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0)) {
629 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
630 surf->reload = false;
631 }
632
633 struct lima_context_clear *clear = &ctx->clear;
634 clear->buffers = buffers;
635
636 if (buffers & PIPE_CLEAR_COLOR0) {
637 clear->color_8pc =
638 ((uint32_t)float_to_ubyte(color->f[3]) << 24) |
639 ((uint32_t)float_to_ubyte(color->f[2]) << 16) |
640 ((uint32_t)float_to_ubyte(color->f[1]) << 8) |
641 float_to_ubyte(color->f[0]);
642
643 clear->color_16pc =
644 ((uint64_t)float_to_ushort(color->f[3]) << 48) |
645 ((uint64_t)float_to_ushort(color->f[2]) << 32) |
646 ((uint64_t)float_to_ushort(color->f[1]) << 16) |
647 float_to_ushort(color->f[0]);
648 }
649
650 if (buffers & PIPE_CLEAR_DEPTH)
651 clear->depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
652
653 if (buffers & PIPE_CLEAR_STENCIL)
654 clear->stencil = stencil;
655
656 lima_update_submit_bo(ctx);
657
658 lima_pack_head_plbu_cmd(ctx);
659
660 ctx->dirty |= LIMA_CONTEXT_DIRTY_CLEAR;
661 }
662
663 enum lima_attrib_type {
664 LIMA_ATTRIB_FLOAT = 0x000,
665 /* todo: find out what lives here. */
666 LIMA_ATTRIB_I16 = 0x004,
667 LIMA_ATTRIB_U16 = 0x005,
668 LIMA_ATTRIB_I8 = 0x006,
669 LIMA_ATTRIB_U8 = 0x007,
670 LIMA_ATTRIB_I8N = 0x008,
671 LIMA_ATTRIB_U8N = 0x009,
672 LIMA_ATTRIB_I16N = 0x00A,
673 LIMA_ATTRIB_U16N = 0x00B,
674 /* todo: where is the 32 int */
675 /* todo: find out what lives here. */
676 LIMA_ATTRIB_FIXED = 0x101
677 };
678
679 static enum lima_attrib_type
680 lima_pipe_format_to_attrib_type(enum pipe_format format)
681 {
682 const struct util_format_description *desc = util_format_description(format);
683 int i = util_format_get_first_non_void_channel(format);
684 const struct util_format_channel_description *c = desc->channel + i;
685
686 switch (c->type) {
687 case UTIL_FORMAT_TYPE_FLOAT:
688 return LIMA_ATTRIB_FLOAT;
689 case UTIL_FORMAT_TYPE_FIXED:
690 return LIMA_ATTRIB_FIXED;
691 case UTIL_FORMAT_TYPE_SIGNED:
692 if (c->size == 8) {
693 if (c->normalized)
694 return LIMA_ATTRIB_I8N;
695 else
696 return LIMA_ATTRIB_I8;
697 }
698 else if (c->size == 16) {
699 if (c->normalized)
700 return LIMA_ATTRIB_I16N;
701 else
702 return LIMA_ATTRIB_I16;
703 }
704 break;
705 case UTIL_FORMAT_TYPE_UNSIGNED:
706 if (c->size == 8) {
707 if (c->normalized)
708 return LIMA_ATTRIB_U8N;
709 else
710 return LIMA_ATTRIB_U8;
711 }
712 else if (c->size == 16) {
713 if (c->normalized)
714 return LIMA_ATTRIB_U16N;
715 else
716 return LIMA_ATTRIB_U16;
717 }
718 break;
719 }
720
721 return LIMA_ATTRIB_FLOAT;
722 }
723
724 static void
725 lima_pack_vs_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
726 {
727 VS_CMD_BEGIN(24);
728
729 if (!info->index_size) {
730 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1();
731 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2();
732 }
733
734 int uniform_size = ctx->vs->uniform_pending_offset + ctx->vs->constant_size + 32;
735 VS_CMD_UNIFORMS_ADDRESS(
736 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, LIMA_CTX_BUFF_SUBMIT_GP),
737 align(uniform_size, 16));
738
739 VS_CMD_SHADER_ADDRESS(ctx->vs->bo->va, ctx->vs->shader_size);
740 VS_CMD_SHADER_INFO(ctx->vs->prefetch, ctx->vs->shader_size);
741
742 int num_varryings = ctx->vs->num_varying;
743 int num_attributes = ctx->vertex_elements->num_elements;
744 VS_CMD_VARYING_ATTRIBUTE_COUNT(num_varryings, MAX2(1, num_attributes));
745
746 VS_CMD_UNKNOWN1();
747
748 VS_CMD_ATTRIBUTES_ADDRESS(
749 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, LIMA_CTX_BUFF_SUBMIT_GP),
750 MAX2(1, num_attributes));
751
752 VS_CMD_VARYINGS_ADDRESS(
753 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, LIMA_CTX_BUFF_SUBMIT_GP),
754 num_varryings);
755
756 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
757 VS_CMD_DRAW(num, info->index_size);
758
759 VS_CMD_UNKNOWN2();
760
761 VS_CMD_ARRAYS_SEMAPHORE_END(info->index_size);
762
763 VS_CMD_END();
764 }
765
766 static void
767 lima_pack_plbu_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
768 {
769 struct lima_context_framebuffer *fb = &ctx->framebuffer;
770
771 lima_pack_head_plbu_cmd(ctx);
772
773 /* If it's zero scissor, we skip adding all other commands */
774 if (lima_is_scissor_zero(ctx))
775 return;
776
777 PLBU_CMD_BEGIN(30);
778
779 PLBU_CMD_VIEWPORT_LEFT(fui(ctx->viewport.left));
780 PLBU_CMD_VIEWPORT_RIGHT(fui(ctx->viewport.right));
781 PLBU_CMD_VIEWPORT_BOTTOM(fui(ctx->viewport.bottom));
782 PLBU_CMD_VIEWPORT_TOP(fui(ctx->viewport.top));
783
784 if (!info->index_size)
785 PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN();
786
787 bool low_prim = info->mode < PIPE_PRIM_TRIANGLES;
788 int cf = ctx->rasterizer->base.cull_face;
789 int ccw = ctx->rasterizer->base.front_ccw;
790 uint32_t cull = 0;
791 if (cf != PIPE_FACE_NONE) {
792 if (cf & PIPE_FACE_FRONT)
793 cull |= ccw ? 0x00040000 : 0x00020000;
794 if (cf & PIPE_FACE_BACK)
795 cull |= ccw ? 0x00020000 : 0x00040000;
796 }
797 PLBU_CMD_PRIMITIVE_SETUP(low_prim, cull, info->index_size);
798
799 uint32_t gl_position_va =
800 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos,
801 LIMA_CTX_BUFF_SUBMIT_GP | LIMA_CTX_BUFF_SUBMIT_PP);
802 PLBU_CMD_RSW_VERTEX_ARRAY(
803 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, LIMA_CTX_BUFF_SUBMIT_PP),
804 gl_position_va);
805
806 /* TODO
807 * - we should set it only for the first draw that enabled the scissor and for
808 * latter draw only if scissor is dirty
809 */
810 if (ctx->rasterizer->base.scissor) {
811 struct pipe_scissor_state *scissor = &ctx->scissor;
812 PLBU_CMD_SCISSORS(scissor->minx, scissor->maxx, scissor->miny, scissor->maxy);
813 } else {
814 PLBU_CMD_SCISSORS(0, fb->base.width, 0, fb->base.height);
815 }
816
817 PLBU_CMD_UNKNOWN1();
818
819 PLBU_CMD_DEPTH_RANGE_NEAR(fui(ctx->viewport.near));
820 PLBU_CMD_DEPTH_RANGE_FAR(fui(ctx->viewport.far));
821
822 if (low_prim) {
823 uint32_t v = info->mode == PIPE_PRIM_POINTS ?
824 fui(ctx->rasterizer->base.point_size) : fui(ctx->rasterizer->base.line_width);
825 PLBU_CMD_LOW_PRIM_SIZE(v);
826 }
827
828 if (info->index_size) {
829 PLBU_CMD_INDEXED_DEST(gl_position_va);
830
831 struct pipe_resource *indexbuf = NULL;
832 unsigned index_offset = 0;
833 struct lima_resource *res;
834 if (info->has_user_indices) {
835 util_upload_index_buffer(&ctx->base, info, &indexbuf, &index_offset);
836 res = lima_resource(indexbuf);
837 }
838 else
839 res = lima_resource(info->index.resource);
840
841 lima_submit_add_bo(ctx->gp_submit, res->bo, LIMA_SUBMIT_BO_READ);
842 PLBU_CMD_INDICES(res->bo->va + info->start * info->index_size + index_offset);
843
844 if (indexbuf)
845 pipe_resource_reference(&indexbuf, NULL);
846 }
847 else {
848 /* can this make the attribute info static? */
849 PLBU_CMD_DRAW_ARRAYS(info->mode, info->start, info->count);
850 }
851
852 PLBU_CMD_ARRAYS_SEMAPHORE_END();
853
854 if (info->index_size)
855 PLBU_CMD_DRAW_ELEMENTS(info->mode, ctx->min_index, info->count);
856
857 PLBU_CMD_END();
858 }
859
860 static int
861 lima_blend_func(enum pipe_blend_func pipe)
862 {
863 switch (pipe) {
864 case PIPE_BLEND_ADD:
865 return 2;
866 case PIPE_BLEND_SUBTRACT:
867 return 0;
868 case PIPE_BLEND_REVERSE_SUBTRACT:
869 return 1;
870 case PIPE_BLEND_MIN:
871 return 4;
872 case PIPE_BLEND_MAX:
873 return 5;
874 }
875 return -1;
876 }
877
878 static int
879 lima_blend_factor(enum pipe_blendfactor pipe)
880 {
881 switch (pipe) {
882 case PIPE_BLENDFACTOR_ONE:
883 return 11;
884 case PIPE_BLENDFACTOR_SRC_COLOR:
885 return 0;
886 case PIPE_BLENDFACTOR_SRC_ALPHA:
887 return 16;
888 case PIPE_BLENDFACTOR_DST_ALPHA:
889 return 17;
890 case PIPE_BLENDFACTOR_DST_COLOR:
891 return 1;
892 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
893 return 7;
894 case PIPE_BLENDFACTOR_CONST_COLOR:
895 return 2;
896 case PIPE_BLENDFACTOR_CONST_ALPHA:
897 return 18;
898 case PIPE_BLENDFACTOR_ZERO:
899 return 3;
900 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
901 return 8;
902 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
903 return 24;
904 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
905 return 25;
906 case PIPE_BLENDFACTOR_INV_DST_COLOR:
907 return 9;
908 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
909 return 10;
910 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
911 return 26;
912 case PIPE_BLENDFACTOR_SRC1_COLOR:
913 case PIPE_BLENDFACTOR_SRC1_ALPHA:
914 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
915 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
916 return -1; /* not support */
917 }
918 return -1;
919 }
920
921 static int
922 lima_calculate_alpha_blend(enum pipe_blend_func rgb_func, enum pipe_blend_func alpha_func,
923 enum pipe_blendfactor rgb_src_factor, enum pipe_blendfactor rgb_dst_factor,
924 enum pipe_blendfactor alpha_src_factor, enum pipe_blendfactor alpha_dst_factor)
925 {
926 return lima_blend_func(rgb_func) |
927 (lima_blend_func(alpha_func) << 3) |
928 (lima_blend_factor(rgb_src_factor) << 6) |
929 (lima_blend_factor(rgb_dst_factor) << 11) |
930 ((lima_blend_factor(alpha_src_factor) & 0xF) << 16) |
931 ((lima_blend_factor(alpha_dst_factor) & 0xF) << 20) |
932 0x0C000000; /* need check if this GLESv1 glAlphaFunc */
933 }
934
935 #if 0
936 static int
937 lima_stencil_op(enum pipe_stencil_op pipe)
938 {
939 switch (pipe) {
940 case PIPE_STENCIL_OP_KEEP:
941 return 0;
942 case PIPE_STENCIL_OP_ZERO:
943 return 2;
944 case PIPE_STENCIL_OP_REPLACE:
945 return 1;
946 case PIPE_STENCIL_OP_INCR:
947 return 6;
948 case PIPE_STENCIL_OP_DECR:
949 return 7;
950 case PIPE_STENCIL_OP_INCR_WRAP:
951 return 4;
952 case PIPE_STENCIL_OP_DECR_WRAP:
953 return 5;
954 case PIPE_STENCIL_OP_INVERT:
955 return 3;
956 }
957 return -1;
958 }
959 #endif
960
961 static int
962 lima_calculate_depth_test(struct pipe_depth_state *depth, struct pipe_rasterizer_state *rst)
963 {
964 enum pipe_compare_func func = (depth->enabled ? depth->func : PIPE_FUNC_ALWAYS);
965
966 int offset_scale = 0;
967
968 //TODO: implement polygon offset
969 #if 0
970 if (rst->offset_scale < -32)
971 offset_scale = -32;
972 else if (rst->offset_scale > 31)
973 offset_scale = 31;
974 else
975 offset_scale = rst->offset_scale * 4;
976
977 if (offset_scale < 0)
978 offset_scale = 0x100 + offset_scale;
979 #endif
980
981 return (depth->enabled && depth->writemask) |
982 ((int)func << 1) |
983 (offset_scale << 16) |
984 0x30; /* find out what is this */
985 }
986
987 static void
988 lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *info)
989 {
990 struct lima_render_state *render =
991 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_plb_rsw,
992 sizeof(*render), true);
993
994 /* do hw support RGBA independ blend?
995 * PIPE_CAP_INDEP_BLEND_ENABLE
996 *
997 * how to handle the no cbuf only zbuf case?
998 */
999 struct pipe_rt_blend_state *rt = ctx->blend->base.rt;
1000 render->blend_color_bg = float_to_ubyte(ctx->blend_color.color[2]) |
1001 (float_to_ubyte(ctx->blend_color.color[1]) << 16);
1002 render->blend_color_ra = float_to_ubyte(ctx->blend_color.color[0]) |
1003 (float_to_ubyte(ctx->blend_color.color[3]) << 16);
1004
1005 if (rt->blend_enable) {
1006 render->alpha_blend = lima_calculate_alpha_blend(rt->rgb_func, rt->alpha_func,
1007 rt->rgb_src_factor, rt->rgb_dst_factor,
1008 rt->alpha_src_factor, rt->alpha_dst_factor);
1009 }
1010 else {
1011 /*
1012 * Special handling for blending disabled.
1013 * Binary driver is generating the same alpha_value,
1014 * as when we would just enable blending, without changing/setting any blend equation/params.
1015 * Normaly in this case mesa would set all rt fields (func/factor) to zero.
1016 */
1017 render->alpha_blend = lima_calculate_alpha_blend(PIPE_BLEND_ADD, PIPE_BLEND_ADD,
1018 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO,
1019 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO);
1020 }
1021
1022 render->alpha_blend |= (rt->colormask & PIPE_MASK_RGBA) << 28;
1023
1024 struct pipe_rasterizer_state *rst = &ctx->rasterizer->base;
1025 struct pipe_depth_state *depth = &ctx->zsa->base.depth;
1026 render->depth_test = lima_calculate_depth_test(depth, rst);
1027
1028 /* overlap with plbu? any place can remove one? */
1029 render->depth_range = float_to_ushort(ctx->viewport.near) |
1030 (float_to_ushort(ctx->viewport.far) << 16);
1031
1032 #if 0
1033 struct pipe_stencil_state *stencil = ctx->zsa->base.stencil;
1034 struct pipe_stencil_ref *ref = &ctx->stencil_ref;
1035 render->stencil_front = stencil[0].func |
1036 (lima_stencil_op(stencil[0].fail_op) << 3) |
1037 (lima_stencil_op(stencil[0].zfail_op) << 6) |
1038 (lima_stencil_op(stencil[0].zpass_op) << 9) |
1039 (ref->ref_value[0] << 16) |
1040 (stencil[0].valuemask << 24);
1041 render->stencil_back = stencil[1].func |
1042 (lima_stencil_op(stencil[1].fail_op) << 3) |
1043 (lima_stencil_op(stencil[1].zfail_op) << 6) |
1044 (lima_stencil_op(stencil[1].zpass_op) << 9) |
1045 (ref->ref_value[1] << 16) |
1046 (stencil[1].valuemask << 24);
1047 #else
1048 render->stencil_front = 0xff000007;
1049 render->stencil_back = 0xff000007;
1050 #endif
1051
1052 /* seems not correct? */
1053 //struct pipe_alpha_state *alpha = &ctx->zsa->base.alpha;
1054 render->stencil_test = 0;
1055 //(stencil->enabled ? 0xFF : 0x00) | (float_to_ubyte(alpha->ref_value) << 16)
1056
1057 /* need more investigation */
1058 if (info->mode == PIPE_PRIM_POINTS)
1059 render->multi_sample = 0x0000F007;
1060 else if (info->mode < PIPE_PRIM_TRIANGLES)
1061 render->multi_sample = 0x0000F407;
1062 else
1063 render->multi_sample = 0x0000F807;
1064 if (ctx->framebuffer.base.samples)
1065 render->multi_sample |= 0x68;
1066
1067 render->shader_address =
1068 ctx->fs->bo->va | (((uint32_t *)ctx->fs->bo->map)[0] & 0x1F);
1069
1070 /* seems not needed */
1071 render->uniforms_address = 0x00000000;
1072
1073 render->textures_address = 0x00000000;
1074
1075 /* more investigation */
1076 render->aux0 = 0x00000300 | (ctx->vs->varying_stride >> 3);
1077 render->aux1 = 0x00003000;
1078
1079 if (ctx->tex_stateobj.num_samplers) {
1080 render->textures_address =
1081 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_tex_desc, LIMA_CTX_BUFF_SUBMIT_PP);
1082 render->aux0 |= ctx->tex_stateobj.num_samplers << 14;
1083 render->aux0 |= 0x20;
1084 }
1085
1086 if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
1087 render->uniforms_address =
1088 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, LIMA_CTX_BUFF_SUBMIT_PP);
1089 uint32_t size = ctx->buffer_state[lima_ctx_buff_pp_uniform].size;
1090 uint32_t bits = 0;
1091 if (size >= 8) {
1092 bits = util_last_bit(size >> 3) - 1;
1093 bits += size & u_bit_consecutive(0, bits + 3) ? 1 : 0;
1094 }
1095 render->uniforms_address |= bits > 0xf ? 0xf : bits;
1096
1097 render->aux0 |= 0x80;
1098 render->aux1 |= 0x10000;
1099 }
1100
1101 if (ctx->vs->num_varying > 1) {
1102 render->varying_types = 0x00000000;
1103 render->varyings_address =
1104 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_varying, LIMA_CTX_BUFF_SUBMIT_PP);
1105 for (int i = 1; i < ctx->vs->num_varying; i++) {
1106 int val;
1107
1108 struct lima_varying_info *v = ctx->vs->varying + i;
1109 if (v->component_size == 4)
1110 val = v->components > 2 ? 0 : 1;
1111 else
1112 val = v->components > 2 ? 2 : 3;
1113
1114 int index = i - 1;
1115 if (index < 10)
1116 render->varying_types |= val << (3 * index);
1117 else if (index == 10) {
1118 render->varying_types |= val << 30;
1119 render->varyings_address |= val >> 2;
1120 }
1121 else if (index == 11)
1122 render->varyings_address |= val << 1;
1123 }
1124 }
1125 else {
1126 render->varying_types = 0x00000000;
1127 render->varyings_address = 0x00000000;
1128 }
1129
1130 lima_dump_command_stream_print(
1131 render, sizeof(*render), false, "add render state at va %x\n",
1132 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, 0));
1133 }
1134
1135 static void
1136 lima_update_gp_attribute_info(struct lima_context *ctx, const struct pipe_draw_info *info)
1137 {
1138 struct lima_vertex_element_state *ve = ctx->vertex_elements;
1139 struct lima_context_vertex_buffer *vb = &ctx->vertex_buffers;
1140
1141 uint32_t *attribute =
1142 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_attribute_info,
1143 MAX2(1, ve->num_elements) * 8, true);
1144
1145 int n = 0;
1146 for (int i = 0; i < ve->num_elements; i++) {
1147 struct pipe_vertex_element *pve = ve->pipe + i;
1148
1149 assert(pve->vertex_buffer_index < vb->count);
1150 assert(vb->enabled_mask & (1 << pve->vertex_buffer_index));
1151
1152 struct pipe_vertex_buffer *pvb = vb->vb + pve->vertex_buffer_index;
1153 struct lima_resource *res = lima_resource(pvb->buffer.resource);
1154
1155 lima_submit_add_bo(ctx->gp_submit, res->bo, LIMA_SUBMIT_BO_READ);
1156
1157 unsigned start = info->index_size ? (ctx->min_index + info->index_bias) : info->start;
1158 attribute[n++] = res->bo->va + pvb->buffer_offset + pve->src_offset
1159 + start * pvb->stride;
1160 attribute[n++] = (pvb->stride << 11) |
1161 (lima_pipe_format_to_attrib_type(pve->src_format) << 2) |
1162 (util_format_get_nr_components(pve->src_format) - 1);
1163 }
1164
1165 lima_dump_command_stream_print(
1166 attribute, n * 4, false, "update attribute info at va %x\n",
1167 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, 0));
1168 }
1169
1170 static void
1171 lima_update_gp_uniform(struct lima_context *ctx)
1172 {
1173 struct lima_context_constant_buffer *ccb =
1174 ctx->const_buffer + PIPE_SHADER_VERTEX;
1175 struct lima_vs_shader_state *vs = ctx->vs;
1176
1177 int size = vs->uniform_pending_offset + vs->constant_size + 32;
1178 void *vs_const_buff =
1179 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_uniform, size, true);
1180
1181 if (ccb->buffer)
1182 memcpy(vs_const_buff, ccb->buffer, ccb->size);
1183
1184 memcpy(vs_const_buff + vs->uniform_pending_offset,
1185 ctx->viewport.transform.scale,
1186 sizeof(ctx->viewport.transform.scale));
1187 memcpy(vs_const_buff + vs->uniform_pending_offset + 16,
1188 ctx->viewport.transform.translate,
1189 sizeof(ctx->viewport.transform.translate));
1190
1191 if (vs->constant)
1192 memcpy(vs_const_buff + vs->uniform_pending_offset + 32,
1193 vs->constant, vs->constant_size);
1194
1195 lima_dump_command_stream_print(
1196 vs_const_buff, size, true,
1197 "update gp uniform at va %x\n",
1198 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, 0));
1199 }
1200
1201 static void
1202 lima_update_pp_uniform(struct lima_context *ctx)
1203 {
1204 const float *const_buff = ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer;
1205 size_t const_buff_size = ctx->const_buffer[PIPE_SHADER_FRAGMENT].size / sizeof(float);
1206
1207 if (!const_buff)
1208 return;
1209
1210 uint16_t *fp16_const_buff =
1211 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform,
1212 const_buff_size * sizeof(uint16_t), true);
1213
1214 uint32_t *array =
1215 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform_array, 4, true);
1216
1217 for (int i = 0; i < const_buff_size; i++)
1218 fp16_const_buff[i] = util_float_to_half(const_buff[i]);
1219
1220 *array = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, LIMA_CTX_BUFF_SUBMIT_PP);
1221
1222 lima_dump_command_stream_print(
1223 fp16_const_buff, const_buff_size * 2, false, "add pp uniform data at va %x\n",
1224 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, 0));
1225 lima_dump_command_stream_print(
1226 array, 4, false, "add pp uniform info at va %x\n",
1227 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, 0));
1228 }
1229
1230 static void
1231 lima_update_varying(struct lima_context *ctx, const struct pipe_draw_info *info)
1232 {
1233 struct lima_vs_shader_state *vs = ctx->vs;
1234
1235 uint32_t *varying =
1236 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_varying_info,
1237 vs->num_varying * 8, true);
1238 int n = 0;
1239
1240 /* should be LIMA_SUBMIT_BO_WRITE for GP, but each draw will use
1241 * different part of this bo, so no need to set exclusive constraint */
1242 lima_ctx_buff_alloc(ctx, lima_ctx_buff_sh_gl_pos,
1243 4 * 4 * info->count, false);
1244
1245 /* for gl_Position */
1246 varying[n++] =
1247 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos,
1248 LIMA_CTX_BUFF_SUBMIT_GP | LIMA_CTX_BUFF_SUBMIT_PP);
1249 varying[n++] = 0x8020;
1250
1251 int offset = 0;
1252 for (int i = 1; i < vs->num_varying; i++) {
1253 struct lima_varying_info *v = vs->varying + i;
1254 int size = v->component_size * 4;
1255
1256 /* does component_size == 2 need to be 16 aligned? */
1257 if (v->component_size == 4)
1258 offset = align(offset, 16);
1259
1260 v->offset = offset;
1261 offset += size;
1262 }
1263 vs->varying_stride = align(offset, 16);
1264
1265 if (vs->num_varying > 1)
1266 lima_ctx_buff_alloc(ctx, lima_ctx_buff_sh_varying,
1267 vs->varying_stride * info->count, false);
1268
1269 for (int i = 1; i < vs->num_varying; i++) {
1270 struct lima_varying_info *v = vs->varying + i;
1271 varying[n++] =
1272 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_varying, LIMA_CTX_BUFF_SUBMIT_GP) +
1273 v->offset;
1274 varying[n++] = (vs->varying_stride << 11) | (v->components - 1) |
1275 (v->component_size == 2 ? 0x0C : 0);
1276 }
1277
1278 lima_dump_command_stream_print(
1279 varying, n * 4, false, "update varying info at va %x\n",
1280 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, 0));
1281 }
1282
1283 static void
1284 lima_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
1285 {
1286 /* check if draw mode and vertex/index count match,
1287 * otherwise gp will hang */
1288 if (!u_trim_pipe_prim(info->mode, (unsigned*)&info->count)) {
1289 debug_printf("draw mode and vertex/index count mismatch\n");
1290 return;
1291 }
1292
1293 struct lima_context *ctx = lima_context(pctx);
1294
1295 if (!ctx->vs || !ctx->fs) {
1296 debug_warn_once("no shader, skip draw\n");
1297 return;
1298 }
1299
1300 if (!lima_update_vs_state(ctx) || !lima_update_fs_state(ctx))
1301 return;
1302
1303 lima_dump_command_stream_print(
1304 ctx->vs->bo->map, ctx->vs->shader_size, false,
1305 "add vs at va %x\n", ctx->vs->bo->va);
1306
1307 lima_dump_command_stream_print(
1308 ctx->fs->bo->map, ctx->fs->shader_size, false,
1309 "add fs at va %x\n", ctx->fs->bo->va);
1310
1311 lima_submit_add_bo(ctx->gp_submit, ctx->vs->bo, LIMA_SUBMIT_BO_READ);
1312 lima_submit_add_bo(ctx->pp_submit, ctx->fs->bo, LIMA_SUBMIT_BO_READ);
1313
1314 lima_update_submit_bo(ctx);
1315
1316 /* Mali Utgard GPU always need min/max index info for index draw,
1317 * compute it if upper layer does not do for us */
1318 if (info->index_size && info->max_index == ~0u)
1319 u_vbuf_get_minmax_index(pctx, info, &ctx->min_index, &ctx->max_index);
1320 else {
1321 ctx->min_index = info->min_index;
1322 ctx->max_index = info->max_index;
1323 }
1324
1325 lima_update_gp_attribute_info(ctx, info);
1326
1327 if ((ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1328 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty) ||
1329 ctx->dirty & LIMA_CONTEXT_DIRTY_VIEWPORT ||
1330 ctx->dirty & LIMA_CONTEXT_DIRTY_SHADER_VERT) {
1331 lima_update_gp_uniform(ctx);
1332 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty = false;
1333 }
1334
1335 lima_update_varying(ctx, info);
1336
1337 /* If it's zero scissor, don't build vs cmd list */
1338 if (!lima_is_scissor_zero(ctx))
1339 lima_pack_vs_cmd(ctx, info);
1340
1341 if (ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1342 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty) {
1343 lima_update_pp_uniform(ctx);
1344 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty = false;
1345 }
1346
1347 if (ctx->dirty & LIMA_CONTEXT_DIRTY_TEXTURES)
1348 lima_update_textures(ctx);
1349
1350 lima_pack_render_state(ctx, info);
1351 lima_pack_plbu_cmd(ctx, info);
1352
1353 ctx->dirty = 0;
1354 }
1355
1356 static void
1357 lima_finish_plbu_cmd(struct lima_context *ctx)
1358 {
1359 int i = 0;
1360 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + 2 * 4);
1361
1362 plbu_cmd[i++] = 0x00000000;
1363 plbu_cmd[i++] = 0x50000000; /* END */
1364
1365 ctx->plbu_cmd_array.size += i * 4;
1366 }
1367
1368 static void
1369 lima_pack_wb_zsbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1370 {
1371 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1372 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
1373 int level = fb->base.zsbuf->u.tex.level;
1374 uint32_t format = lima_format_get_pixel(fb->base.zsbuf->format);
1375
1376 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1377 wb[wb_idx].type = 0x01; /* 1 for depth, stencil */
1378 wb[wb_idx].address = res->bo->va + res->levels[level].offset;
1379 wb[wb_idx].pixel_format = format;
1380 if (res->tiled) {
1381 wb[wb_idx].pixel_layout = 0x2;
1382 wb[wb_idx].pitch = fb->tiled_w;
1383 } else {
1384 wb[wb_idx].pixel_layout = 0x0;
1385 wb[wb_idx].pitch = res->levels[level].stride / 8;
1386 }
1387 wb[wb_idx].mrt_bits = 0;
1388 }
1389
1390 static void
1391 lima_pack_wb_cbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1392 {
1393 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1394 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
1395 int level = fb->base.cbufs[0]->u.tex.level;
1396 unsigned layer = fb->base.cbufs[0]->u.tex.first_layer;
1397 uint32_t format = lima_format_get_pixel(fb->base.cbufs[0]->format);
1398 bool swap_channels = lima_format_get_swap_rb(fb->base.cbufs[0]->format);
1399
1400 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1401 wb[wb_idx].type = 0x02; /* 2 for color buffer */
1402 wb[wb_idx].address = res->bo->va + res->levels[level].offset + layer * res->levels[level].layer_stride;
1403 wb[wb_idx].pixel_format = format;
1404 if (res->tiled) {
1405 wb[wb_idx].pixel_layout = 0x2;
1406 wb[wb_idx].pitch = fb->tiled_w;
1407 } else {
1408 wb[wb_idx].pixel_layout = 0x0;
1409 wb[wb_idx].pitch = res->levels[level].stride / 8;
1410 }
1411 wb[wb_idx].mrt_bits = swap_channels ? 0x4 : 0x0;
1412 }
1413
1414
1415 static void
1416 lima_pack_pp_frame_reg(struct lima_context *ctx, uint32_t *frame_reg,
1417 uint32_t *wb_reg)
1418 {
1419 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1420 struct lima_pp_frame_reg *frame = (void *)frame_reg;
1421 struct lima_screen *screen = lima_screen(ctx->base.screen);
1422 int wb_idx = 0;
1423
1424 frame->render_address = screen->pp_buffer->va + pp_frame_rsw_offset;
1425 frame->flags = 0x02;
1426 frame->clear_value_depth = ctx->clear.depth;
1427 frame->clear_value_stencil = ctx->clear.stencil;
1428 frame->clear_value_color = ctx->clear.color_8pc;
1429 frame->clear_value_color_1 = ctx->clear.color_8pc;
1430 frame->clear_value_color_2 = ctx->clear.color_8pc;
1431 frame->clear_value_color_3 = ctx->clear.color_8pc;
1432 frame->one = 1;
1433
1434 frame->width = fb->base.width - 1;
1435 frame->height = fb->base.height - 1;
1436
1437 /* frame->fragment_stack_address is overwritten per-pp in the kernel
1438 * by the values of pp_frame.fragment_stack_address[i] */
1439
1440 /* These are "stack size" and "stack offset" shifted,
1441 * here they are assumed to be always the same. */
1442 frame->fragment_stack_size = ctx->pp_max_stack_size << 16 | ctx->pp_max_stack_size;
1443
1444 /* related with MSAA and different value when r4p0/r7p0 */
1445 frame->supersampled_height = fb->base.height * 2 - 1;
1446 frame->scale = 0xE0C;
1447
1448 frame->dubya = 0x77;
1449 frame->onscreen = 1;
1450 frame->blocking = (fb->shift_min << 28) | (fb->shift_h << 16) | fb->shift_w;
1451 frame->foureight = 0x8888;
1452
1453 if (fb->base.nr_cbufs)
1454 lima_pack_wb_cbuf_reg(ctx, wb_reg, wb_idx++);
1455
1456 /* Mali4x0 can use on-tile buffer for depth/stencil, so to save some
1457 * memory bandwidth don't write depth/stencil back to memory if we're
1458 * rendering to scanout
1459 */
1460 if (!lima_is_scanout(ctx) && fb->base.zsbuf)
1461 lima_pack_wb_zsbuf_reg(ctx, wb_reg, wb_idx++);
1462 }
1463
1464 static void
1465 _lima_flush(struct lima_context *ctx, bool end_of_frame)
1466 {
1467 #define pp_stack_pp_size 0x400
1468
1469 lima_finish_plbu_cmd(ctx);
1470
1471 int vs_cmd_size = ctx->vs_cmd_array.size;
1472 int plbu_cmd_size = ctx->plbu_cmd_array.size;
1473 uint32_t vs_cmd_va = 0;
1474 uint32_t plbu_cmd_va;
1475
1476 if (vs_cmd_size) {
1477 void *vs_cmd =
1478 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_vs_cmd, vs_cmd_size, true);
1479 memcpy(vs_cmd, util_dynarray_begin(&ctx->vs_cmd_array), vs_cmd_size);
1480 util_dynarray_clear(&ctx->vs_cmd_array);
1481 vs_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_vs_cmd,
1482 LIMA_CTX_BUFF_SUBMIT_GP);
1483
1484 lima_dump_command_stream_print(
1485 vs_cmd, vs_cmd_size, false, "flush vs cmd at va %x\n", vs_cmd_va);
1486 }
1487
1488 void *plbu_cmd =
1489 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_plbu_cmd, plbu_cmd_size, true);
1490 memcpy(plbu_cmd, util_dynarray_begin(&ctx->plbu_cmd_array), plbu_cmd_size);
1491 util_dynarray_clear(&ctx->plbu_cmd_array);
1492 plbu_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_plbu_cmd,
1493 LIMA_CTX_BUFF_SUBMIT_GP);
1494
1495 lima_dump_command_stream_print(
1496 plbu_cmd, plbu_cmd_size, false, "flush plbu cmd at va %x\n", plbu_cmd_va);
1497
1498 struct lima_screen *screen = lima_screen(ctx->base.screen);
1499 struct drm_lima_gp_frame gp_frame;
1500 struct lima_gp_frame_reg *gp_frame_reg = (void *)gp_frame.frame;
1501 gp_frame_reg->vs_cmd_start = vs_cmd_va;
1502 gp_frame_reg->vs_cmd_end = vs_cmd_va + vs_cmd_size;
1503 gp_frame_reg->plbu_cmd_start = plbu_cmd_va;
1504 gp_frame_reg->plbu_cmd_end = plbu_cmd_va + plbu_cmd_size;
1505 gp_frame_reg->tile_heap_start = ctx->gp_tile_heap[ctx->plb_index]->va;
1506 gp_frame_reg->tile_heap_end = ctx->gp_tile_heap[ctx->plb_index]->va + gp_tile_heap_size;
1507
1508 lima_dump_command_stream_print(
1509 &gp_frame, sizeof(gp_frame), false, "add gp frame\n");
1510
1511 if (!lima_submit_start(ctx->gp_submit, &gp_frame, sizeof(gp_frame)))
1512 fprintf(stderr, "gp submit error\n");
1513
1514 if (lima_dump_command_stream) {
1515 if (lima_submit_wait(ctx->gp_submit, PIPE_TIMEOUT_INFINITE)) {
1516 if (ctx->buffer_state[lima_ctx_buff_sh_gl_pos].res) {
1517 float *pos = lima_ctx_buff_map(ctx, lima_ctx_buff_sh_gl_pos);
1518 lima_dump_command_stream_print(
1519 pos, 4 * 4 * 16, true, "gl_pos dump at va %x\n",
1520 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos, 0));
1521 }
1522
1523 uint32_t *plb = lima_bo_map(ctx->plb[ctx->plb_index]);
1524 lima_dump_command_stream_print(
1525 plb, LIMA_CTX_PLB_BLK_SIZE, false, "plb dump at va %x\n",
1526 ctx->plb[ctx->plb_index]->va);
1527 }
1528 else {
1529 fprintf(stderr, "gp submit wait error\n");
1530 exit(1);
1531 }
1532 }
1533
1534 uint32_t pp_stack_va = 0;
1535 if (ctx->pp_max_stack_size) {
1536 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_stack, screen->num_pp *
1537 ctx->pp_max_stack_size * pp_stack_pp_size, true);
1538 pp_stack_va = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_stack,
1539 LIMA_CTX_BUFF_SUBMIT_PP);
1540 }
1541
1542 struct lima_pp_stream_state *ps = &ctx->pp_stream;
1543 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI400) {
1544 struct drm_lima_m400_pp_frame pp_frame = {0};
1545 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1546 pp_frame.num_pp = screen->num_pp;
1547
1548 for (int i = 0; i < screen->num_pp; i++) {
1549 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1550 if (ctx->pp_max_stack_size)
1551 pp_frame.fragment_stack_address[i] = pp_stack_va +
1552 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1553 }
1554
1555 lima_dump_command_stream_print(
1556 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1557
1558 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1559 fprintf(stderr, "pp submit error\n");
1560 }
1561 else {
1562 struct drm_lima_m450_pp_frame pp_frame = {0};
1563 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1564 pp_frame.num_pp = screen->num_pp;
1565
1566 if (ctx->pp_max_stack_size)
1567 for (int i = 0; i < screen->num_pp; i++)
1568 pp_frame.fragment_stack_address[i] = pp_stack_va +
1569 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1570
1571 if (ps->bo) {
1572 for (int i = 0; i < screen->num_pp; i++)
1573 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1574 }
1575 else {
1576 pp_frame.use_dlbu = true;
1577
1578 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1579 pp_frame.dlbu_regs[0] = ctx->plb[ctx->plb_index]->va;
1580 pp_frame.dlbu_regs[1] = ((fb->tiled_h - 1) << 16) | (fb->tiled_w - 1);
1581 unsigned s = util_logbase2(LIMA_CTX_PLB_BLK_SIZE) - 7;
1582 pp_frame.dlbu_regs[2] = (s << 28) | (fb->shift_h << 16) | fb->shift_w;
1583 pp_frame.dlbu_regs[3] = ((fb->tiled_h - 1) << 24) | ((fb->tiled_w - 1) << 16);
1584 }
1585
1586 lima_dump_command_stream_print(
1587 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1588
1589 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1590 fprintf(stderr, "pp submit error\n");
1591 }
1592
1593 if (lima_dump_command_stream) {
1594 if (!lima_submit_wait(ctx->pp_submit, PIPE_TIMEOUT_INFINITE)) {
1595 fprintf(stderr, "pp wait error\n");
1596 exit(1);
1597 }
1598 }
1599
1600 ctx->plb_index = (ctx->plb_index + 1) % lima_ctx_num_plb;
1601
1602 if (ctx->framebuffer.base.nr_cbufs) {
1603 /* Set reload flag for next draw. It'll be unset if buffer is cleared */
1604 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
1605 surf->reload = true;
1606 }
1607
1608 ctx->pp_max_stack_size = 0;
1609 }
1610
1611 void
1612 lima_flush(struct lima_context *ctx)
1613 {
1614 if (!lima_ctx_dirty(ctx))
1615 return;
1616
1617 _lima_flush(ctx, false);
1618 }
1619
1620 static void
1621 lima_pipe_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
1622 unsigned flags)
1623 {
1624 struct lima_context *ctx = lima_context(pctx);
1625 if (lima_ctx_dirty(ctx))
1626 _lima_flush(ctx, flags & PIPE_FLUSH_END_OF_FRAME);
1627
1628 if (fence) {
1629 int fd;
1630 if (lima_submit_get_out_sync(ctx->pp_submit, &fd))
1631 *fence = lima_fence_create(fd);
1632 }
1633 }
1634
1635 void
1636 lima_draw_init(struct lima_context *ctx)
1637 {
1638 ctx->base.clear = lima_clear;
1639 ctx->base.draw_vbo = lima_draw_vbo;
1640 ctx->base.flush = lima_pipe_flush;
1641 }