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lima: merge gp/pp submit
[mesa.git] / src / gallium / drivers / lima / lima_draw.c
1 /*
2 * Copyright (c) 2011-2013 Luc Verhaegen <libv@skynet.be>
3 * Copyright (c) 2017-2019 Lima Project
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include "util/u_math.h"
27 #include "util/format/u_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_half.h"
30 #include "util/u_helpers.h"
31 #include "util/u_inlines.h"
32 #include "util/u_pack_color.h"
33 #include "util/hash_table.h"
34 #include "util/u_split_draw.h"
35 #include "util/u_upload_mgr.h"
36 #include "util/u_prim.h"
37 #include "util/u_vbuf.h"
38
39 #include "lima_context.h"
40 #include "lima_screen.h"
41 #include "lima_resource.h"
42 #include "lima_program.h"
43 #include "lima_bo.h"
44 #include "lima_submit.h"
45 #include "lima_texture.h"
46 #include "lima_util.h"
47 #include "lima_fence.h"
48 #include "lima_format.h"
49
50 #include <xf86drm.h>
51 #include <drm-uapi/lima_drm.h>
52
53 struct lima_gp_frame_reg {
54 uint32_t vs_cmd_start;
55 uint32_t vs_cmd_end;
56 uint32_t plbu_cmd_start;
57 uint32_t plbu_cmd_end;
58 uint32_t tile_heap_start;
59 uint32_t tile_heap_end;
60 };
61
62 struct lima_pp_frame_reg {
63 uint32_t plbu_array_address;
64 uint32_t render_address;
65 uint32_t unused_0;
66 uint32_t flags;
67 uint32_t clear_value_depth;
68 uint32_t clear_value_stencil;
69 uint32_t clear_value_color;
70 uint32_t clear_value_color_1;
71 uint32_t clear_value_color_2;
72 uint32_t clear_value_color_3;
73 uint32_t width;
74 uint32_t height;
75 uint32_t fragment_stack_address;
76 uint32_t fragment_stack_size;
77 uint32_t unused_1;
78 uint32_t unused_2;
79 uint32_t one;
80 uint32_t supersampled_height;
81 uint32_t dubya;
82 uint32_t onscreen;
83 uint32_t blocking;
84 uint32_t scale;
85 uint32_t foureight;
86 };
87
88 struct lima_pp_wb_reg {
89 uint32_t type;
90 uint32_t address;
91 uint32_t pixel_format;
92 uint32_t downsample_factor;
93 uint32_t pixel_layout;
94 uint32_t pitch;
95 uint32_t mrt_bits;
96 uint32_t mrt_pitch;
97 uint32_t zero;
98 uint32_t unused0;
99 uint32_t unused1;
100 uint32_t unused2;
101 };
102
103 struct lima_render_state {
104 uint32_t blend_color_bg;
105 uint32_t blend_color_ra;
106 uint32_t alpha_blend;
107 uint32_t depth_test;
108 uint32_t depth_range;
109 uint32_t stencil_front;
110 uint32_t stencil_back;
111 uint32_t stencil_test;
112 uint32_t multi_sample;
113 uint32_t shader_address;
114 uint32_t varying_types;
115 uint32_t uniforms_address;
116 uint32_t textures_address;
117 uint32_t aux0;
118 uint32_t aux1;
119 uint32_t varyings_address;
120 };
121
122
123 /* plbu commands */
124 #define PLBU_CMD_BEGIN(array, max) { \
125 int i = 0, max_n = max; \
126 struct util_dynarray *plbu_cmd_array = array; \
127 uint32_t *plbu_cmd = util_dynarray_ensure_cap(plbu_cmd_array, plbu_cmd_array->size + max_n * 4);
128
129 #define PLBU_CMD_END() \
130 assert(i <= max_n); \
131 plbu_cmd_array->size += i * 4; \
132 }
133
134 #define PLBU_CMD(v1, v2) \
135 do { \
136 plbu_cmd[i++] = v1; \
137 plbu_cmd[i++] = v2; \
138 } while (0)
139
140 #define PLBU_CMD_BLOCK_STEP(shift_min, shift_h, shift_w) \
141 PLBU_CMD(((shift_min) << 28) | ((shift_h) << 16) | (shift_w), 0x1000010C)
142 #define PLBU_CMD_TILED_DIMENSIONS(tiled_w, tiled_h) \
143 PLBU_CMD((((tiled_w) - 1) << 24) | (((tiled_h) - 1) << 8), 0x10000109)
144 #define PLBU_CMD_BLOCK_STRIDE(block_w) PLBU_CMD((block_w) & 0xff, 0x30000000)
145 #define PLBU_CMD_ARRAY_ADDRESS(gp_stream, block_num) \
146 PLBU_CMD(gp_stream, 0x28000000 | ((block_num) - 1) | 1)
147 #define PLBU_CMD_VIEWPORT_LEFT(v) PLBU_CMD(v, 0x10000107)
148 #define PLBU_CMD_VIEWPORT_RIGHT(v) PLBU_CMD(v, 0x10000108)
149 #define PLBU_CMD_VIEWPORT_BOTTOM(v) PLBU_CMD(v, 0x10000105)
150 #define PLBU_CMD_VIEWPORT_TOP(v) PLBU_CMD(v, 0x10000106)
151 #define PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN() PLBU_CMD(0x00010002, 0x60000000)
152 #define PLBU_CMD_ARRAYS_SEMAPHORE_END() PLBU_CMD(0x00010001, 0x60000000)
153 #define PLBU_CMD_PRIMITIVE_SETUP(force_point_size, cull, index_size) \
154 PLBU_CMD(0x2200 | ((force_point_size) ? 0x1000 : 0) | \
155 (cull) | ((index_size) << 9), 0x1000010B)
156 #define PLBU_CMD_RSW_VERTEX_ARRAY(rsw, gl_pos) \
157 PLBU_CMD(rsw, 0x80000000 | ((gl_pos) >> 4))
158 #define PLBU_CMD_SCISSORS(minx, maxx, miny, maxy) \
159 PLBU_CMD(((minx) << 30) | ((maxy) - 1) << 15 | (miny), \
160 0x70000000 | ((maxx) - 1) << 13 | ((minx) >> 2))
161 #define PLBU_CMD_UNKNOWN1() PLBU_CMD(0x00000000, 0x1000010A)
162 #define PLBU_CMD_UNKNOWN2() PLBU_CMD(0x00000200, 0x1000010B)
163 #define PLBU_CMD_LOW_PRIM_SIZE(v) PLBU_CMD(v, 0x1000010D)
164 #define PLBU_CMD_DEPTH_RANGE_NEAR(v) PLBU_CMD(v, 0x1000010E)
165 #define PLBU_CMD_DEPTH_RANGE_FAR(v) PLBU_CMD(v, 0x1000010F)
166 #define PLBU_CMD_INDEXED_DEST(gl_pos) PLBU_CMD(gl_pos, 0x10000100)
167 #define PLBU_CMD_INDEXED_PT_SIZE(pt_size) PLBU_CMD(pt_size, 0x10000102)
168 #define PLBU_CMD_INDICES(va) PLBU_CMD(va, 0x10000101)
169 #define PLBU_CMD_DRAW_ARRAYS(mode, start, count) \
170 PLBU_CMD(((count) << 24) | (start), (((mode) & 0x1F) << 16) | ((count) >> 8))
171 #define PLBU_CMD_DRAW_ELEMENTS(mode, start, count) \
172 PLBU_CMD(((count) << 24) | (start), \
173 0x00200000 | (((mode) & 0x1F) << 16) | ((count) >> 8))
174
175 /* vs commands */
176 #define VS_CMD_BEGIN(array, max) { \
177 int i = 0, max_n = max; \
178 struct util_dynarray *vs_cmd_array = array; \
179 uint32_t *vs_cmd = util_dynarray_ensure_cap(vs_cmd_array, vs_cmd_array->size + max_n * 4);
180
181 #define VS_CMD_END() \
182 assert(i <= max_n); \
183 vs_cmd_array->size += i * 4; \
184 }
185
186 #define VS_CMD(v1, v2) \
187 do { \
188 vs_cmd[i++] = v1; \
189 vs_cmd[i++] = v2; \
190 } while (0)
191
192 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1() VS_CMD(0x00028000, 0x50000000)
193 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2() VS_CMD(0x00000001, 0x50000000)
194 #define VS_CMD_ARRAYS_SEMAPHORE_END(index_draw) \
195 VS_CMD((index_draw) ? 0x00018000 : 0x00000000, 0x50000000)
196 #define VS_CMD_UNIFORMS_ADDRESS(addr, size) \
197 VS_CMD(addr, 0x30000000 | ((size) << 12))
198 #define VS_CMD_SHADER_ADDRESS(addr, size) \
199 VS_CMD(addr, 0x40000000 | ((size) << 12))
200 #define VS_CMD_SHADER_INFO(prefetch, size) \
201 VS_CMD(((prefetch) << 20) | ((((size) >> 4) - 1) << 10), 0x10000040)
202 #define VS_CMD_VARYING_ATTRIBUTE_COUNT(nv, na) \
203 VS_CMD((((nv) - 1) << 8) | (((na) - 1) << 24), 0x10000042)
204 #define VS_CMD_UNKNOWN1() VS_CMD(0x00000003, 0x10000041)
205 #define VS_CMD_UNKNOWN2() VS_CMD(0x00000000, 0x60000000)
206 #define VS_CMD_ATTRIBUTES_ADDRESS(addr, na) \
207 VS_CMD(addr, 0x20000000 | ((na) << 17))
208 #define VS_CMD_VARYINGS_ADDRESS(addr, nv) \
209 VS_CMD(addr, 0x20000008 | ((nv) << 17))
210 #define VS_CMD_DRAW(num, index_draw) \
211 VS_CMD(((num) << 24) | ((index_draw) ? 1 : 0), ((num) >> 8))
212
213 static inline bool
214 lima_ctx_dirty(struct lima_context *ctx)
215 {
216 return !!ctx->resolve;
217 }
218
219 static inline struct lima_damage_region *
220 lima_ctx_get_damage(struct lima_context *ctx)
221 {
222 if (!(ctx->framebuffer.base.nr_cbufs && (ctx->resolve & PIPE_CLEAR_COLOR0)))
223 return NULL;
224
225 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
226 struct lima_resource *res = lima_resource(surf->base.texture);
227 return &res->damage;
228 }
229
230 static bool
231 lima_fb_need_reload(struct lima_context *ctx)
232 {
233 /* Depth buffer is always discarded */
234 if (!(ctx->framebuffer.base.nr_cbufs && (ctx->resolve & PIPE_CLEAR_COLOR0)))
235 return false;
236
237 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
238 struct lima_resource *res = lima_resource(surf->base.texture);
239 if (res->damage.region) {
240 /* for EGL_KHR_partial_update, when EGL_EXT_buffer_age is enabled,
241 * we need to reload damage region, otherwise just want to reload
242 * the region not aligned to tile boundary */
243 //if (!res->damage.aligned)
244 // return true;
245 return true;
246 }
247 else if (surf->reload)
248 return true;
249
250 return false;
251 }
252
253 static void
254 lima_pack_reload_plbu_cmd(struct lima_context *ctx)
255 {
256 #define lima_reload_render_state_offset 0x0000
257 #define lima_reload_gl_pos_offset 0x0040
258 #define lima_reload_varying_offset 0x0080
259 #define lima_reload_tex_desc_offset 0x00c0
260 #define lima_reload_tex_array_offset 0x0100
261 #define lima_reload_buffer_size 0x0140
262
263 void *cpu;
264 unsigned offset;
265 struct pipe_resource *pres = NULL;
266 u_upload_alloc(ctx->uploader, 0, lima_reload_buffer_size,
267 0x40, &offset, &pres, &cpu);
268
269 struct lima_resource *res = lima_resource(pres);
270 uint32_t va = res->bo->va + offset;
271
272 struct lima_screen *screen = lima_screen(ctx->base.screen);
273
274 uint32_t reload_shader_first_instr_size =
275 ((uint32_t *)(screen->pp_buffer->map + pp_reload_program_offset))[0] & 0x1f;
276 uint32_t reload_shader_va = screen->pp_buffer->va + pp_reload_program_offset;
277
278 struct lima_render_state reload_render_state = {
279 .alpha_blend = 0xf03b1ad2,
280 .depth_test = 0x0000000e,
281 .depth_range = 0xffff0000,
282 .stencil_front = 0x00000007,
283 .stencil_back = 0x00000007,
284 .multi_sample = 0x0000f007,
285 .shader_address = reload_shader_va | reload_shader_first_instr_size,
286 .varying_types = 0x00000001,
287 .textures_address = va + lima_reload_tex_array_offset,
288 .aux0 = 0x00004021,
289 .varyings_address = va + lima_reload_varying_offset,
290 };
291 memcpy(cpu + lima_reload_render_state_offset, &reload_render_state,
292 sizeof(reload_render_state));
293
294 struct lima_context_framebuffer *fb = &ctx->framebuffer;
295 lima_tex_desc *td = cpu + lima_reload_tex_desc_offset;
296 memset(td, 0, lima_min_tex_desc_size);
297 lima_texture_desc_set_res(ctx, td, fb->base.cbufs[0]->texture, 0, 0);
298 td->unnorm_coords = 1;
299 td->texture_type = LIMA_TEXTURE_TYPE_2D;
300 td->min_img_filter_nearest = 1;
301 td->mag_img_filter_nearest = 1;
302 td->wrap_s_clamp_to_edge = 1;
303 td->wrap_t_clamp_to_edge = 1;
304 td->unknown_2_2 = 0x1;
305
306 uint32_t *ta = cpu + lima_reload_tex_array_offset;
307 ta[0] = va + lima_reload_tex_desc_offset;
308
309 float reload_gl_pos[] = {
310 fb->base.width, 0, 0, 1,
311 0, 0, 0, 1,
312 0, fb->base.height, 0, 1,
313 };
314 memcpy(cpu + lima_reload_gl_pos_offset, reload_gl_pos,
315 sizeof(reload_gl_pos));
316
317 float reload_varying[] = {
318 fb->base.width, 0, 0, 0,
319 0, fb->base.height, 0, 0,
320 };
321 memcpy(cpu + lima_reload_varying_offset, reload_varying,
322 sizeof(reload_varying));
323
324 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, res->bo, LIMA_SUBMIT_BO_READ);
325 pipe_resource_reference(&pres, NULL);
326
327 PLBU_CMD_BEGIN(&ctx->plbu_cmd_head, 20);
328
329 PLBU_CMD_VIEWPORT_LEFT(0);
330 PLBU_CMD_VIEWPORT_RIGHT(fui(fb->base.width));
331 PLBU_CMD_VIEWPORT_BOTTOM(0);
332 PLBU_CMD_VIEWPORT_TOP(fui(fb->base.height));
333
334 PLBU_CMD_RSW_VERTEX_ARRAY(
335 va + lima_reload_render_state_offset,
336 va + lima_reload_gl_pos_offset);
337
338 PLBU_CMD_UNKNOWN2();
339 PLBU_CMD_UNKNOWN1();
340
341 PLBU_CMD_INDICES(screen->pp_buffer->va + pp_shared_index_offset);
342 PLBU_CMD_INDEXED_DEST(va + lima_reload_gl_pos_offset);
343 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
344
345 PLBU_CMD_END();
346 }
347
348 static void
349 lima_pack_head_plbu_cmd(struct lima_context *ctx)
350 {
351 struct lima_context_framebuffer *fb = &ctx->framebuffer;
352
353 PLBU_CMD_BEGIN(&ctx->plbu_cmd_head, 10);
354
355 PLBU_CMD_UNKNOWN2();
356 PLBU_CMD_BLOCK_STEP(fb->shift_min, fb->shift_h, fb->shift_w);
357 PLBU_CMD_TILED_DIMENSIONS(fb->tiled_w, fb->tiled_h);
358 PLBU_CMD_BLOCK_STRIDE(fb->block_w);
359
360 PLBU_CMD_ARRAY_ADDRESS(
361 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size,
362 fb->block_w * fb->block_h);
363
364 PLBU_CMD_END();
365
366 if (lima_fb_need_reload(ctx))
367 lima_pack_reload_plbu_cmd(ctx);
368 }
369
370 static bool
371 lima_is_scissor_zero(struct lima_context *ctx)
372 {
373 if (!ctx->rasterizer || !ctx->rasterizer->base.scissor)
374 return false;
375
376 struct pipe_scissor_state *scissor = &ctx->scissor;
377 return
378 scissor->minx == scissor->maxx
379 && scissor->miny == scissor->maxy;
380 }
381
382 static void
383 hilbert_rotate(int n, int *x, int *y, int rx, int ry)
384 {
385 if (ry == 0) {
386 if (rx == 1) {
387 *x = n-1 - *x;
388 *y = n-1 - *y;
389 }
390
391 /* Swap x and y */
392 int t = *x;
393 *x = *y;
394 *y = t;
395 }
396 }
397
398 static void
399 hilbert_coords(int n, int d, int *x, int *y)
400 {
401 int rx, ry, i, t=d;
402
403 *x = *y = 0;
404
405 for (i = 0; (1 << i) < n; i++) {
406
407 rx = 1 & (t / 2);
408 ry = 1 & (t ^ rx);
409
410 hilbert_rotate(1 << i, x, y, rx, ry);
411
412 *x += rx << i;
413 *y += ry << i;
414
415 t /= 4;
416 }
417 }
418
419 static int
420 lima_get_pp_stream_size(int num_pp, int tiled_w, int tiled_h, uint32_t *off)
421 {
422 /* carefully calculate each stream start address:
423 * 1. overflow: each stream size may be different due to
424 * fb->tiled_w * fb->tiled_h can't be divided by num_pp,
425 * extra size should be added to the preceeding stream
426 * 2. alignment: each stream address should be 0x20 aligned
427 */
428 int delta = tiled_w * tiled_h / num_pp * 16 + 16;
429 int remain = tiled_w * tiled_h % num_pp;
430 int offset = 0;
431
432 for (int i = 0; i < num_pp; i++) {
433 off[i] = offset;
434
435 offset += delta;
436 if (remain) {
437 offset += 16;
438 remain--;
439 }
440 offset = align(offset, 0x20);
441 }
442
443 return offset;
444 }
445
446 static bool
447 inside_damage_region(int x, int y, struct lima_damage_region *ds)
448 {
449 if (!ds || !ds->region)
450 return true;
451
452 for (int i = 0; i < ds->num_region; i++) {
453 struct pipe_scissor_state *ss = ds->region + i;
454 if (x >= ss->minx && x < ss->maxx &&
455 y >= ss->miny && y < ss->maxy)
456 return true;
457 }
458
459 return false;
460 }
461
462 static void
463 lima_generate_pp_stream(struct lima_context *ctx, int off_x, int off_y,
464 int tiled_w, int tiled_h)
465 {
466 struct lima_pp_stream_state *ps = &ctx->pp_stream;
467 struct lima_context_framebuffer *fb = &ctx->framebuffer;
468 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
469 struct lima_screen *screen = lima_screen(ctx->base.screen);
470 int i, num_pp = screen->num_pp;
471
472 /* use hilbert_coords to generates 1D to 2D relationship.
473 * 1D for pp stream index and 2D for plb block x/y on framebuffer.
474 * if multi pp, interleave the 1D index to make each pp's render target
475 * close enough which should result close workload
476 */
477 int max = MAX2(tiled_w, tiled_h);
478 int index = 0;
479 uint32_t *stream[4];
480 int si[4] = {0};
481 int dim = 0;
482 int count = 0;
483
484 /* Don't update count if we get zero rect. We'll just generate
485 * PP stream with just terminators in it.
486 */
487 if ((tiled_w * tiled_h) != 0) {
488 dim = util_logbase2_ceil(max);
489 count = 1 << (dim + dim);
490 }
491
492 for (i = 0; i < num_pp; i++)
493 stream[i] = ps->bo->map + ps->bo_offset + ps->offset[i];
494
495 for (i = 0; i < count; i++) {
496 int x, y;
497 hilbert_coords(max, i, &x, &y);
498 if (x < tiled_w && y < tiled_h) {
499 x += off_x;
500 y += off_y;
501
502 if (!inside_damage_region(x, y, damage))
503 continue;
504
505 int pp = index % num_pp;
506 int offset = ((y >> fb->shift_h) * fb->block_w +
507 (x >> fb->shift_w)) * LIMA_CTX_PLB_BLK_SIZE;
508 int plb_va = ctx->plb[ctx->plb_index]->va + offset;
509
510 stream[pp][si[pp]++] = 0;
511 stream[pp][si[pp]++] = 0xB8000000 | x | (y << 8);
512 stream[pp][si[pp]++] = 0xE0000002 | ((plb_va >> 3) & ~0xE0000003);
513 stream[pp][si[pp]++] = 0xB0000000;
514
515 index++;
516 }
517 }
518
519 for (i = 0; i < num_pp; i++) {
520 stream[i][si[i]++] = 0;
521 stream[i][si[i]++] = 0xBC000000;
522 stream[i][si[i]++] = 0;
523 stream[i][si[i]++] = 0;
524
525 lima_dump_command_stream_print(
526 stream[i], si[i] * 4, false, "pp plb stream %d at va %x\n",
527 i, ps->bo->va + ps->bo_offset + ps->offset[i]);
528 }
529 }
530
531 static void
532 lima_update_damage_pp_stream(struct lima_context *ctx)
533 {
534 struct lima_damage_region *ds = lima_ctx_get_damage(ctx);
535 struct lima_context_framebuffer *fb = &ctx->framebuffer;
536 struct pipe_scissor_state bound;
537
538 if (ds && ds->region) {
539 struct pipe_scissor_state *dbound = &ds->bound;
540 bound.minx = MAX2(dbound->minx, ctx->damage_rect.minx >> 4);
541 bound.miny = MAX2(dbound->miny, ctx->damage_rect.miny >> 4);
542 bound.maxx = MIN2(dbound->maxx, (ctx->damage_rect.maxx + 0xf) >> 4);
543 bound.maxy = MIN2(dbound->maxy, (ctx->damage_rect.maxy + 0xf) >> 4);
544 } else {
545 bound.minx = ctx->damage_rect.minx >> 4;
546 bound.miny = ctx->damage_rect.miny >> 4;
547 bound.maxx = (ctx->damage_rect.maxx + 0xf) >> 4;
548 bound.maxy = (ctx->damage_rect.maxy + 0xf) >> 4;
549 }
550
551 /* Clamp to FB size */
552 bound.minx = MIN2(bound.minx, fb->tiled_w);
553 bound.miny = MIN2(bound.miny, fb->tiled_h);
554 bound.maxx = MIN2(bound.maxx, fb->tiled_w);
555 bound.maxy = MIN2(bound.maxy, fb->tiled_h);
556
557 int tiled_w = bound.maxx - bound.minx;
558 int tiled_h = bound.maxy - bound.miny;
559
560 struct lima_screen *screen = lima_screen(ctx->base.screen);
561 int size = lima_get_pp_stream_size(
562 screen->num_pp, tiled_w, tiled_h, ctx->pp_stream.offset);
563
564 void *cpu;
565 unsigned offset;
566 struct pipe_resource *pres = NULL;
567 u_upload_alloc(ctx->uploader, 0, size, 0x40, &offset, &pres, &cpu);
568
569 struct lima_resource *res = lima_resource(pres);
570 ctx->pp_stream.bo = res->bo;
571 ctx->pp_stream.bo_offset = offset;
572
573 lima_generate_pp_stream(ctx, bound.minx, bound.miny, tiled_w, tiled_h);
574
575 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, res->bo, LIMA_SUBMIT_BO_READ);
576 pipe_resource_reference(&pres, NULL);
577 }
578
579 static void
580 lima_update_full_pp_stream(struct lima_context *ctx)
581 {
582 struct lima_context_framebuffer *fb = &ctx->framebuffer;
583 struct lima_ctx_plb_pp_stream_key key = {
584 .plb_index = ctx->plb_index,
585 .tiled_w = fb->tiled_w,
586 .tiled_h = fb->tiled_h,
587 };
588
589 struct hash_entry *entry =
590 _mesa_hash_table_search(ctx->plb_pp_stream, &key);
591 struct lima_ctx_plb_pp_stream *s = entry->data;
592
593 if (s->bo) {
594 ctx->pp_stream.bo = s->bo;
595 ctx->pp_stream.bo_offset = 0;
596 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
597 }
598 else {
599 struct lima_screen *screen = lima_screen(ctx->base.screen);
600 int size = lima_get_pp_stream_size(
601 screen->num_pp, fb->tiled_w, fb->tiled_h, s->offset);
602 s->bo = lima_bo_create(screen, size, 0);
603 lima_bo_map(s->bo);
604
605 ctx->pp_stream.bo = s->bo;
606 ctx->pp_stream.bo_offset = 0;
607 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
608
609 lima_generate_pp_stream(ctx, 0, 0, fb->tiled_w, fb->tiled_h);
610 }
611
612 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, s->bo, LIMA_SUBMIT_BO_READ);
613 }
614
615 static bool
616 lima_damage_fullscreen(struct lima_context *ctx)
617 {
618 return ctx->damage_rect.minx == 0 &&
619 ctx->damage_rect.miny == 0 &&
620 ctx->damage_rect.maxx == ctx->framebuffer.base.width &&
621 ctx->damage_rect.maxy == ctx->framebuffer.base.height;
622 }
623
624 static void
625 lima_update_pp_stream(struct lima_context *ctx)
626 {
627 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
628 if ((damage && damage->region) || !lima_damage_fullscreen(ctx))
629 lima_update_damage_pp_stream(ctx);
630 else if (ctx->plb_pp_stream)
631 lima_update_full_pp_stream(ctx);
632 else
633 ctx->pp_stream.bo = NULL;
634 }
635
636 static void
637 lima_update_submit_wb(struct lima_context *ctx, unsigned buffers)
638 {
639 struct lima_context_framebuffer *fb = &ctx->framebuffer;
640
641 /* add to submit when the buffer is dirty and resolve is clear (not added before) */
642 if (fb->base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0) &&
643 !(ctx->resolve & PIPE_CLEAR_COLOR0)) {
644 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
645 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, res->bo, LIMA_SUBMIT_BO_WRITE);
646 }
647
648 /* add to submit when the buffer is dirty and resolve is clear (not added before) */
649 if (fb->base.zsbuf && (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) &&
650 !(ctx->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
651 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
652 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, res->bo, LIMA_SUBMIT_BO_WRITE);
653 }
654
655 ctx->resolve |= buffers;
656 }
657
658 static void
659 lima_update_submit_bo(struct lima_context *ctx)
660 {
661 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->plb_gp_stream,
662 LIMA_SUBMIT_BO_READ);
663 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->plb[ctx->plb_index],
664 LIMA_SUBMIT_BO_WRITE);
665 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->gp_tile_heap[ctx->plb_index],
666 LIMA_SUBMIT_BO_WRITE);
667
668 lima_dump_command_stream_print(
669 ctx->plb_gp_stream->map + ctx->plb_index * ctx->plb_gp_size,
670 ctx->plb_gp_size, false, "gp plb stream at va %x\n",
671 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size);
672
673 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->plb[ctx->plb_index],
674 LIMA_SUBMIT_BO_READ);
675 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->gp_tile_heap[ctx->plb_index],
676 LIMA_SUBMIT_BO_READ);
677
678 struct lima_screen *screen = lima_screen(ctx->base.screen);
679 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, screen->pp_buffer, LIMA_SUBMIT_BO_READ);
680 }
681
682 static void
683 lima_damage_rect_union(struct lima_context *ctx, unsigned minx, unsigned maxx, unsigned miny, unsigned maxy)
684 {
685 ctx->damage_rect.minx = MIN2(ctx->damage_rect.minx, minx);
686 ctx->damage_rect.miny = MIN2(ctx->damage_rect.miny, miny);
687 ctx->damage_rect.maxx = MAX2(ctx->damage_rect.maxx, maxx);
688 ctx->damage_rect.maxy = MAX2(ctx->damage_rect.maxy, maxy);
689 }
690
691 static void
692 lima_clear(struct pipe_context *pctx, unsigned buffers,
693 const union pipe_color_union *color, double depth, unsigned stencil)
694 {
695 struct lima_context *ctx = lima_context(pctx);
696
697 lima_flush(ctx);
698
699 lima_update_submit_wb(ctx, buffers);
700
701 /* no need to reload if cleared */
702 if (ctx->framebuffer.base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0)) {
703 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
704 surf->reload = false;
705 }
706
707 struct lima_context_clear *clear = &ctx->clear;
708 clear->buffers = buffers;
709
710 if (buffers & PIPE_CLEAR_COLOR0) {
711 clear->color_8pc =
712 ((uint32_t)float_to_ubyte(color->f[3]) << 24) |
713 ((uint32_t)float_to_ubyte(color->f[2]) << 16) |
714 ((uint32_t)float_to_ubyte(color->f[1]) << 8) |
715 float_to_ubyte(color->f[0]);
716
717 clear->color_16pc =
718 ((uint64_t)float_to_ushort(color->f[3]) << 48) |
719 ((uint64_t)float_to_ushort(color->f[2]) << 32) |
720 ((uint64_t)float_to_ushort(color->f[1]) << 16) |
721 float_to_ushort(color->f[0]);
722 }
723
724 if (buffers & PIPE_CLEAR_DEPTH)
725 clear->depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
726
727 if (buffers & PIPE_CLEAR_STENCIL)
728 clear->stencil = stencil;
729
730 ctx->dirty |= LIMA_CONTEXT_DIRTY_CLEAR;
731
732 lima_damage_rect_union(ctx, 0, ctx->framebuffer.base.width,
733 0, ctx->framebuffer.base.height);
734 }
735
736 enum lima_attrib_type {
737 LIMA_ATTRIB_FLOAT = 0x000,
738 /* todo: find out what lives here. */
739 LIMA_ATTRIB_I16 = 0x004,
740 LIMA_ATTRIB_U16 = 0x005,
741 LIMA_ATTRIB_I8 = 0x006,
742 LIMA_ATTRIB_U8 = 0x007,
743 LIMA_ATTRIB_I8N = 0x008,
744 LIMA_ATTRIB_U8N = 0x009,
745 LIMA_ATTRIB_I16N = 0x00A,
746 LIMA_ATTRIB_U16N = 0x00B,
747 /* todo: where is the 32 int */
748 /* todo: find out what lives here. */
749 LIMA_ATTRIB_FIXED = 0x101
750 };
751
752 static enum lima_attrib_type
753 lima_pipe_format_to_attrib_type(enum pipe_format format)
754 {
755 const struct util_format_description *desc = util_format_description(format);
756 int i = util_format_get_first_non_void_channel(format);
757 const struct util_format_channel_description *c = desc->channel + i;
758
759 switch (c->type) {
760 case UTIL_FORMAT_TYPE_FLOAT:
761 return LIMA_ATTRIB_FLOAT;
762 case UTIL_FORMAT_TYPE_FIXED:
763 return LIMA_ATTRIB_FIXED;
764 case UTIL_FORMAT_TYPE_SIGNED:
765 if (c->size == 8) {
766 if (c->normalized)
767 return LIMA_ATTRIB_I8N;
768 else
769 return LIMA_ATTRIB_I8;
770 }
771 else if (c->size == 16) {
772 if (c->normalized)
773 return LIMA_ATTRIB_I16N;
774 else
775 return LIMA_ATTRIB_I16;
776 }
777 break;
778 case UTIL_FORMAT_TYPE_UNSIGNED:
779 if (c->size == 8) {
780 if (c->normalized)
781 return LIMA_ATTRIB_U8N;
782 else
783 return LIMA_ATTRIB_U8;
784 }
785 else if (c->size == 16) {
786 if (c->normalized)
787 return LIMA_ATTRIB_U16N;
788 else
789 return LIMA_ATTRIB_U16;
790 }
791 break;
792 }
793
794 return LIMA_ATTRIB_FLOAT;
795 }
796
797 static void
798 lima_pack_vs_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
799 {
800 VS_CMD_BEGIN(&ctx->vs_cmd_array, 24);
801
802 if (!info->index_size) {
803 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1();
804 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2();
805 }
806
807 int uniform_size = ctx->vs->uniform_pending_offset + ctx->vs->constant_size + 32;
808 VS_CMD_UNIFORMS_ADDRESS(
809 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform),
810 align(uniform_size, 16));
811
812 VS_CMD_SHADER_ADDRESS(ctx->vs->bo->va, ctx->vs->shader_size);
813 VS_CMD_SHADER_INFO(ctx->vs->prefetch, ctx->vs->shader_size);
814
815 int num_outputs = ctx->vs->num_outputs;
816 int num_attributes = ctx->vertex_elements->num_elements;
817 VS_CMD_VARYING_ATTRIBUTE_COUNT(num_outputs, MAX2(1, num_attributes));
818
819 VS_CMD_UNKNOWN1();
820
821 VS_CMD_ATTRIBUTES_ADDRESS(
822 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info),
823 MAX2(1, num_attributes));
824
825 VS_CMD_VARYINGS_ADDRESS(
826 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info),
827 num_outputs);
828
829 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
830 VS_CMD_DRAW(num, info->index_size);
831
832 VS_CMD_UNKNOWN2();
833
834 VS_CMD_ARRAYS_SEMAPHORE_END(info->index_size);
835
836 VS_CMD_END();
837 }
838
839 static void
840 lima_pack_plbu_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
841 {
842 struct lima_context_framebuffer *fb = &ctx->framebuffer;
843 struct lima_vs_shader_state *vs = ctx->vs;
844 unsigned minx, maxx, miny, maxy;
845
846 /* If it's zero scissor, we skip adding all other commands */
847 if (lima_is_scissor_zero(ctx))
848 return;
849
850 PLBU_CMD_BEGIN(&ctx->plbu_cmd_array, 32);
851
852 PLBU_CMD_VIEWPORT_LEFT(fui(ctx->viewport.left));
853 PLBU_CMD_VIEWPORT_RIGHT(fui(ctx->viewport.right));
854 PLBU_CMD_VIEWPORT_BOTTOM(fui(ctx->viewport.bottom));
855 PLBU_CMD_VIEWPORT_TOP(fui(ctx->viewport.top));
856
857 if (!info->index_size)
858 PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN();
859
860 int cf = ctx->rasterizer->base.cull_face;
861 int ccw = ctx->rasterizer->base.front_ccw;
862 uint32_t cull = 0;
863 bool force_point_size = false;
864
865 if (cf != PIPE_FACE_NONE) {
866 if (cf & PIPE_FACE_FRONT)
867 cull |= ccw ? 0x00040000 : 0x00020000;
868 if (cf & PIPE_FACE_BACK)
869 cull |= ccw ? 0x00020000 : 0x00040000;
870 }
871
872 /* Specify point size with PLBU command if shader doesn't write */
873 if (info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx == -1)
874 force_point_size = true;
875
876 /* Specify line width with PLBU command for lines */
877 if (info->mode > PIPE_PRIM_POINTS && info->mode < PIPE_PRIM_TRIANGLES)
878 force_point_size = true;
879
880 PLBU_CMD_PRIMITIVE_SETUP(force_point_size, cull, info->index_size);
881
882 PLBU_CMD_RSW_VERTEX_ARRAY(
883 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw),
884 ctx->gp_output->va);
885
886 /* TODO
887 * - we should set it only for the first draw that enabled the scissor and for
888 * latter draw only if scissor is dirty
889 */
890 if (ctx->rasterizer->base.scissor) {
891 struct pipe_scissor_state *scissor = &ctx->scissor;
892 minx = scissor->minx;
893 maxx = scissor->maxx;
894 miny = scissor->miny;
895 maxy = scissor->maxy;
896 } else {
897 minx = 0;
898 maxx = fb->base.width;
899 miny = 0;
900 maxy = fb->base.height;
901 }
902
903 minx = MAX2(minx, ctx->viewport.left);
904 maxx = MIN2(maxx, ctx->viewport.right);
905 miny = MAX2(miny, ctx->viewport.bottom);
906 maxy = MIN2(maxy, ctx->viewport.top);
907
908 PLBU_CMD_SCISSORS(minx, maxx, miny, maxy);
909 lima_damage_rect_union(ctx, minx, maxx, miny, maxy);
910
911 PLBU_CMD_UNKNOWN1();
912
913 PLBU_CMD_DEPTH_RANGE_NEAR(fui(ctx->viewport.near));
914 PLBU_CMD_DEPTH_RANGE_FAR(fui(ctx->viewport.far));
915
916 if ((info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx == -1) ||
917 ((info->mode >= PIPE_PRIM_LINES) && (info->mode < PIPE_PRIM_TRIANGLES)))
918 {
919 uint32_t v = info->mode == PIPE_PRIM_POINTS ?
920 fui(ctx->rasterizer->base.point_size) : fui(ctx->rasterizer->base.line_width);
921 PLBU_CMD_LOW_PRIM_SIZE(v);
922 }
923
924 if (info->index_size) {
925 PLBU_CMD_INDEXED_DEST(ctx->gp_output->va);
926 if (vs->point_size_idx != -1)
927 PLBU_CMD_INDEXED_PT_SIZE(ctx->gp_output->va + ctx->gp_output_point_size_offt);
928
929 PLBU_CMD_INDICES(ctx->index_res->bo->va + info->start * info->index_size + ctx->index_offset);
930 }
931 else {
932 /* can this make the attribute info static? */
933 PLBU_CMD_DRAW_ARRAYS(info->mode, info->start, info->count);
934 }
935
936 PLBU_CMD_ARRAYS_SEMAPHORE_END();
937
938 if (info->index_size)
939 PLBU_CMD_DRAW_ELEMENTS(info->mode, ctx->min_index, info->count);
940
941 PLBU_CMD_END();
942 }
943
944 static int
945 lima_blend_func(enum pipe_blend_func pipe)
946 {
947 switch (pipe) {
948 case PIPE_BLEND_ADD:
949 return 2;
950 case PIPE_BLEND_SUBTRACT:
951 return 0;
952 case PIPE_BLEND_REVERSE_SUBTRACT:
953 return 1;
954 case PIPE_BLEND_MIN:
955 return 4;
956 case PIPE_BLEND_MAX:
957 return 5;
958 }
959 return -1;
960 }
961
962 static int
963 lima_blend_factor_has_alpha(enum pipe_blendfactor pipe)
964 {
965 /* Bit 4 is set if the blendfactor uses alpha */
966 switch (pipe) {
967 case PIPE_BLENDFACTOR_SRC_ALPHA:
968 case PIPE_BLENDFACTOR_DST_ALPHA:
969 case PIPE_BLENDFACTOR_CONST_ALPHA:
970 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
971 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
972 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
973 return 1;
974
975 case PIPE_BLENDFACTOR_SRC_COLOR:
976 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
977 case PIPE_BLENDFACTOR_DST_COLOR:
978 case PIPE_BLENDFACTOR_INV_DST_COLOR:
979 case PIPE_BLENDFACTOR_CONST_COLOR:
980 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
981 case PIPE_BLENDFACTOR_ZERO:
982 case PIPE_BLENDFACTOR_ONE:
983 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
984 return 0;
985
986 case PIPE_BLENDFACTOR_SRC1_COLOR:
987 case PIPE_BLENDFACTOR_SRC1_ALPHA:
988 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
989 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
990 return -1; /* not supported */
991 }
992 return -1;
993 }
994
995 static int
996 lima_blend_factor_is_inv(enum pipe_blendfactor pipe)
997 {
998 /* Bit 3 is set if the blendfactor type is inverted */
999 switch (pipe) {
1000 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
1001 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
1002 case PIPE_BLENDFACTOR_INV_DST_COLOR:
1003 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
1004 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
1005 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
1006 case PIPE_BLENDFACTOR_ONE:
1007 return 1;
1008
1009 case PIPE_BLENDFACTOR_SRC_COLOR:
1010 case PIPE_BLENDFACTOR_SRC_ALPHA:
1011 case PIPE_BLENDFACTOR_DST_COLOR:
1012 case PIPE_BLENDFACTOR_DST_ALPHA:
1013 case PIPE_BLENDFACTOR_CONST_COLOR:
1014 case PIPE_BLENDFACTOR_CONST_ALPHA:
1015 case PIPE_BLENDFACTOR_ZERO:
1016 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
1017 return 0;
1018
1019 case PIPE_BLENDFACTOR_SRC1_COLOR:
1020 case PIPE_BLENDFACTOR_SRC1_ALPHA:
1021 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
1022 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
1023 return -1; /* not supported */
1024 }
1025 return -1;
1026 }
1027
1028 static int
1029 lima_blend_factor(enum pipe_blendfactor pipe)
1030 {
1031 /* Bits 0-2 indicate the blendfactor type */
1032 switch (pipe) {
1033 case PIPE_BLENDFACTOR_SRC_COLOR:
1034 case PIPE_BLENDFACTOR_SRC_ALPHA:
1035 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
1036 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
1037 return 0;
1038
1039 case PIPE_BLENDFACTOR_DST_COLOR:
1040 case PIPE_BLENDFACTOR_DST_ALPHA:
1041 case PIPE_BLENDFACTOR_INV_DST_COLOR:
1042 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
1043 return 1;
1044
1045 case PIPE_BLENDFACTOR_CONST_COLOR:
1046 case PIPE_BLENDFACTOR_CONST_ALPHA:
1047 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
1048 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
1049 return 2;
1050
1051 case PIPE_BLENDFACTOR_ZERO:
1052 case PIPE_BLENDFACTOR_ONE:
1053 return 3;
1054
1055 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
1056 return 4;
1057
1058 case PIPE_BLENDFACTOR_SRC1_COLOR:
1059 case PIPE_BLENDFACTOR_SRC1_ALPHA:
1060 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
1061 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
1062 return -1; /* not supported */
1063 }
1064 return -1;
1065 }
1066
1067 static int
1068 lima_calculate_alpha_blend(enum pipe_blend_func rgb_func, enum pipe_blend_func alpha_func,
1069 enum pipe_blendfactor rgb_src_factor, enum pipe_blendfactor rgb_dst_factor,
1070 enum pipe_blendfactor alpha_src_factor, enum pipe_blendfactor alpha_dst_factor)
1071 {
1072 /* PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE has to be changed to PIPE_BLENDFACTOR_ONE
1073 * if it is set for alpha_src.
1074 */
1075 if (alpha_src_factor == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE)
1076 alpha_src_factor = PIPE_BLENDFACTOR_ONE;
1077
1078 return lima_blend_func(rgb_func) |
1079 (lima_blend_func(alpha_func) << 3) |
1080
1081 (lima_blend_factor(rgb_src_factor) << 6) |
1082 (lima_blend_factor_is_inv(rgb_src_factor) << 9) |
1083 (lima_blend_factor_has_alpha(rgb_src_factor) << 10) |
1084
1085 (lima_blend_factor(rgb_dst_factor) << 11) |
1086 (lima_blend_factor_is_inv(rgb_dst_factor) << 14) |
1087 (lima_blend_factor_has_alpha(rgb_dst_factor) << 15) |
1088
1089 (lima_blend_factor(alpha_src_factor) << 16) |
1090 (lima_blend_factor_is_inv(alpha_src_factor) << 19) |
1091
1092 (lima_blend_factor(alpha_dst_factor) << 20) |
1093 (lima_blend_factor_is_inv(alpha_dst_factor) << 23) |
1094 0x0C000000; /* need to check if this is GLESv1 glAlphaFunc */
1095 }
1096
1097 static int
1098 lima_stencil_op(enum pipe_stencil_op pipe)
1099 {
1100 switch (pipe) {
1101 case PIPE_STENCIL_OP_KEEP:
1102 return 0;
1103 case PIPE_STENCIL_OP_ZERO:
1104 return 2;
1105 case PIPE_STENCIL_OP_REPLACE:
1106 return 1;
1107 case PIPE_STENCIL_OP_INCR:
1108 return 6;
1109 case PIPE_STENCIL_OP_DECR:
1110 return 7;
1111 case PIPE_STENCIL_OP_INCR_WRAP:
1112 return 4;
1113 case PIPE_STENCIL_OP_DECR_WRAP:
1114 return 5;
1115 case PIPE_STENCIL_OP_INVERT:
1116 return 3;
1117 }
1118 return -1;
1119 }
1120
1121 static unsigned
1122 lima_calculate_depth_test(struct pipe_depth_state *depth, struct pipe_rasterizer_state *rst)
1123 {
1124 int offset_scale = 0, offset_units = 0;
1125 enum pipe_compare_func func = (depth->enabled ? depth->func : PIPE_FUNC_ALWAYS);
1126
1127 offset_scale = CLAMP(rst->offset_scale * 4, -128, 127);
1128 if (offset_scale < 0)
1129 offset_scale += 0x100;
1130
1131 offset_units = CLAMP(rst->offset_units * 2, -128, 127);
1132 if (offset_units < 0)
1133 offset_units += 0x100;
1134
1135 return (depth->enabled && depth->writemask) |
1136 ((int)func << 1) |
1137 (offset_scale << 16) |
1138 (offset_units << 24) |
1139 0x30; /* find out what is this */
1140 }
1141
1142 static void
1143 lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *info)
1144 {
1145 struct lima_fs_shader_state *fs = ctx->fs;
1146 struct lima_render_state *render =
1147 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_plb_rsw,
1148 sizeof(*render));
1149 bool early_z = true;
1150 bool pixel_kill = true;
1151
1152 /* do hw support RGBA independ blend?
1153 * PIPE_CAP_INDEP_BLEND_ENABLE
1154 *
1155 * how to handle the no cbuf only zbuf case?
1156 */
1157 struct pipe_rt_blend_state *rt = ctx->blend->base.rt;
1158 render->blend_color_bg = float_to_ubyte(ctx->blend_color.color[2]) |
1159 (float_to_ubyte(ctx->blend_color.color[1]) << 16);
1160 render->blend_color_ra = float_to_ubyte(ctx->blend_color.color[0]) |
1161 (float_to_ubyte(ctx->blend_color.color[3]) << 16);
1162
1163 if (rt->blend_enable) {
1164 render->alpha_blend = lima_calculate_alpha_blend(rt->rgb_func, rt->alpha_func,
1165 rt->rgb_src_factor, rt->rgb_dst_factor,
1166 rt->alpha_src_factor, rt->alpha_dst_factor);
1167 }
1168 else {
1169 /*
1170 * Special handling for blending disabled.
1171 * Binary driver is generating the same alpha_value,
1172 * as when we would just enable blending, without changing/setting any blend equation/params.
1173 * Normaly in this case mesa would set all rt fields (func/factor) to zero.
1174 */
1175 render->alpha_blend = lima_calculate_alpha_blend(PIPE_BLEND_ADD, PIPE_BLEND_ADD,
1176 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO,
1177 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO);
1178 }
1179
1180 render->alpha_blend |= (rt->colormask & PIPE_MASK_RGBA) << 28;
1181
1182 struct pipe_rasterizer_state *rst = &ctx->rasterizer->base;
1183 struct pipe_depth_state *depth = &ctx->zsa->base.depth;
1184 render->depth_test = lima_calculate_depth_test(depth, rst);
1185
1186 ushort far, near;
1187
1188 near = float_to_ushort(ctx->viewport.near);
1189 far = float_to_ushort(ctx->viewport.far);
1190
1191 /* Subtract epsilon from 'near' if far == near. Make sure we don't get overflow */
1192 if ((far == near) && (near != 0))
1193 near--;
1194
1195 /* overlap with plbu? any place can remove one? */
1196 render->depth_range = near | (far << 16);
1197
1198 struct pipe_stencil_state *stencil = ctx->zsa->base.stencil;
1199 struct pipe_stencil_ref *ref = &ctx->stencil_ref;
1200
1201 if (stencil[0].enabled) { /* stencil is enabled */
1202 render->stencil_front = stencil[0].func |
1203 (lima_stencil_op(stencil[0].fail_op) << 3) |
1204 (lima_stencil_op(stencil[0].zfail_op) << 6) |
1205 (lima_stencil_op(stencil[0].zpass_op) << 9) |
1206 (ref->ref_value[0] << 16) |
1207 (stencil[0].valuemask << 24);
1208 render->stencil_back = render->stencil_front;
1209 render->stencil_test = (stencil[0].writemask & 0xff) | (stencil[0].writemask & 0xff) << 8;
1210 if (stencil[1].enabled) { /* two-side is enabled */
1211 render->stencil_back = stencil[1].func |
1212 (lima_stencil_op(stencil[1].fail_op) << 3) |
1213 (lima_stencil_op(stencil[1].zfail_op) << 6) |
1214 (lima_stencil_op(stencil[1].zpass_op) << 9) |
1215 (ref->ref_value[1] << 16) |
1216 (stencil[1].valuemask << 24);
1217 render->stencil_test = (stencil[0].writemask & 0xff) | (stencil[1].writemask & 0xff) << 8;
1218 }
1219 /* TODO: Find out, what (render->stecil_test & 0xffff0000) is.
1220 * 0x00ff0000 is probably (float_to_ubyte(alpha->ref_value) << 16)
1221 * (render->multi_sample & 0x00000007 is probably the compare function
1222 * of glAlphaFunc then.
1223 */
1224 }
1225 else {
1226 /* Default values, when stencil is disabled:
1227 * stencil[0|1].valuemask = 0xff
1228 * stencil[0|1].func = PIPE_FUNC_ALWAYS
1229 * stencil[0|1].writemask = 0xff
1230 */
1231 render->stencil_front = 0xff000007;
1232 render->stencil_back = 0xff000007;
1233 render->stencil_test = 0x0000ffff;
1234 }
1235
1236 /* need more investigation */
1237 if (info->mode == PIPE_PRIM_POINTS)
1238 render->multi_sample = 0x0000F007;
1239 else if (info->mode < PIPE_PRIM_TRIANGLES)
1240 render->multi_sample = 0x0000F407;
1241 else
1242 render->multi_sample = 0x0000F807;
1243 if (ctx->framebuffer.base.samples)
1244 render->multi_sample |= 0x68;
1245
1246 render->shader_address =
1247 ctx->fs->bo->va | (((uint32_t *)ctx->fs->bo->map)[0] & 0x1F);
1248
1249 /* seems not needed */
1250 render->uniforms_address = 0x00000000;
1251
1252 render->textures_address = 0x00000000;
1253
1254 render->aux0 = (ctx->vs->varying_stride >> 3);
1255 render->aux1 = 0x00001000;
1256 if (ctx->blend->base.dither)
1257 render->aux1 |= 0x00002000;
1258
1259 if (fs->uses_discard) {
1260 early_z = false;
1261 pixel_kill = false;
1262 }
1263
1264 if (rt->blend_enable)
1265 pixel_kill = false;
1266
1267 if ((rt->colormask & PIPE_MASK_RGBA) != PIPE_MASK_RGBA)
1268 pixel_kill = false;
1269
1270 if (early_z)
1271 render->aux0 |= 0x300;
1272
1273 if (pixel_kill)
1274 render->aux0 |= 0x1000;
1275
1276 if (ctx->tex_stateobj.num_samplers) {
1277 render->textures_address =
1278 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_tex_desc);
1279 render->aux0 |= ctx->tex_stateobj.num_samplers << 14;
1280 render->aux0 |= 0x20;
1281 }
1282
1283 if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
1284 render->uniforms_address =
1285 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array);
1286 uint32_t size = ctx->buffer_state[lima_ctx_buff_pp_uniform].size;
1287 uint32_t bits = 0;
1288 if (size >= 8) {
1289 bits = util_last_bit(size >> 3) - 1;
1290 bits += size & u_bit_consecutive(0, bits + 3) ? 1 : 0;
1291 }
1292 render->uniforms_address |= bits > 0xf ? 0xf : bits;
1293
1294 render->aux0 |= 0x80;
1295 render->aux1 |= 0x10000;
1296 }
1297
1298 if (ctx->vs->num_varyings) {
1299 render->varying_types = 0x00000000;
1300 render->varyings_address = ctx->gp_output->va +
1301 ctx->gp_output_varyings_offt;
1302 for (int i = 0, index = 0; i < ctx->vs->num_outputs; i++) {
1303 int val;
1304
1305 if (i == ctx->vs->gl_pos_idx ||
1306 i == ctx->vs->point_size_idx)
1307 continue;
1308
1309 struct lima_varying_info *v = ctx->vs->varying + i;
1310 if (v->component_size == 4)
1311 val = v->components > 2 ? 0 : 1;
1312 else
1313 val = v->components > 2 ? 2 : 3;
1314
1315 if (index < 10)
1316 render->varying_types |= val << (3 * index);
1317 else if (index == 10) {
1318 render->varying_types |= val << 30;
1319 render->varyings_address |= val >> 2;
1320 }
1321 else if (index == 11)
1322 render->varyings_address |= val << 1;
1323
1324 index++;
1325 }
1326 }
1327 else {
1328 render->varying_types = 0x00000000;
1329 render->varyings_address = 0x00000000;
1330 }
1331
1332 lima_dump_command_stream_print(
1333 render, sizeof(*render), false, "add render state at va %x\n",
1334 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw));
1335
1336 lima_dump_rsw_command_stream_print(
1337 render, sizeof(*render), lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw));
1338
1339 }
1340
1341 static void
1342 lima_update_gp_attribute_info(struct lima_context *ctx, const struct pipe_draw_info *info)
1343 {
1344 struct lima_vertex_element_state *ve = ctx->vertex_elements;
1345 struct lima_context_vertex_buffer *vb = &ctx->vertex_buffers;
1346
1347 uint32_t *attribute =
1348 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_attribute_info,
1349 MAX2(1, ve->num_elements) * 8);
1350
1351 int n = 0;
1352 for (int i = 0; i < ve->num_elements; i++) {
1353 struct pipe_vertex_element *pve = ve->pipe + i;
1354
1355 assert(pve->vertex_buffer_index < vb->count);
1356 assert(vb->enabled_mask & (1 << pve->vertex_buffer_index));
1357
1358 struct pipe_vertex_buffer *pvb = vb->vb + pve->vertex_buffer_index;
1359 struct lima_resource *res = lima_resource(pvb->buffer.resource);
1360
1361 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, res->bo, LIMA_SUBMIT_BO_READ);
1362
1363 unsigned start = info->index_size ? (ctx->min_index + info->index_bias) : info->start;
1364 attribute[n++] = res->bo->va + pvb->buffer_offset + pve->src_offset
1365 + start * pvb->stride;
1366 attribute[n++] = (pvb->stride << 11) |
1367 (lima_pipe_format_to_attrib_type(pve->src_format) << 2) |
1368 (util_format_get_nr_components(pve->src_format) - 1);
1369 }
1370
1371 lima_dump_command_stream_print(
1372 attribute, n * 4, false, "update attribute info at va %x\n",
1373 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info));
1374 }
1375
1376 static void
1377 lima_update_gp_uniform(struct lima_context *ctx)
1378 {
1379 struct lima_context_constant_buffer *ccb =
1380 ctx->const_buffer + PIPE_SHADER_VERTEX;
1381 struct lima_vs_shader_state *vs = ctx->vs;
1382
1383 int size = vs->uniform_pending_offset + vs->constant_size + 32;
1384 void *vs_const_buff =
1385 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_uniform, size);
1386
1387 if (ccb->buffer)
1388 memcpy(vs_const_buff, ccb->buffer, ccb->size);
1389
1390 memcpy(vs_const_buff + vs->uniform_pending_offset,
1391 ctx->viewport.transform.scale,
1392 sizeof(ctx->viewport.transform.scale));
1393 memcpy(vs_const_buff + vs->uniform_pending_offset + 16,
1394 ctx->viewport.transform.translate,
1395 sizeof(ctx->viewport.transform.translate));
1396
1397 if (vs->constant)
1398 memcpy(vs_const_buff + vs->uniform_pending_offset + 32,
1399 vs->constant, vs->constant_size);
1400
1401 lima_dump_command_stream_print(
1402 vs_const_buff, size, true,
1403 "update gp uniform at va %x\n",
1404 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform));
1405 }
1406
1407 static void
1408 lima_update_pp_uniform(struct lima_context *ctx)
1409 {
1410 const float *const_buff = ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer;
1411 size_t const_buff_size = ctx->const_buffer[PIPE_SHADER_FRAGMENT].size / sizeof(float);
1412
1413 if (!const_buff)
1414 return;
1415
1416 uint16_t *fp16_const_buff =
1417 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform,
1418 const_buff_size * sizeof(uint16_t));
1419
1420 uint32_t *array =
1421 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform_array, 4);
1422
1423 for (int i = 0; i < const_buff_size; i++)
1424 fp16_const_buff[i] = util_float_to_half(const_buff[i]);
1425
1426 *array = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform);
1427
1428 lima_dump_command_stream_print(
1429 fp16_const_buff, const_buff_size * 2, false, "add pp uniform data at va %x\n",
1430 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform));
1431 lima_dump_command_stream_print(
1432 array, 4, false, "add pp uniform info at va %x\n",
1433 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array));
1434 }
1435
1436 static void
1437 lima_update_varying(struct lima_context *ctx, const struct pipe_draw_info *info)
1438 {
1439 struct lima_screen *screen = lima_screen(ctx->base.screen);
1440 struct lima_vs_shader_state *vs = ctx->vs;
1441 uint32_t gp_output_size;
1442 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
1443
1444 uint32_t *varying =
1445 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_varying_info,
1446 vs->num_outputs * 8);
1447 int n = 0;
1448
1449 int offset = 0;
1450
1451 for (int i = 0; i < vs->num_outputs; i++) {
1452 struct lima_varying_info *v = vs->varying + i;
1453
1454 if (i == vs->gl_pos_idx ||
1455 i == vs->point_size_idx)
1456 continue;
1457
1458 int size = v->component_size * 4;
1459
1460 /* does component_size == 2 need to be 16 aligned? */
1461 if (v->component_size == 4)
1462 offset = align(offset, 16);
1463
1464 v->offset = offset;
1465 offset += size;
1466 }
1467
1468 vs->varying_stride = align(offset, 16);
1469
1470 /* gl_Position is always present, allocate space for it */
1471 gp_output_size = align(4 * 4 * num, 0x40);
1472
1473 /* Allocate space for varyings if there're any */
1474 if (vs->num_varyings) {
1475 ctx->gp_output_varyings_offt = gp_output_size;
1476 gp_output_size += align(vs->varying_stride * num, 0x40);
1477 }
1478
1479 /* Allocate space for gl_PointSize if it's there */
1480 if (vs->point_size_idx != -1) {
1481 ctx->gp_output_point_size_offt = gp_output_size;
1482 gp_output_size += 4 * num;
1483 }
1484
1485 /* gp_output can be too large for the suballocator, so create a
1486 * separate bo for it. The bo cache should prevent performance hit.
1487 */
1488 ctx->gp_output = lima_bo_create(screen, gp_output_size, 0);
1489 assert(ctx->gp_output);
1490 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->gp_output, LIMA_SUBMIT_BO_WRITE);
1491 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->gp_output, LIMA_SUBMIT_BO_READ);
1492
1493 for (int i = 0; i < vs->num_outputs; i++) {
1494 struct lima_varying_info *v = vs->varying + i;
1495
1496 if (i == vs->gl_pos_idx) {
1497 /* gl_Position */
1498 varying[n++] = ctx->gp_output->va;
1499 varying[n++] = 0x8020;
1500 } else if (i == vs->point_size_idx) {
1501 /* gl_PointSize */
1502 varying[n++] = ctx->gp_output->va + ctx->gp_output_point_size_offt;
1503 varying[n++] = 0x2021;
1504 } else {
1505 /* Varying */
1506 varying[n++] = ctx->gp_output->va + ctx->gp_output_varyings_offt +
1507 v->offset;
1508 varying[n++] = (vs->varying_stride << 11) | (v->components - 1) |
1509 (v->component_size == 2 ? 0x0C : 0);
1510 }
1511 }
1512
1513 lima_dump_command_stream_print(
1514 varying, n * 4, false, "update varying info at va %x\n",
1515 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info));
1516 }
1517
1518 static void
1519 lima_draw_vbo_update(struct pipe_context *pctx,
1520 const struct pipe_draw_info *info)
1521 {
1522 struct lima_context *ctx = lima_context(pctx);
1523 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1524 unsigned buffers = 0;
1525
1526 if (fb->base.zsbuf) {
1527 if (ctx->zsa->base.depth.enabled)
1528 buffers |= PIPE_CLEAR_DEPTH;
1529 if (ctx->zsa->base.stencil[0].enabled ||
1530 ctx->zsa->base.stencil[1].enabled)
1531 buffers |= PIPE_CLEAR_STENCIL;
1532 }
1533
1534 if (fb->base.nr_cbufs)
1535 buffers |= PIPE_CLEAR_COLOR0;
1536
1537 lima_update_submit_wb(ctx, buffers);
1538
1539 lima_update_gp_attribute_info(ctx, info);
1540
1541 if ((ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1542 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty) ||
1543 ctx->dirty & LIMA_CONTEXT_DIRTY_VIEWPORT ||
1544 ctx->dirty & LIMA_CONTEXT_DIRTY_SHADER_VERT) {
1545 lima_update_gp_uniform(ctx);
1546 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty = false;
1547 }
1548
1549 lima_update_varying(ctx, info);
1550
1551 /* If it's zero scissor, don't build vs cmd list */
1552 if (!lima_is_scissor_zero(ctx))
1553 lima_pack_vs_cmd(ctx, info);
1554
1555 if (ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1556 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty) {
1557 lima_update_pp_uniform(ctx);
1558 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty = false;
1559 }
1560
1561 lima_update_textures(ctx);
1562
1563 lima_pack_render_state(ctx, info);
1564 lima_pack_plbu_cmd(ctx, info);
1565
1566 if (ctx->gp_output) {
1567 lima_bo_unreference(ctx->gp_output); /* held by submit */
1568 ctx->gp_output = NULL;
1569 }
1570
1571 ctx->dirty = 0;
1572 }
1573
1574 static void
1575 lima_draw_vbo_indexed(struct pipe_context *pctx,
1576 const struct pipe_draw_info *info)
1577 {
1578 struct lima_context *ctx = lima_context(pctx);
1579 struct pipe_resource *indexbuf = NULL;
1580
1581 /* Mali Utgard GPU always need min/max index info for index draw,
1582 * compute it if upper layer does not do for us */
1583 if (info->max_index == ~0u)
1584 u_vbuf_get_minmax_index(pctx, info, &ctx->min_index, &ctx->max_index);
1585 else {
1586 ctx->min_index = info->min_index;
1587 ctx->max_index = info->max_index;
1588 }
1589
1590 if (info->has_user_indices) {
1591 util_upload_index_buffer(&ctx->base, info, &indexbuf, &ctx->index_offset, 0x40);
1592 ctx->index_res = lima_resource(indexbuf);
1593 }
1594 else {
1595 ctx->index_res = lima_resource(info->index.resource);
1596 ctx->index_offset = 0;
1597 }
1598
1599 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1600 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1601 lima_draw_vbo_update(pctx, info);
1602
1603 if (indexbuf)
1604 pipe_resource_reference(&indexbuf, NULL);
1605 }
1606
1607 static void
1608 lima_draw_vbo_count(struct pipe_context *pctx,
1609 const struct pipe_draw_info *info)
1610 {
1611 static const uint32_t max_verts = 65535;
1612
1613 struct pipe_draw_info local_info = *info;
1614 unsigned start = info->start;
1615 unsigned count = info->count;
1616
1617 while (count) {
1618 unsigned this_count = count;
1619 unsigned step;
1620
1621 u_split_draw(info, max_verts, &this_count, &step);
1622
1623 local_info.start = start;
1624 local_info.count = this_count;
1625
1626 lima_draw_vbo_update(pctx, &local_info);
1627
1628 count -= step;
1629 start += step;
1630 }
1631 }
1632
1633 static void
1634 lima_draw_vbo(struct pipe_context *pctx,
1635 const struct pipe_draw_info *info)
1636 {
1637 /* check if draw mode and vertex/index count match,
1638 * otherwise gp will hang */
1639 if (!u_trim_pipe_prim(info->mode, (unsigned*)&info->count)) {
1640 debug_printf("draw mode and vertex/index count mismatch\n");
1641 return;
1642 }
1643
1644 struct lima_context *ctx = lima_context(pctx);
1645
1646 if (!ctx->vs || !ctx->fs) {
1647 debug_warn_once("no shader, skip draw\n");
1648 return;
1649 }
1650
1651 if (!lima_update_vs_state(ctx) || !lima_update_fs_state(ctx))
1652 return;
1653
1654 lima_dump_command_stream_print(
1655 ctx->vs->bo->map, ctx->vs->shader_size, false,
1656 "add vs at va %x\n", ctx->vs->bo->va);
1657
1658 lima_dump_command_stream_print(
1659 ctx->fs->bo->map, ctx->fs->shader_size, false,
1660 "add fs at va %x\n", ctx->fs->bo->va);
1661
1662 lima_submit_add_bo(ctx->submit, LIMA_PIPE_GP, ctx->vs->bo, LIMA_SUBMIT_BO_READ);
1663 lima_submit_add_bo(ctx->submit, LIMA_PIPE_PP, ctx->fs->bo, LIMA_SUBMIT_BO_READ);
1664
1665 if (info->index_size)
1666 lima_draw_vbo_indexed(pctx, info);
1667 else
1668 lima_draw_vbo_count(pctx, info);
1669 }
1670
1671 static void
1672 lima_finish_plbu_cmd(struct lima_context *ctx)
1673 {
1674 int i = 0;
1675 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + 2 * 4);
1676
1677 plbu_cmd[i++] = 0x00000000;
1678 plbu_cmd[i++] = 0x50000000; /* END */
1679
1680 ctx->plbu_cmd_array.size += i * 4;
1681 }
1682
1683 static void
1684 lima_pack_wb_zsbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1685 {
1686 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1687 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
1688 int level = fb->base.zsbuf->u.tex.level;
1689 uint32_t format = lima_format_get_pixel(fb->base.zsbuf->format);
1690
1691 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1692 wb[wb_idx].type = 0x01; /* 1 for depth, stencil */
1693 wb[wb_idx].address = res->bo->va + res->levels[level].offset;
1694 wb[wb_idx].pixel_format = format;
1695 if (res->tiled) {
1696 wb[wb_idx].pixel_layout = 0x2;
1697 wb[wb_idx].pitch = fb->tiled_w;
1698 } else {
1699 wb[wb_idx].pixel_layout = 0x0;
1700 wb[wb_idx].pitch = res->levels[level].stride / 8;
1701 }
1702 wb[wb_idx].mrt_bits = 0;
1703 }
1704
1705 static void
1706 lima_pack_wb_cbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1707 {
1708 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1709 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
1710 int level = fb->base.cbufs[0]->u.tex.level;
1711 unsigned layer = fb->base.cbufs[0]->u.tex.first_layer;
1712 uint32_t format = lima_format_get_pixel(fb->base.cbufs[0]->format);
1713 bool swap_channels = lima_format_get_swap_rb(fb->base.cbufs[0]->format);
1714
1715 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1716 wb[wb_idx].type = 0x02; /* 2 for color buffer */
1717 wb[wb_idx].address = res->bo->va + res->levels[level].offset + layer * res->levels[level].layer_stride;
1718 wb[wb_idx].pixel_format = format;
1719 if (res->tiled) {
1720 wb[wb_idx].pixel_layout = 0x2;
1721 wb[wb_idx].pitch = fb->tiled_w;
1722 } else {
1723 wb[wb_idx].pixel_layout = 0x0;
1724 wb[wb_idx].pitch = res->levels[level].stride / 8;
1725 }
1726 wb[wb_idx].mrt_bits = swap_channels ? 0x4 : 0x0;
1727 }
1728
1729
1730 static void
1731 lima_pack_pp_frame_reg(struct lima_context *ctx, uint32_t *frame_reg,
1732 uint32_t *wb_reg)
1733 {
1734 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1735 struct lima_pp_frame_reg *frame = (void *)frame_reg;
1736 struct lima_screen *screen = lima_screen(ctx->base.screen);
1737 int wb_idx = 0;
1738
1739 frame->render_address = screen->pp_buffer->va + pp_frame_rsw_offset;
1740 frame->flags = 0x02;
1741 frame->clear_value_depth = ctx->clear.depth;
1742 frame->clear_value_stencil = ctx->clear.stencil;
1743 frame->clear_value_color = ctx->clear.color_8pc;
1744 frame->clear_value_color_1 = ctx->clear.color_8pc;
1745 frame->clear_value_color_2 = ctx->clear.color_8pc;
1746 frame->clear_value_color_3 = ctx->clear.color_8pc;
1747 frame->one = 1;
1748
1749 frame->width = fb->base.width - 1;
1750 frame->height = fb->base.height - 1;
1751
1752 /* frame->fragment_stack_address is overwritten per-pp in the kernel
1753 * by the values of pp_frame.fragment_stack_address[i] */
1754
1755 /* These are "stack size" and "stack offset" shifted,
1756 * here they are assumed to be always the same. */
1757 frame->fragment_stack_size = ctx->pp_max_stack_size << 16 | ctx->pp_max_stack_size;
1758
1759 /* related with MSAA and different value when r4p0/r7p0 */
1760 frame->supersampled_height = fb->base.height * 2 - 1;
1761 frame->scale = 0xE0C;
1762
1763 frame->dubya = 0x77;
1764 frame->onscreen = 1;
1765 frame->blocking = (fb->shift_min << 28) | (fb->shift_h << 16) | fb->shift_w;
1766 frame->foureight = 0x8888;
1767
1768 if (fb->base.nr_cbufs && (ctx->resolve & PIPE_CLEAR_COLOR0))
1769 lima_pack_wb_cbuf_reg(ctx, wb_reg, wb_idx++);
1770
1771 if (fb->base.zsbuf &&
1772 (ctx->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)))
1773 lima_pack_wb_zsbuf_reg(ctx, wb_reg, wb_idx++);
1774 }
1775
1776 static void
1777 _lima_flush(struct lima_context *ctx, bool end_of_frame)
1778 {
1779 #define pp_stack_pp_size 0x400
1780
1781 lima_pack_head_plbu_cmd(ctx);
1782 lima_finish_plbu_cmd(ctx);
1783
1784 lima_update_submit_bo(ctx);
1785
1786 int vs_cmd_size = ctx->vs_cmd_array.size;
1787 uint32_t vs_cmd_va = 0;
1788
1789 if (vs_cmd_size) {
1790 void *vs_cmd =
1791 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_vs_cmd, vs_cmd_size);
1792 memcpy(vs_cmd, util_dynarray_begin(&ctx->vs_cmd_array), vs_cmd_size);
1793 util_dynarray_clear(&ctx->vs_cmd_array);
1794 vs_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_vs_cmd);
1795
1796 lima_dump_command_stream_print(
1797 vs_cmd, vs_cmd_size, false, "flush vs cmd at va %x\n", vs_cmd_va);
1798 lima_dump_vs_command_stream_print(vs_cmd, vs_cmd_size, vs_cmd_va);
1799 }
1800
1801 int plbu_cmd_size = ctx->plbu_cmd_array.size + ctx->plbu_cmd_head.size;
1802 void *plbu_cmd =
1803 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_plbu_cmd, plbu_cmd_size);
1804 memcpy(plbu_cmd,
1805 util_dynarray_begin(&ctx->plbu_cmd_head),
1806 ctx->plbu_cmd_head.size);
1807 memcpy(plbu_cmd + ctx->plbu_cmd_head.size,
1808 util_dynarray_begin(&ctx->plbu_cmd_array),
1809 ctx->plbu_cmd_array.size);
1810 util_dynarray_clear(&ctx->plbu_cmd_array);
1811 util_dynarray_clear(&ctx->plbu_cmd_head);
1812 uint32_t plbu_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_plbu_cmd);
1813
1814 lima_dump_command_stream_print(
1815 plbu_cmd, plbu_cmd_size, false, "flush plbu cmd at va %x\n", plbu_cmd_va);
1816 lima_dump_plbu_command_stream_print(plbu_cmd, plbu_cmd_size, plbu_cmd_va);
1817
1818 struct lima_screen *screen = lima_screen(ctx->base.screen);
1819 struct drm_lima_gp_frame gp_frame;
1820 struct lima_gp_frame_reg *gp_frame_reg = (void *)gp_frame.frame;
1821 gp_frame_reg->vs_cmd_start = vs_cmd_va;
1822 gp_frame_reg->vs_cmd_end = vs_cmd_va + vs_cmd_size;
1823 gp_frame_reg->plbu_cmd_start = plbu_cmd_va;
1824 gp_frame_reg->plbu_cmd_end = plbu_cmd_va + plbu_cmd_size;
1825 gp_frame_reg->tile_heap_start = ctx->gp_tile_heap[ctx->plb_index]->va;
1826 gp_frame_reg->tile_heap_end = ctx->gp_tile_heap[ctx->plb_index]->va + ctx->gp_tile_heap_size;
1827
1828 lima_dump_command_stream_print(
1829 &gp_frame, sizeof(gp_frame), false, "add gp frame\n");
1830
1831 if (!lima_submit_start(ctx->submit, LIMA_PIPE_GP, &gp_frame, sizeof(gp_frame)))
1832 fprintf(stderr, "gp submit error\n");
1833
1834 if (lima_dump_command_stream) {
1835 if (lima_submit_wait(ctx->submit, LIMA_PIPE_GP, PIPE_TIMEOUT_INFINITE)) {
1836 if (ctx->gp_output) {
1837 float *pos = lima_bo_map(ctx->gp_output);
1838 lima_dump_command_stream_print(
1839 pos, 4 * 4 * 16, true, "gl_pos dump at va %x\n",
1840 ctx->gp_output->va);
1841 }
1842
1843 uint32_t *plb = lima_bo_map(ctx->plb[ctx->plb_index]);
1844 lima_dump_command_stream_print(
1845 plb, LIMA_CTX_PLB_BLK_SIZE, false, "plb dump at va %x\n",
1846 ctx->plb[ctx->plb_index]->va);
1847 }
1848 else {
1849 fprintf(stderr, "gp submit wait error\n");
1850 exit(1);
1851 }
1852 }
1853
1854 uint32_t pp_stack_va = 0;
1855 if (ctx->pp_max_stack_size) {
1856 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_stack, screen->num_pp *
1857 ctx->pp_max_stack_size * pp_stack_pp_size);
1858 pp_stack_va = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_stack);
1859 }
1860
1861 lima_update_pp_stream(ctx);
1862
1863 struct lima_pp_stream_state *ps = &ctx->pp_stream;
1864 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI400) {
1865 struct drm_lima_m400_pp_frame pp_frame = {0};
1866 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1867 pp_frame.num_pp = screen->num_pp;
1868
1869 for (int i = 0; i < screen->num_pp; i++) {
1870 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1871 if (ctx->pp_max_stack_size)
1872 pp_frame.fragment_stack_address[i] = pp_stack_va +
1873 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1874 }
1875
1876 lima_dump_command_stream_print(
1877 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1878
1879 if (!lima_submit_start(ctx->submit, LIMA_PIPE_PP, &pp_frame, sizeof(pp_frame)))
1880 fprintf(stderr, "pp submit error\n");
1881 }
1882 else {
1883 struct drm_lima_m450_pp_frame pp_frame = {0};
1884 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1885 pp_frame.num_pp = screen->num_pp;
1886
1887 if (ctx->pp_max_stack_size)
1888 for (int i = 0; i < screen->num_pp; i++)
1889 pp_frame.fragment_stack_address[i] = pp_stack_va +
1890 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1891
1892 if (ps->bo) {
1893 for (int i = 0; i < screen->num_pp; i++)
1894 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1895 }
1896 else {
1897 pp_frame.use_dlbu = true;
1898
1899 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1900 pp_frame.dlbu_regs[0] = ctx->plb[ctx->plb_index]->va;
1901 pp_frame.dlbu_regs[1] = ((fb->tiled_h - 1) << 16) | (fb->tiled_w - 1);
1902 unsigned s = util_logbase2(LIMA_CTX_PLB_BLK_SIZE) - 7;
1903 pp_frame.dlbu_regs[2] = (s << 28) | (fb->shift_h << 16) | fb->shift_w;
1904 pp_frame.dlbu_regs[3] = ((fb->tiled_h - 1) << 24) | ((fb->tiled_w - 1) << 16);
1905 }
1906
1907 lima_dump_command_stream_print(
1908 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1909
1910 if (!lima_submit_start(ctx->submit, LIMA_PIPE_PP, &pp_frame, sizeof(pp_frame)))
1911 fprintf(stderr, "pp submit error\n");
1912 }
1913
1914 if (lima_dump_command_stream) {
1915 if (!lima_submit_wait(ctx->submit, LIMA_PIPE_PP, PIPE_TIMEOUT_INFINITE)) {
1916 fprintf(stderr, "pp wait error\n");
1917 exit(1);
1918 }
1919 }
1920
1921 ctx->plb_index = (ctx->plb_index + 1) % lima_ctx_num_plb;
1922
1923 if (ctx->framebuffer.base.nr_cbufs && (ctx->resolve & PIPE_CLEAR_COLOR0)) {
1924 /* Set reload flag for next draw. It'll be unset if buffer is cleared */
1925 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
1926 surf->reload = true;
1927 }
1928
1929 ctx->pp_max_stack_size = 0;
1930
1931 ctx->damage_rect.minx = ctx->damage_rect.miny = 0xffff;
1932 ctx->damage_rect.maxx = ctx->damage_rect.maxy = 0;
1933
1934 ctx->resolve = 0;
1935
1936 lima_dump_file_next();
1937 }
1938
1939 void
1940 lima_flush(struct lima_context *ctx)
1941 {
1942 if (!lima_ctx_dirty(ctx))
1943 return;
1944
1945 _lima_flush(ctx, false);
1946 }
1947
1948 static void
1949 lima_pipe_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
1950 unsigned flags)
1951 {
1952 struct lima_context *ctx = lima_context(pctx);
1953 if (lima_ctx_dirty(ctx))
1954 _lima_flush(ctx, flags & PIPE_FLUSH_END_OF_FRAME);
1955
1956 if (fence) {
1957 int drm_fd = lima_screen(ctx->base.screen)->fd;
1958 int fd;
1959
1960 if (!drmSyncobjExportSyncFile(drm_fd, ctx->out_sync[LIMA_PIPE_PP], &fd))
1961 *fence = lima_fence_create(fd);
1962 }
1963 }
1964
1965 void
1966 lima_draw_init(struct lima_context *ctx)
1967 {
1968 ctx->base.clear = lima_clear;
1969 ctx->base.draw_vbo = lima_draw_vbo;
1970 ctx->base.flush = lima_pipe_flush;
1971 }