src/gallium/drivers/lima/lima_screen.c

   1 /*
   2  * Copyright (c) 2017-2019 Lima Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include <string.h>
  26
  27 #include "util/ralloc.h"
  28 #include "util/u_debug.h"
  29 #include "util/u_screen.h"
  30 #include "renderonly/renderonly.h"
  31
  32 #include "drm-uapi/drm_fourcc.h"
  33 #include "drm-uapi/lima_drm.h"
  34
  35 #include "lima_screen.h"
  36 #include "lima_context.h"
  37 #include "lima_resource.h"
  38 #include "lima_program.h"
  39 #include "lima_bo.h"
  40 #include "lima_fence.h"
  41 #include "lima_format.h"
  42 #include "ir/lima_ir.h"
  43
  44 #include "xf86drm.h"
  45
  46 int lima_plb_max_blk = 0;
  47 int lima_plb_pp_stream_cache_size = 0;
  48
  49 static void
  50 lima_screen_destroy(struct pipe_screen *pscreen)
  51 {
  52    struct lima_screen *screen = lima_screen(pscreen);
  53
  54    slab_destroy_parent(&screen->transfer_pool);
  55
  56    if (screen->ro)
  57       free(screen->ro);
  58
  59    if (screen->pp_buffer)
  60       lima_bo_unreference(screen->pp_buffer);
  61
  62    lima_bo_cache_fini(screen);
  63    lima_bo_table_fini(screen);
  64    ralloc_free(screen);
  65 }
  66
  67 static const char *
  68 lima_screen_get_name(struct pipe_screen *pscreen)
  69 {
  70    struct lima_screen *screen = lima_screen(pscreen);
  71
  72    switch (screen->gpu_type) {
  73    case DRM_LIMA_PARAM_GPU_ID_MALI400:
  74      return "Mali400";
  75    case DRM_LIMA_PARAM_GPU_ID_MALI450:
  76      return "Mali450";
  77    }
  78
  79    return NULL;
  80 }
  81
  82 static const char *
  83 lima_screen_get_vendor(struct pipe_screen *pscreen)
  84 {
  85    return "lima";
  86 }
  87
  88 static const char *
  89 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
  90 {
  91    return "ARM";
  92 }
  93
  94 static int
  95 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  96 {
  97    switch (param) {
  98    case PIPE_CAP_NPOT_TEXTURES:
  99    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 100    case PIPE_CAP_ACCELERATED:
 101    case PIPE_CAP_UMA:
 102    case PIPE_CAP_NATIVE_FENCE_FD:
 103    case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 104       return 1;
 105
 106    /* Unimplemented, but for exporting OpenGL 2.0 */
 107    case PIPE_CAP_OCCLUSION_QUERY:
 108    case PIPE_CAP_POINT_SPRITE:
 109       return 1;
 110
 111    /* not clear supported */
 112    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 113    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 114    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 115    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 116       return 1;
 117
 118    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 119    case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
 120    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 121       return 1;
 122
 123    case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 124       return 1 << (LIMA_MAX_MIP_LEVELS - 1);
 125    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 126    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 127       return LIMA_MAX_MIP_LEVELS;
 128
 129    case PIPE_CAP_VENDOR_ID:
 130       return 0x13B5;
 131
 132    case PIPE_CAP_VIDEO_MEMORY:
 133       return 0;
 134
 135    case PIPE_CAP_PCI_GROUP:
 136    case PIPE_CAP_PCI_BUS:
 137    case PIPE_CAP_PCI_DEVICE:
 138    case PIPE_CAP_PCI_FUNCTION:
 139       return 0;
 140
 141    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 142       return 0;
 143
 144    case PIPE_CAP_ALPHA_TEST:
 145    case PIPE_CAP_FLATSHADE:
 146    case PIPE_CAP_TWO_SIDED_COLOR:
 147    case PIPE_CAP_CLIP_PLANES:
 148       return 0;
 149
 150    case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
 151       return 1;
 152
 153    default:
 154       return u_pipe_screen_get_param_defaults(pscreen, param);
 155    }
 156 }
 157
 158 static float
 159 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 160 {
 161    switch (param) {
 162    case PIPE_CAPF_MAX_LINE_WIDTH:
 163    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 164    case PIPE_CAPF_MAX_POINT_WIDTH:
 165    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 166       return 100.0f;
 167    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 168       return 16.0f;
 169    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 170       return 15.0f;
 171
 172    default:
 173       return 0.0f;
 174    }
 175 }
 176
 177 static int
 178 get_vertex_shader_param(struct lima_screen *screen,
 179                         enum pipe_shader_cap param)
 180 {
 181    switch (param) {
 182    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 183    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 184    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 185    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 186       return 16384; /* need investigate */
 187
 188    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 189       return 1024;
 190
 191    case PIPE_SHADER_CAP_MAX_INPUTS:
 192       return 16; /* attributes */
 193
 194    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 195       return LIMA_MAX_VARYING_NUM; /* varying */
 196
 197    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 198       return 16 * 1024 * sizeof(float);
 199
 200    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 201       return 1;
 202
 203    case PIPE_SHADER_CAP_PREFERRED_IR:
 204       return PIPE_SHADER_IR_NIR;
 205
 206    case PIPE_SHADER_CAP_MAX_TEMPS:
 207       return 256; /* need investigate */
 208
 209    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 210       return 32;
 211
 212    default:
 213       return 0;
 214    }
 215 }
 216
 217 static int
 218 get_fragment_shader_param(struct lima_screen *screen,
 219                           enum pipe_shader_cap param)
 220 {
 221    switch (param) {
 222    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 223    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 224    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 225    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 226       return 16384; /* need investigate */
 227
 228    case PIPE_SHADER_CAP_MAX_INPUTS:
 229       return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
 230
 231    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 232       return 1024;
 233
 234    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 235       return 16 * 1024 * sizeof(float);
 236
 237    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 238       return 1;
 239
 240    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 241       return 16; /* need investigate */
 242
 243    case PIPE_SHADER_CAP_PREFERRED_IR:
 244       return PIPE_SHADER_IR_NIR;
 245
 246    case PIPE_SHADER_CAP_MAX_TEMPS:
 247       return 256; /* need investigate */
 248
 249    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 250    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 251       return 1;
 252
 253    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 254    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 255       return 0;
 256
 257    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 258       return 32;
 259
 260    default:
 261       return 0;
 262    }
 263 }
 264
 265 static int
 266 lima_screen_get_shader_param(struct pipe_screen *pscreen,
 267                              enum pipe_shader_type shader,
 268                              enum pipe_shader_cap param)
 269 {
 270    struct lima_screen *screen = lima_screen(pscreen);
 271
 272    switch (shader) {
 273    case PIPE_SHADER_FRAGMENT:
 274       return get_fragment_shader_param(screen, param);
 275    case PIPE_SHADER_VERTEX:
 276       return get_vertex_shader_param(screen, param);
 277
 278    default:
 279       return 0;
 280    }
 281 }
 282
 283 static bool
 284 lima_screen_is_format_supported(struct pipe_screen *pscreen,
 285                                 enum pipe_format format,
 286                                 enum pipe_texture_target target,
 287                                 unsigned sample_count,
 288                                 unsigned storage_sample_count,
 289                                 unsigned usage)
 290 {
 291    switch (target) {
 292    case PIPE_BUFFER:
 293    case PIPE_TEXTURE_1D:
 294    case PIPE_TEXTURE_2D:
 295    case PIPE_TEXTURE_RECT:
 296    case PIPE_TEXTURE_CUBE:
 297       break;
 298    default:
 299       return false;
 300    }
 301
 302    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 303       return false;
 304
 305    /* be able to support 16, now limit to 4 */
 306    if (sample_count > 1 && sample_count != 4)
 307       return false;
 308
 309    if (usage & PIPE_BIND_RENDER_TARGET &&
 310        !lima_format_pixel_supported(format))
 311       return false;
 312
 313    if (usage & PIPE_BIND_DEPTH_STENCIL) {
 314       switch (format) {
 315       case PIPE_FORMAT_Z16_UNORM:
 316       case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 317       case PIPE_FORMAT_Z24X8_UNORM:
 318          break;
 319       default:
 320          return false;
 321       }
 322    }
 323
 324    if (usage & PIPE_BIND_VERTEX_BUFFER) {
 325       switch (format) {
 326       case PIPE_FORMAT_R32G32B32_FLOAT:
 327          break;
 328       default:
 329          return false;
 330       }
 331    }
 332
 333    if (usage & PIPE_BIND_INDEX_BUFFER) {
 334       switch (format) {
 335       case PIPE_FORMAT_I8_UINT:
 336       case PIPE_FORMAT_I16_UINT:
 337       case PIPE_FORMAT_I32_UINT:
 338          break;
 339       default:
 340          return false;
 341       }
 342    }
 343
 344    if (usage & PIPE_BIND_SAMPLER_VIEW)
 345       return lima_format_texel_supported(format);
 346
 347    return true;
 348 }
 349
 350 static const void *
 351 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
 352                                  enum pipe_shader_ir ir,
 353                                  enum pipe_shader_type shader)
 354 {
 355    return lima_program_get_compiler_options(shader);
 356 }
 357
 358 static bool
 359 lima_screen_set_plb_max_blk(struct lima_screen *screen)
 360 {
 361    if (lima_plb_max_blk) {
 362       screen->plb_max_blk = lima_plb_max_blk;
 363       return true;
 364    }
 365
 366    if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
 367       screen->plb_max_blk = 4096;
 368    else
 369       screen->plb_max_blk = 512;
 370
 371    drmDevicePtr devinfo;
 372
 373    if (drmGetDevice2(screen->fd, 0, &devinfo))
 374       return false;
 375
 376    if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
 377       char **compatible = devinfo->deviceinfo.platform->compatible;
 378
 379       if (compatible && *compatible)
 380          if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
 381             screen->plb_max_blk = 2048;
 382    }
 383
 384    drmFreeDevice(&devinfo);
 385
 386    return true;
 387 }
 388
 389 static bool
 390 lima_screen_query_info(struct lima_screen *screen)
 391 {
 392    drmVersionPtr version = drmGetVersion(screen->fd);
 393    if (!version)
 394       return false;
 395
 396    if (version->version_major > 1 || version->version_minor > 0)
 397       screen->has_growable_heap_buffer = true;
 398
 399    drmFreeVersion(version);
 400
 401    if (lima_debug & LIMA_DEBUG_NO_GROW_HEAP)
 402       screen->has_growable_heap_buffer = false;
 403
 404    struct drm_lima_get_param param;
 405
 406    memset(&param, 0, sizeof(param));
 407    param.param = DRM_LIMA_PARAM_GPU_ID;
 408    if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
 409       return false;
 410
 411    switch (param.value) {
 412    case DRM_LIMA_PARAM_GPU_ID_MALI400:
 413    case DRM_LIMA_PARAM_GPU_ID_MALI450:
 414       screen->gpu_type = param.value;
 415       break;
 416    default:
 417       return false;
 418    }
 419
 420    memset(&param, 0, sizeof(param));
 421    param.param = DRM_LIMA_PARAM_NUM_PP;
 422    if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
 423       return false;
 424
 425    screen->num_pp = param.value;
 426
 427    lima_screen_set_plb_max_blk(screen);
 428
 429    return true;
 430 }
 431
 432 static void
 433 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
 434                                    enum pipe_format format, int max,
 435                                    uint64_t *modifiers,
 436                                    unsigned int *external_only,
 437                                    int *count)
 438 {
 439    uint64_t available_modifiers[] = {
 440       DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,
 441       DRM_FORMAT_MOD_LINEAR,
 442    };
 443
 444    if (!modifiers) {
 445       *count = ARRAY_SIZE(available_modifiers);
 446       return;
 447    }
 448
 449    for (int i = 0; i < *count; i++) {
 450       modifiers[i] = available_modifiers[i];
 451       if (external_only)
 452          external_only = false;
 453    }
 454 }
 455
 456 static const struct debug_named_value debug_options[] = {
 457         { "gp",       LIMA_DEBUG_GP,
 458           "print GP shader compiler result of each stage" },
 459         { "pp",       LIMA_DEBUG_PP,
 460           "print PP shader compiler result of each stage" },
 461         { "dump",     LIMA_DEBUG_DUMP,
 462           "dump GPU command stream to $PWD/lima.dump" },
 463         { "shaderdb", LIMA_DEBUG_SHADERDB,
 464           "print shader information for shaderdb" },
 465         { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
 466           "disable BO cache" },
 467         { "bocache", LIMA_DEBUG_BO_CACHE,
 468           "print debug info for BO cache" },
 469         { "notiling", LIMA_DEBUG_NO_TILING,
 470           "don't use tiled buffers" },
 471         { "nogrowheap",   LIMA_DEBUG_NO_GROW_HEAP,
 472           "disable growable heap buffer" },
 473         { "singlejob", LIMA_DEBUG_SINGLE_JOB,
 474           "disable multi job optimization" },
 475         { NULL }
 476 };
 477
 478 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
 479 uint32_t lima_debug;
 480
 481 static void
 482 lima_screen_parse_env(void)
 483 {
 484    lima_debug = debug_get_option_lima_debug();
 485
 486    lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
 487    if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
 488        lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
 489       fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
 490               "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
 491               LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
 492       lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
 493    }
 494
 495    lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
 496    if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
 497       fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
 498               "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
 499       lima_plb_max_blk = 0;
 500    }
 501
 502    lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
 503    if (lima_ppir_force_spilling < 0) {
 504       fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
 505               "reset to default 0\n", lima_ppir_force_spilling);
 506       lima_ppir_force_spilling = 0;
 507    }
 508
 509    lima_plb_pp_stream_cache_size = debug_get_num_option("LIMA_PLB_PP_STREAM_CACHE_SIZE", 0);
 510    if (lima_plb_pp_stream_cache_size < 0) {
 511       fprintf(stderr, "lima: LIMA_PLB_PP_STREAM_CACHE_SIZE %d less than 0, "
 512               "reset to default 0\n", lima_plb_pp_stream_cache_size);
 513       lima_plb_pp_stream_cache_size = 0;
 514    }
 515 }
 516
 517 struct pipe_screen *
 518 lima_screen_create(int fd, struct renderonly *ro)
 519 {
 520    uint64_t system_memory;
 521    struct lima_screen *screen;
 522
 523    screen = rzalloc(NULL, struct lima_screen);
 524    if (!screen)
 525       return NULL;
 526
 527    screen->fd = fd;
 528
 529    lima_screen_parse_env();
 530
 531    /* Limit PP PLB stream cache size to 0.1% of system memory */
 532    if (!lima_plb_pp_stream_cache_size &&
 533        os_get_total_physical_memory(&system_memory))
 534       lima_plb_pp_stream_cache_size = system_memory >> 10;
 535
 536    /* Set lower limit on PP PLB cache size */
 537    lima_plb_pp_stream_cache_size = MAX2(128 * 1024 * lima_ctx_num_plb,
 538                                         lima_plb_pp_stream_cache_size);
 539
 540    if (!lima_screen_query_info(screen))
 541       goto err_out0;
 542
 543    if (!lima_bo_cache_init(screen))
 544       goto err_out0;
 545
 546    if (!lima_bo_table_init(screen))
 547       goto err_out1;
 548
 549    screen->pp_ra = ppir_regalloc_init(screen);
 550    if (!screen->pp_ra)
 551       goto err_out2;
 552
 553    screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
 554    if (!screen->pp_buffer)
 555       goto err_out2;
 556    screen->pp_buffer->cacheable = false;
 557
 558    /* fs program for clear buffer?
 559     * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
 560     */
 561    static const uint32_t pp_clear_program[] = {
 562       0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
 563       0x000005f5, 0x00000000, 0x00000000, 0x00000000,
 564    };
 565    memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
 566           pp_clear_program, sizeof(pp_clear_program));
 567
 568    /* copy texture to framebuffer, used to reload gpu tile buffer
 569     * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
 570     */
 571    static const uint32_t pp_reload_program[] = {
 572       0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
 573       0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
 574    };
 575    memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
 576           pp_reload_program, sizeof(pp_reload_program));
 577
 578    /* 0/1/2 vertex index for reload/clear draw */
 579    static const uint8_t pp_shared_index[] = { 0, 1, 2 };
 580    memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
 581           pp_shared_index, sizeof(pp_shared_index));
 582
 583    /* 4096x4096 gl pos used for partial clear */
 584    static const float pp_clear_gl_pos[] = {
 585       4096, 0,    1, 1,
 586       0,    0,    1, 1,
 587       0,    4096, 1, 1,
 588    };
 589    memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
 590           pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
 591
 592    /* is pp frame render state static? */
 593    uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
 594    memset(pp_frame_rsw, 0, 0x40);
 595    pp_frame_rsw[8] = 0x0000f008;
 596    pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
 597    pp_frame_rsw[13] = 0x00000100;
 598
 599    if (ro) {
 600       screen->ro = renderonly_dup(ro);
 601       if (!screen->ro) {
 602          fprintf(stderr, "Failed to dup renderonly object\n");
 603          goto err_out3;
 604       }
 605    }
 606
 607    screen->base.destroy = lima_screen_destroy;
 608    screen->base.get_name = lima_screen_get_name;
 609    screen->base.get_vendor = lima_screen_get_vendor;
 610    screen->base.get_device_vendor = lima_screen_get_device_vendor;
 611    screen->base.get_param = lima_screen_get_param;
 612    screen->base.get_paramf = lima_screen_get_paramf;
 613    screen->base.get_shader_param = lima_screen_get_shader_param;
 614    screen->base.context_create = lima_context_create;
 615    screen->base.is_format_supported = lima_screen_is_format_supported;
 616    screen->base.get_compiler_options = lima_screen_get_compiler_options;
 617    screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
 618
 619    lima_resource_screen_init(screen);
 620    lima_fence_screen_init(screen);
 621
 622    slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
 623
 624    screen->refcnt = 1;
 625
 626    return &screen->base;
 627
 628 err_out3:
 629    lima_bo_unreference(screen->pp_buffer);
 630 err_out2:
 631    lima_bo_table_fini(screen);
 632 err_out1:
 633    lima_bo_cache_fini(screen);
 634 err_out0:
 635    ralloc_free(screen);
 636    return NULL;
 637 }